CN203761526U - Television online programming circuit - Google Patents
Television online programming circuit Download PDFInfo
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- CN203761526U CN203761526U CN201420107430.9U CN201420107430U CN203761526U CN 203761526 U CN203761526 U CN 203761526U CN 201420107430 U CN201420107430 U CN 201420107430U CN 203761526 U CN203761526 U CN 203761526U
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- 101100401568 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) MIC10 gene Proteins 0.000 claims description 11
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- 230000009286 beneficial effect Effects 0.000 description 1
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- 238000005516 engineering process Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
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Abstract
The utility model discloses a television online programming circuit, which comprises a programming interface module, a power supply control module, an EEPROM storage module, a signal isolation module, a television system chip and an I2C bus device, wherein the output end of the power supply control module is in circuit connection with the input end of the EEPROM storage module, the output end of the programming interface module is in circuit connected with the EEPROM storage module and the input end of the signal isolation module, and the output end of the signal isolation module is in circuit connection with the television system chip and the I2C bus device. The television online programming circuit programs a machine barcode, an HDCP KEY and an MAC address into an EEPROM of a mainboard under the condition that a television is not electrified, or only carries out programming on the independent television mainboard, and can arrange the programming station and the process in television production flexibly, thereby being simple and convenient to operate, reducing the labor intensity, improving the efficiency, reducing the cost, saving electric energy, and having wide application values.
Description
Technical field
The utility model relates to technical field of television sets, and specifically a kind of TV is at line writing circuit.
Background technology
Due to the uniqueness of the MAC Address of the HDCP KEY of machine bar code, HDMI, network, in the process of producing in TV research and development, machine bar code, HDCP KEY, the MAC Address of the overwhelming majority are all to enter in the eeprom memory of TV SKD at line writing by presetting read-write instrument at present.
But have the following disadvantages in line writing machine bar code, HDCP KEY, MAC Address at present:
(1) eeprom memory adopts I2C bus, I2C bus can only a main equipment (Mstar) at synchronization, therefore master device functionality (or bus functionality) that must closing television mainboard TV SOC master chip, make presetting read-write instrument become unique main equipment, presetting read-write instrument could enter machine bar code, HDCP KEY, MAC Address programming by I2C bus the eeprom memory of mainboard; And the bus functionality of closing TV SOC master chip can need operate by remote controller, and also will open by remote controller the bus functionality of TV SOC master chip after pulling out presetting read-write instrument programming is complete, complicated operation is loaded down with trivial details, efficiency is low;
(2) in the time producing, TV generally lies low and is placed on working plate or back to operative employee, can't see video screen state when employee operates, and cannot determine whether to open or close bus functionality, has further increased operation complexity, has reduced efficiency and reliability;
(3) there is part machine open channel indefinite, and design point cannot respond the straighforward operation of closing bus functionality under DTV, homepage, need to change to special modality or interface and just can close bus functionality, operation has limitation, has increased equally operation complexity, has reduced efficiency;
(4) the television startup time long, must wait for start afterwards television system normal operation just can close bus functionality, wasted the plenty of time and waited for television startup, reduced efficiency;
(5) must after television system operation, close bus functionality, just can carry out programming, the arrangement that TV is produced station and operation is restricted;
(6) TV is closing in the process such as bus functionality and programming of TV SOC master chip, and TV need to, in running status, have been wasted electric energy.
Utility model content
The purpose of this utility model is to overcome above-mentioned the deficiencies in the prior art, solves the technological deficiency existing at present, the utility model discloses a kind of TV at line writing circuit.
The technical scheme that the utility model adopts is:
A kind of TV, at line writing circuit, comprising:
Programming interface module, programming interface module receives voltage, read-write control signal and I2C bus signals clock cable and the data wire of external equipment output;
Power supply control module, power supply control module receives the power supply of TV motherboard and processes, in the time that television startup normally moves, output voltage is to EEPROM memory module and will after the power supply of TV motherboard and television startup, export to the voltage isolation of EEPROM memory module;
EEPROM memory module, EEPROM memory module is under the control of control signal, in eeprom memory machine bar code, HDCP KEY, MAC Address programming being entered by the clock cable of EEPROM memory module and the data wire bus signals of EEPROM memory module, and carry out communication with television system chip;
Signal isolation module, signal isolation module, control signal and the I2C bus control signal of signal isolation module isolation EEPROM memory module, the clock cable of the clock cable of bus signals EEPROM memory module, the data wire of EEPROM memory module and I2C bus, the data wire of I2C bus;
Television system chip and I2C bus device;
The output of described power supply control module is connected with the inlet circuit of described EEPROM memory module, the output of described programming interface module is connected with the inlet circuit of described EEPROM memory module, described signal isolation module, and the output of described signal isolation module is connected with described television system chip, described I2C bus device circuit.
Further, described programming interface module comprises: interface CN1, resistance R 7, resistance R 8, resistance R 9, resistance R 10, described interface CN1 comprises that 5 connect pin, the 1st pin contact resistance R7, the 2nd pin contact resistance R8, the 3rd pin ground connection, the 4th pin contact resistance R9, the 5th pin contact resistance R10.
Further, described power supply control module comprises: NPN triode, resistance R 1, resistance R 2, resistance R 3, the c utmost point contact resistance R1 of described NPN triode, the b utmost point contact resistance R2 of described NPN triode, the intermediate node of R3, described R3 ground connection.
Further, described EEPROM memory module comprises: EEPROM storage chip U1, resistance R 4, resistance R 5, resistance R 6, described EEPROM storage chip U1 comprises that 8 connect pin, 1st, 2,3,4 pin ground connection, the 5th pin contact resistance R6, the 6th pin contact resistance R5, the 7th pin contact resistance R5, the 8th pin is connected with the e utmost point of described NPN triode.
Further, described signal isolation module comprises: NMOS pipe MOS1, NMOS pipe MOS2, resistance R 11, the D utmost point of described NMOS pipe MOS1 is connected with the intermediate node of resistance R 5, R8, the D utmost point of described NMOS pipe MOS2 is connected with the intermediate node of resistance R 6, R7, the S of described NMOS pipe MOS1, NMOS pipe MOS2 is extremely all connected with I2C bus device, and described resistance R 11 is connected with the intermediate node of resistance R 2, R3.
The beneficial effects of the utility model are,
The disclosed a kind of TV of the utility model is at line writing circuit,
1. can in the cold situation of TV, machine bar code, HDCP KEY, MAC Address programming be entered in the EEPROM storage of mainboard, thereby or do not need whole set of television and only just TV motherboard is independently carried out to programming and machine bar code, HDCPKEY, MAC Address programming are entered in the EEPROM storage of mainboard;
2. can arrange flexibly station and the operation of TV production programming, programming is simple to operation, reduced labour intensity, improved efficiency, reduced cost, saved electric energy, simultaneously succinctly reasonable, reliable and stable, is with a wide range of applications.
Below in conjunction with accompanying drawing, the utility model is described in further detail.
Brief description of the drawings
Fig. 1 is theory diagram of the present utility model;
Fig. 2 is application example circuit diagram of the present utility model.
Embodiment
In order to deepen, to understanding of the present utility model, below in conjunction with drawings and Examples, the utility model to be described in further detail.Following examples are only for the technical solution of the utility model is more clearly described, and can not limit protection range of the present utility model with this.
As shown in Figure 1,
A kind of TV, at line writing circuit, comprising: programming interface module 11, power supply control module 12, EEPROM memory module 13, signal isolation module 14, and television system (TV SOC) chip 21 and I2C bus device 22.
Programming interface module 11 receives voltage (VCC), read-write control signal (WP) and I2C bus signals clock cable (SCL) and the data wire (SDA) of external equipment (as presetting read-write instrument) output, after processing, output voltage EP_VCC is to EEPROM memory module, and output control signal EP_WP is to EEPROM memory module, also by I2C bus signals EP_SCL, SDA and the communication of EEPROM memory module;
Power supply control module 12 receives the power supply (M_VCC) of TV motherboard and processes, and in the time that television startup normally moves, output voltage (EP_VCC) is given EEPROM memory module and M_VCC and EP_VCC are isolated.On TV after electricity when normal operation, if external equipment is connected with programming interface module 11 simultaneously, can effectively prevent that VCC that M_VCC and external equipment provide is through the inconsistent fault causing of programming interface module 11 EP_VCC voltage after treatment; For example, under TV motherboard does not have electrifying condition (in the time that TV is not started shooting or be only independently when mainboard), external equipment comes programming machine bar code, HDMI KEY etc. by programming interface module 11, the voltage EP_VCC that programming interface module 11 is exported has been connected to power supply control module 12 equally, but it is 0V that EP_VCC can not further be passed to M_VCC, M_VCC, therefore under TV motherboard does not have electrifying condition, cut off EP_VCC and be passed to M_VCC, the power consumption while having saved programming and prevent that M_VCC short circuit from causing the damage of external equipment;
EEPROM memory module 13 is under the control of control signal (EP_WP), when EP_WP is low level, in eeprom memory machine bar code, HDCP KEY, MAC Address programming being entered by the clock cable (EP_SCL) of EEPROM memory module and data wire (EP_SDA) bus signals of EEPROM memory module, and carry out communication with television system chip;
Signal isolation module 14 is isolated control signal (EP_WP) and the I2C bus control signal (M_WP) of EEPROM memory module, the clock cable (M_SCL) of the clock cable (EP_SCL) of bus signals EEPROM memory module, the data wire (EP_SDA) of EEPROM memory module and I2C bus, the data wire (M_SDA) of I2C bus.Do not start shooting or be only independently in mainboard situation at TV, because M_SCL, the M_SDA of I2C bus have connect multiple I2C devices, may make M_SCL, M_SDA in low impedance state, if do not isolated directly, EP_SCL, EP_SDA are connected and make EP_SCL, EP_SDA also in low impedance state with M_SCL, M_SDA, be that I2C bus can not be worked, cannot do not start shooting or be only in the eeprom memory that independently machine bar code, HDCP KEY, MAC Address programming entered in mainboard situation at TV.
Specific embodiment of the utility model is,
As shown in Figure 2,
1. do not start shooting or be only independently in mainboard situation at TV: the voltage M_VCC of mainboard is 0V, the b utmost point (base stage) that makes NPN triode Q1 is 0V, Q1 cut-off; The voltage M_VCC1 of mainboard is also 0V, and the G utmost point (grid) of NMOS pipe MOS1 and MOS2 is 0V, MOS1 and MOS2 cut-off.If connecting external equipment, CN1 carries out the programming of machine bar code, HDCPKEY, MAC Address: external equipment provides VCC power supply to power for eeprom memory U1 provides EP_VCC, and Q1 ends EP_VCC can not be passed to M_VCC by Q1 after R9.It is very large that MOS1 and MOS2 end impedance, also can not affect the signal condition on EP_SDA, EP_SCL even if M_SCL, M_SDA are low level; And M_WP is generally high impedance, the signal condition of EP_WP is not affected substantially; External equipment drags down WP that to make EP_WP be low level, eeprom memory U1 is in writing data mode, I2C bus signals SDA, SCL that further external equipment provides carry out communication by EP_SDA, EP_SCL and eeprom memory U1 respectively after R7, R8, and machine bar code, HDCP KEY, MAC Address programming are entered in U1.
Therefore, realized at TV and do not started shooting or be only independently programming machine bar code, HDCP KEY, MAC Address in mainboard situation; Cut off EP_VCC and be passed to M_VCC, power consumption while having saved programming, prevented that M_VCC short circuit from causing the damage of external equipment; And isolated EP_SCL, EP_SDA and M_SCL, M_SDA, and while avoiding M_SCL, M_SDA to be Low ESR, EP_SCL, EP_SDA are drawn as low level, EP_SCL, EP_SDA bus can not be worked.
2. in the time that television startup normally moves: if do not connect external equipment, M_VCC makes the b pole tension of Q1 be about EP_VCC+0.7V, Q1 conducting after by R2, R3 dividing potential drop, power supply control module 12 provides power supply EP_VCC voltage for U1, draws voltage by R6, R5, R4 for EP_SCL, EP_SDA, EP_WP provide simultaneously.Now M_VCC1 magnitude of voltage is higher than M_VCC, make the G utmost point of MOS1, MOS2 and the pressure drop of S interpolar be greater than the threshold voltage of NMOS, MOS1, MOS2 saturation conduction, EP_SCL, EP_SDA link together with M_SCL, M_SDA respectively, the TV SOC output read-write control signal of TV is controlled the read-write state of U1 after R11 by EP_WP, further read and write U1 by I2C bus M_SCL, M_SDA or EP_SCL, EP_SDA.
If now accessed external equipment, if the VCC that external equipment provides is higher than M_VCC, VCC provides EP_VCC to make EP_VCC also higher than M_VCC by R9, the e pole tension of Q1 is higher than b pole tension, Q1 cut-off, EP_VCC can not, to M_VCC reverse irrigated current, prevent the damage of TV motherboard or external equipment.
The disclosed a kind of TV of the utility model is at line writing circuit,
1. can in the cold situation of TV, machine bar code, HDCP KEY, MAC Address programming be entered in the EEPROM storage of mainboard, thereby or do not need whole set of television and only just TV motherboard is independently carried out to programming and machine bar code, HDCPKEY, MAC Address programming are entered in the EEPROM storage of mainboard;
2. can arrange flexibly station and the operation of TV production programming, programming is simple to operation, reduced labour intensity, improved efficiency, reduced cost, saved electric energy, simultaneously succinctly reasonable, reliable and stable, is with a wide range of applications.
Be noted that, the above embodiment is explanation to technical solutions of the utility model and unrestricted, other amendments that are equal to replacement or make according to prior art of affiliated technical field those of ordinary skill, as long as do not exceed thinking and the scope of technical solutions of the utility model, within all should being included in the desired interest field of the utility model.
Claims (5)
1. TV, at a line writing circuit, is characterized in that: comprising:
Programming interface module, programming interface module receives voltage, read-write control signal and I2C bus signals clock cable and the data wire of external equipment output;
Power supply control module, power supply control module receives the power supply of TV motherboard and processes, in the time that television startup normally moves, output voltage is to EEPROM memory module and will after the power supply of TV motherboard and television startup, export to the voltage isolation of EEPROM memory module;
EEPROM memory module, EEPROM memory module is under the control of control signal, in eeprom memory machine bar code, HDCP KEY, MAC Address programming being entered by the clock cable of EEPROM memory module and the data wire bus signals of EEPROM memory module, and carry out communication with television system chip;
Signal isolation module, control signal and the I2C bus control signal of signal isolation module isolation EEPROM memory module, the clock cable of the clock cable of bus signals EEPROM memory module, the data wire of EEPROM memory module and I2C bus, the data wire of I2C bus;
Television system chip and I2C bus device;
The output of described power supply control module is connected with the inlet circuit of described EEPROM memory module, the output of described programming interface module is connected with the inlet circuit of described EEPROM memory module, described signal isolation module, and the output of described signal isolation module is connected with described television system chip, described I2C bus device circuit.
2. a kind of TV according to claim 1 is at line writing circuit, it is characterized in that: described programming interface module comprises: interface CN1, resistance R 7, resistance R 8, resistance R 9, resistance R 10, described interface CN1 comprises that 5 connect pin, the 1st pin contact resistance R7, the 2nd pin contact resistance R8, the 3rd pin ground connection, the 4th pin contact resistance R9, the 5th pin contact resistance R10.
3. a kind of TV according to claim 2 is at line writing circuit, it is characterized in that: described power supply control module comprises: NPN triode, resistance R 1, resistance R 2, resistance R 3, the c utmost point contact resistance R1 of described NPN triode, the b utmost point contact resistance R2 of described NPN triode, the intermediate node of R3, described R3 ground connection.
4. a kind of TV according to claim 3 is at line writing circuit, it is characterized in that: described EEPROM memory module comprises: EEPROM storage chip U1, resistance R 4, resistance R 5, resistance R 6, described EEPROM storage chip U1 comprises that 8 connect pin, 1st, 2,3,4 pin ground connection, the 5th pin contact resistance R6, the 6th pin contact resistance R5, the 7th pin contact resistance R5, the 8th pin is connected with the e utmost point of described NPN triode.
5. a kind of TV according to claim 4 is at line writing circuit, it is characterized in that: described signal isolation module comprises: NMOS pipe MOS1, NMOS pipe MOS2, resistance R 11, the D utmost point of described NMOS pipe MOS1 is connected with the intermediate node of resistance R 5, R8, the D utmost point of described NMOS pipe MOS2 is connected with the intermediate node of resistance R 6, R7, the S of described NMOS pipe MOS1, NMOS pipe MOS2 is extremely all connected with I2C bus device, and described resistance R 11 is connected with the intermediate node of resistance R 2, R3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420107430.9U CN203761526U (en) | 2014-03-10 | 2014-03-10 | Television online programming circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420107430.9U CN203761526U (en) | 2014-03-10 | 2014-03-10 | Television online programming circuit |
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| Publication Number | Publication Date |
|---|---|
| CN203761526U true CN203761526U (en) | 2014-08-06 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201420107430.9U Expired - Lifetime CN203761526U (en) | 2014-03-10 | 2014-03-10 | Television online programming circuit |
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| CN (1) | CN203761526U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105575426A (en) * | 2014-10-08 | 2016-05-11 | 无锡华润矽科微电子有限公司 | On-line programming circuit of embedded memory, and control method thereof |
| CN106250951A (en) * | 2016-08-25 | 2016-12-21 | 广东万家乐燃气具有限公司 | A kind of electronic barcode application process of gas heater |
| CN110737443A (en) * | 2018-07-20 | 2020-01-31 | 天津宝盈电脑机械有限公司 | anti-interference ST-LINK isolation writer |
| CN114895612A (en) * | 2022-07-11 | 2022-08-12 | 深圳市杰美康机电有限公司 | Simulation system and simulation control method for DSP chip |
-
2014
- 2014-03-10 CN CN201420107430.9U patent/CN203761526U/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105575426A (en) * | 2014-10-08 | 2016-05-11 | 无锡华润矽科微电子有限公司 | On-line programming circuit of embedded memory, and control method thereof |
| CN105575426B (en) * | 2014-10-08 | 2019-07-12 | 无锡华润矽科微电子有限公司 | A kind of the online programming circuit and its control method of embedded flash memory |
| CN106250951A (en) * | 2016-08-25 | 2016-12-21 | 广东万家乐燃气具有限公司 | A kind of electronic barcode application process of gas heater |
| CN110737443A (en) * | 2018-07-20 | 2020-01-31 | 天津宝盈电脑机械有限公司 | anti-interference ST-LINK isolation writer |
| CN114895612A (en) * | 2022-07-11 | 2022-08-12 | 深圳市杰美康机电有限公司 | Simulation system and simulation control method for DSP chip |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20140806 |