CN206179015U

CN206179015U - Image registration controlling means based on FPGA

Info

Publication number: CN206179015U
Application number: CN201621132514.3U
Authority: CN
Inventors: 夏猛; 李国民
Original assignee: Xian University of Science and Technology
Current assignee: Xian University of Science and Technology
Priority date: 2016-10-18
Filing date: 2016-10-18
Publication date: 2017-05-17
Anticipated expiration: 2026-10-18

Abstract

The utility model discloses an image registration controlling means based on FPGA, including FPGA treater, power module, a camera module and the 2nd camera module to and liquid crystal touch screen, data memory and communication module, the input termination of FPGA treater is clock circuit, weather detection module and light intensity sensor sometimes, the output termination of FPGA treater has FMC interface module, a servo module and the 2nd servo module to and illumination device and pilot lamp, a camera module includes the first camera of taking the photograph, the first camera of taking the photograph control module and first receiver, the second camera module includes second camera, second camera control module and second receiver. The utility model discloses simple structure realizes the image registration under the multiple condition, and the image registration result accuracy for further image processing and analysis provide is ensured in easy extension, and can directly perceivedly look over the effect behind the image registration.

Description

A kind of image registration control device based on FPGA

Technical field

This utility model belongs to image registration techniques field, and in particular to a kind of image registration control dress based on FPGA Put.

Background technology

Image registration is by (weather, illumination, camera position or angle under different time, different cameras or different condition Deng) two width that obtain or multiple image carry out spatial alternation process so that each image is mapped geometrically can matching. The purpose of image registration be remove it is inconsistent geometrically between image subject to registration and reference picture, including translation, rotation and Deformation, is that further image procossing is prepared.It is the committed step of image procossing and analysis, is that image comparison, data are melted The prerequisite of conjunction, mutation analysises and target recognition.But at present image registration device is mainly processed using single-chip microcomputer, with The continuous improvement of image data transmission rate and complexity, the processing speed of single-chip microcomputer is slower, it is impossible to while carrying out multinomial place Reason, while being also easy to produce crash site, it is impossible to have timely completed image outfit, so as to slow down the speed of image procossing and analysis, It is unfavorable for monitoring or Production requirement at present.Secondly, during different cameras collection video image, easily there is terminal signaling Reflection, so as to affect the transmission quality of video signal, it is impossible to which guarantee video signal completes whole, it is impossible to for follow-up Image procossing and analysis provide high-quality view data, so as to cause image procossing and analysis mistake；In addition, at present image is matched somebody with somebody Standard apparatus are relatively simple, are only capable of realizing carrying out image registration in the case of different time and different cameras, and Different climate condition, Image registration dependence test can not be carried out in the case of different illuminance and camera position or angle difference；Furthermore, at present Image registration device should not be extended, it is impossible to meet the requirement of a large amount of registering view data outputs, reduce registering dress The recycling rate of waterused put.Therefore, a kind of simple structure, easy to operate, low cost are nowadays lacked, it is reasonable in design based on FPGA Image registration control device, realize the registration of various condition hypographs, easily extension, and can intuitively check registering image, it is ensured that The image registration results provided for further image procossing and analysis are accurate.

Utility model content

Technical problem to be solved in the utility model is to be directed to above-mentioned deficiency of the prior art, there is provided one kind is based on The image registration control device of FPGA, it is novel in design rationally, and simple structure, easy to operate and low cost realize various conditions Under image registration, easily extension, and the effect that can intuitively check after image registration, it is ensured that be that further image procossing and analysis are carried For image registration results accurately, it is practical, be easy to promote the use of.

To solve above-mentioned technical problem, the technical solution adopted in the utility model is：A kind of image registration based on FPGA Control device, it is characterised in that：Including FPGA processor, power module, the first camara module and the second camara module, with And liquid crystal touch screen, data storage and the communication module connected with FPGA processor, the FPGA processor is by the mould that communicates Block carries out bidirectional data communication with PC, and the input of the FPGA processor is terminated with clock circuit, meteorological detection module and light According to sensor, the output of the FPGA processor is terminated with FMC interface modules, rotates for controlling first camara module The first steering wheel module and for controlling the second steering wheel module that second camara module is rotated and described for adjusting First camara module and the illumination apparatus of illuminance residing for the second camara module and for being indicated power module Display lamp, first camara module includes the first video camera control that the first video camera connects with the first camera input Molding block and the first receptor connected with the first video camera outfan, second camara module include the second video camera, The the second camera control module connected with the second camera input and the second reception connected with the second video camera outfan Device, the first camera control module and the second camera control module by FPGA processor be controlled and with FPGA at Reason device connection, the outfan of first receptor and the second receptor connects with the input of FPGA processor, and described the One steering wheel module is connected with the first video camera, and the second steering wheel module is connected with the second video camera.

A kind of above-mentioned image registration control device based on FPGA, it is characterised in that：The first camera control mould 1st pin of the chip DS1 of block including model DS90LV031A, the chip DS1, the 4th pin, the 7th pin, the 9th pin, 12nd pin and the 15th pin connect with FPGA processor, the 2nd pin point two-way of the chip DS1, all the way with resistance R3 One end connect, another road connects with the first video camera；3rd pin of the chip DS1 point two-way, it is another with resistance R3 all the way One end connects, and another road connects with the first video camera；5th pin of the chip DS1 point two-way, all the way with one end of resistance R4 Connect, another road connects with the first video camera；6th pin of the chip DS1 point two-way, all the way with the other end phase of resistance R4 Connect, another road connects with the first video camera；10th pin of the chip DS1 point two-way, connects all the way with one end of resistance R6, Another road connects with the first video camera；11st pin of the chip DS1 point two-way, connects all the way with the other end of resistance R6, Another road connects with the first video camera；13rd pin of the chip DS1 point two-way, connects all the way, separately with one end of resistance R5 Connect with the first video camera all the way；14th pin of the chip DS1 point two-way, connects all the way, separately with the other end of resistance R5 Connect with the first video camera all the way.

A kind of above-mentioned image registration control device based on FPGA, it is characterised in that：The second camera control mould 1st pin of the chip DS2 of block including model DS90LV031A, the chip DS2, the 4th pin, the 7th pin, the 9th pin, 12nd pin and the 15th pin connect with FPGA processor, the 2nd pin point two-way of the chip DS2, all the way with resistance R7 One end connect, another road connects with the second video camera；3rd pin of the chip DS2 point two-way, it is another with resistance R7 all the way One end connects, and another road connects with the second video camera；5th pin of the chip DS2 point two-way, all the way with one end of resistance R8 Connect, another road connects with the second video camera；6th pin of the chip DS2 point two-way, all the way with the other end phase of resistance R8 Connect, another road connects with the second video camera；10th pin of the chip DS2 point two-way, all the way with one end phase of resistance R10 Connect, another road connects with the second video camera；11st pin of the chip DS2 point two-way, all the way with the other end phase of resistance R10 Connect, another road connects with the second video camera；13rd pin of the chip DS2 point two-way, connects all the way with one end of resistance R9, Another road connects with the second video camera；14th pin of the chip DS2 point two-way, connects all the way with the other end of resistance R9, Another road connects with the second video camera.

A kind of above-mentioned image registration control device based on FPGA, it is characterised in that：First receptor and second Receptor includes chip DS90CR288A.

A kind of above-mentioned image registration control device based on FPGA, it is characterised in that：The communication module includes RS422 Serial interface circuit.

A kind of above-mentioned image registration control device based on FPGA, it is characterised in that：The clock circuit includes chip DS1302。

A kind of above-mentioned image registration control device based on FPGA, it is characterised in that：The power module includes chip Three tunnels of the Vin pins of LM7805 and chip AMS1117-3.3V, the chip LM7805 point, all the way with 12V power output end phases Connect, another road Jing electric capacity C1 ground connection, the 3rd tunnel connects with a fixing end of swept resistance R1；The swept resistance R1's is another The connection end of the sliding end of individual fixing end and swept resistance R1 connects with the anode of light emitting diode D1, the chip LM7805's Vout pins point three tunnels electric capacity C3 Jing in parallel all the way and electric capacity C2 ground connection, a fixing end phase of another road and swept resistance R2 Connect, the 3rd tunnel connects with the Vin pins of chip AMS1117-3.3V；Another fixing end of the swept resistance R2 and the electricity that slides The connection end of the sliding end of resistance R2 connects with the anode of light emitting diode D2, the negative electrode and light-emitting diodes of the light emitting diode D1 The negative electrode of pipe D2 is grounded, the Vout pins point two-way of the chip AMS1117-3.3V, all the way electric capacity C4 Jing in parallel and electricity Hold C5 ground connection, another road is 3.3V power output ends.

A kind of above-mentioned image registration control device based on FPGA, it is characterised in that：The optical sensor includes QY- 150A optical sensors.

A kind of above-mentioned image registration control device based on FPGA, it is characterised in that：The FPGA processor includes core Piece XC4VSX55.

This utility model has compared with prior art advantages below：

1st, this utility model is by arranging the first steering wheel module and the second steering wheel module, and the first video camera and the are controlled respectively The rotational angle of two video cameras, changes the position of the first video camera and the second video camera, and the first steering wheel module and the second steering wheel Module adjusts angle accurately, convenient detection, and by arranging illumination apparatus, can be adjusted according to image registration test condition, Adjust it is convenient, realize it is various under the conditions of image registration.

2nd, this utility model passes through to arrange the first camera control module and the second camera control module, respectively by FPGA The control signal of processor is converted to the first video camera and the discernible control signal of the second video camera, so as to realize taking the photograph to first The control of camera and the second video camera, it is ensured that the first video camera and the second shooting function normal work, completes vedio data Collection, be easy to FPGA processor to carry out image registration.

3rd, this utility model is by arranging the first receptor and the second receptor, the first video camera and the second camera acquisition To video signal be respectively converted into signal that FPGA processor can recognize and send to FPGA processor and complete image Collection, by arranging the first receptor and the second receptor the transmitting of FPGA processor terminal signaling can be reduced, and improve video figure As the completing property of signal, it is ensured that the picture quality of image registration is high, improve image registration accuracy, be easy to successive image to process and Analysis.

4th, this utility model realizes the image that the first video camera and the second camera acquisition are arrived by arranging FPGA processor Image registration is carried out, registering speed is fast, is not susceptible to the failures such as deadlock, by arranging FMS interface modules, makes image registration device Preferably it is attached with other equipment, convenient extension, and meets the requirement of a large amount of registering view data outputs, improves image registration The recycling rate of waterused of device, circuit is simple, is easy to promote the use of.

In sum, this utility model is novel in design rationally, and simple structure, easy to operate and low cost realize various Image registration under part, easily extension, and the effect that can intuitively check after image registration, it is ensured that for further image procossing and analysis The image registration results of offer are accurately, practical, are easy to promote the use of.

Below Jing drawings and Examples, are described in further detail to the technical solution of the utility model.

Description of the drawings

Fig. 1 is schematic block circuit diagram of the present utility model.

Fig. 2 is the circuit theory diagrams of this utility model the first camera control module.

Fig. 3 is the circuit theory diagrams of this utility model the second camera control module.

Fig. 4 is the circuit theory diagrams of this utility model power module.

Description of reference numerals:

1-FPGA processor；2-the first video camera；3-the first steering wheel module；

4-the first camera control module；5-the first receptor；6-the second video camera；

7-the second steering wheel module；8-the second camera control module；9-the second receptor；

10-clock circuit；11-meteorological detection module；12-communication module；

13-liquid crystal touch screen；14-display lamp；15-data storage；

16-FMC interface modules；17-illumination apparatus；18-optical sensor；

19-PC；20-power module.

Specific embodiment

As shown in figure 1, this utility model includes that FPGA processor 1, power module 20, the first camara module and second are taken the photograph Camera module, and liquid crystal touch screen 13, data storage 15 and the communication module 12 connected with FPGA processor 1, it is described FPGA processor 1 carries out bidirectional data communication by communication module 12 and PC 19, and the input of the FPGA processor 1 is terminated with Clock circuit 10, meteorological detection module 11 and optical sensor 18, the output of the FPGA processor 1 is terminated with FMC interface moulds Block 16, for controlling the first steering wheel module 3 that first camara module rotates and for controlling the second video camera mould The second steering wheel module 7 that block is rotated, and for adjusting first camara module and illumination residing for the second camara module The illumination apparatus 17 of degree and the display lamp 14 for being indicated power module 20, first camara module includes first The first camera control module 4 and connect with the outfan of the first video camera 2 that video camera 2 connects with the input of the first video camera 2 The first receptor 5, second camara module include the second video camera 6 connect with the input of the second video camera 6 second Camera control module 8 and the second receptor 9 connected with the outfan of the second video camera 6, the first camera control module 4 It is controlled by FPGA processor 1 with the second camera control module 8 and is connected with FPGA processor 1, described first receives The outfan of the receptor 9 of device 5 and second connects with the input of FPGA processor 1, and the first steering wheel module 3 is taken the photograph with first Camera 2 connects, and the second steering wheel module 7 is connected with the second video camera 6.

As shown in Fig. 2 in the present embodiment, the first camera control module 4 includes the core of model DS90LV031A 1st pin of piece DS1, the chip DS1, the 4th pin, the 7th pin, the 9th pin, the 12nd pin and the 15th pin are and FPGA Processor 1 connects, the 2nd pin point two-way of the chip DS1, connects with one end of resistance R3 all the way, and another road is taken the photograph with first Camera 2 connects；3rd pin of the chip DS1 point two-way, connects all the way with the other end of resistance R3, and another road is taken the photograph with first Camera 2 connects；5th pin of the chip DS1 point two-way, connects all the way with one end of resistance R4, and another road images with first Machine 2 connects；6th pin of the chip DS1 point two-way, connects all the way with the other end of resistance R4, and another road images with first Machine 2 connects；10th pin of the chip DS1 point two-way, connects all the way with one end of resistance R6, another road and the first video camera 2 connect；11st pin of the chip DS1 point two-way, connects all the way with the other end of resistance R6, another road and the first video camera 2 connect；13rd pin of the chip DS1 point two-way, connects all the way with one end of resistance R5, another road and the first video camera 2 Connect；14th pin of the chip DS1 point two-way, connects all the way with the other end of resistance R5, another road and the first video camera 2 Connect.

As shown in figure 3, in the present embodiment, the second camera control module 8 includes the core of model DS90LV031A 1st pin of piece DS2, the chip DS2, the 4th pin, the 7th pin, the 9th pin, the 12nd pin and the 15th pin are and FPGA Processor 1 connects, the 2nd pin point two-way of the chip DS2, connects with one end of resistance R7 all the way, and another road is taken the photograph with second Camera 2 connects；3rd pin of the chip DS2 point two-way, connects all the way with the other end of resistance R7, and another road is taken the photograph with second Camera 2 connects；5th pin of the chip DS2 point two-way, connects all the way with one end of resistance R8, and another road images with second Machine 2 connects；6th pin of the chip DS2 point two-way, connects all the way with the other end of resistance R8, and another road images with second Machine 2 connects；10th pin of the chip DS2 point two-way, connects all the way with one end of resistance R10, and another road images with second Machine 2 connects；11st pin of the chip DS2 point two-way, connects all the way with the other end of resistance R10, and another road is taken the photograph with second Camera 2 connects；13rd pin of the chip DS2 point two-way, connects all the way with one end of resistance R9, and another road images with second Machine 2 connects；14th pin of the chip DS2 point two-way, connects all the way with the other end of resistance R9, and another road images with second Machine 2 connects.

In the present embodiment, the receptor 9 of first receptor 5 and second includes chip DS90CR288A.

In the present embodiment, the communication module 12 includes RS422 serial interface circuits.

In the present embodiment, the clock circuit 10 includes chip DS1302.

As shown in figure 4, in the present embodiment, the power module 20 includes chip LM7805 and chip AMS1117-3.3V, Three tunnels of the Vin pins of the chip LM7805 point, connect all the way with 12V power output ends, another road Jing electric capacity C1 ground connection, and the 3rd Road connects with a fixing end of swept resistance R1；Another fixing end of the swept resistance R1 and the slip of swept resistance R1 The connection end at end connects with the anode of light emitting diode D1, and all the way Jing is in parallel for the Vout pins of the chip LM7805 point three tunnels Electric capacity C3 and electric capacity C2 are grounded, and another road connects with a fixing end of swept resistance R2, the 3rd tunnel and chip AMS1117- The Vin pins of 3.3V connect；The connection end of another fixing end of the swept resistance R2 and the sliding end of swept resistance R2 with The anode of light emitting diode D2 connects, and the negative electrode of the light emitting diode D1 and the negative electrode of light emitting diode D2 are grounded, described The Vout pins of chip AMS1117-3.3V divide two-way, all the way electric capacity C4 Jing in parallel and electric capacity C5 ground connection, and another road is 3.3V Power output end.

In the present embodiment, the optical sensor 18 includes QY-150A optical sensors.

In the present embodiment, the FPGA processor 1 includes chip XC4VSX55.

When this utility model is used, power module 20 is that FPGA processor 1 provides power supply, and FPGA processor 1 enters work State, the control display lamp 14 of FPGA processor 1 is bright, and FPGA processor 1 is by the first camera control module 4 and the second video camera Control module 8 controls respectively the first video camera 2 and the second video camera 6 works, when carrying out image registration under the conditions of different time When, two sampling times are set by liquid crystal touch screen 13, clock circuit 10 works, when two sampling times for reaching setting When, the first video camera 2 or the second video camera 6 carry out image acquisition and by the image for collecting through the first receptor 5 or the second The process of receptor 9 sends to FPGA processor 1 and carries out image registration；When image registration is carried out under the conditions of different cameras, FPGA processor 1 controls the first video camera 2 and the second video camera 6 works simultaneously, and the first video camera 2 and the second video camera 6 are same The image that moment collects sends to FPGA processor 1 and carries out image registration；When entering under different camera angles or locality condition During row image registration, two camera angles or position are preset by liquid crystal touch screen 13, FPGA processor 1 drives the first rudder The steering wheel module 7 of machine module 3 or second works, and the first video camera 2 of control of the first steering wheel module 3 is rotated or the second steering wheel module 7 is controlled Make the second video camera 6 to rotate, when the first video camera 2 or the second video camera 6 turn to two camera angles set in advance or position When putting, FPGA processor 1 controls the first video camera 2 or the collection image of the second video camera 6 and images in the first video camera 2 or second The image that machine 6 is collected sends to FPGA processor 1 and carries out image registration；When image registration is carried out under same illumination, liquid Brilliant touch screen 13 presets illuminance setting value, real-time detection the first video camera 2 of optical sensor 18 and the institute of the second video camera 6 The illuminance at place simultaneously sends the illuminance for collecting to FPGA processor 1, when the illuminance setting value of setting is reached, FPGA Processor 1 controls the first video camera 2 or the collection image of the second video camera 6 and collects in the first video camera 2 or the second video camera 6 Image send to FPGA processor 1 and carry out image registration；When image registration is carried out under same meteorological condition, pass through Liquid crystal touch screen 13 sets in advance meteorologic parameter setting value, the first video camera of real-time detection 2 of meteorological detection module 11 and the second shooting Meteorologic parameter residing for machine 6 simultaneously sends the meteorologic parameter for collecting to FPGA processor 1, when reaching meteorological ginseng set in advance During number setting value, FPGA processor 1 controls the first video camera 2 or the collection image of the second video camera 6 and by the first video camera 2 or the The image that two video cameras 6 are collected sends to FPGA processor 1 and carries out image registration, realize it is various under the conditions of image registration, FPGA processor 1 is stored in registering image in data storage 15 after image registration, and FPGA processor 1 can pass through FMC Interface module 16 is attached with other equipment, convenient extension, and meets the requirement of a large amount of registering view data outputs, improves Simultaneously, FPGA processor 1 can also show registering figure by liquid crystal touch screen 13 for the recycling rate of waterused of image registration device, easily extension Picture, the effect that can intuitively check after image registration, it is ensured that the image registration results provided for further image procossing and analysis are accurate Really, the synchronous transmission to PC 19 by communication module 12 of FPGA processor 1 carries out successive image process and analysis, practical.

The above, is only preferred embodiment of the present utility model, and not this utility model is imposed any restrictions, every Above example is made any simple modification, change and equivalent structure change according to this utility model technical spirit, still Belong in the protection domain of technical solutions of the utility model.

Claims

1. a kind of image registration control device based on FPGA, it is characterised in that：Including FPGA processor (1), power module (20), the first camara module and the second camara module, and connect with FPGA processor (1) liquid crystal touch screen (13), Data storage (15) and communication module (12), the FPGA processor (1) is carried out by communication module (12) with PC (19) Bidirectional data communication, the input of the FPGA processor (1) is terminated with clock circuit (10), meteorological detection module (11) and illumination Sensor (18), the output of the FPGA processor (1) is terminated with FMC interface modules (16), images for controlling described first The first steering wheel module (3) that machine module is rotated and the second steering wheel module (7) for controlling the second camara module rotation, And for adjusting the illumination apparatus (17) of first camara module and illuminance residing for the second camara module and being used for The display lamp (14) indicated power module (20), first camara module includes the first video camera (2) and first The first camera control module (4) that video camera (2) input connects and first connecing of connecting with the first video camera (2) outfan Device (5) is received, second camara module is taken the photograph including the second video camera (6) connects with the second video camera (6) input second Camera control module (8) and the second receptor (9) connected with the second video camera (6) outfan, first camera control Module (4) and the second camera control module (8) are controlled by FPGA processor (1) and are connected with FPGA processor (1), The outfan of first receptor (5) and the second receptor (9) connects with the input of FPGA processor (1), and described One steering wheel module (3) is connected with the first video camera (2), and the second steering wheel module (7) is connected with the second video camera (6).

2. according to a kind of image registration control device based on FPGA described in claim 1, it is characterised in that：Described first takes the photograph 1st pin of the chip DS1 of camera control module (4) including model DS90LV031A, the chip DS1, the 4th pin, the 7th Pin, the 9th pin, the 12nd pin and the 15th pin connect with FPGA processor (1), and the 2nd pin of the chip DS1 is divided to two Road, connects all the way with one end of resistance R3, and another road connects with the first video camera (2)；3rd pin of the chip DS1 is divided to two Road, connects all the way with the other end of resistance R3, and another road connects with the first video camera (2)；5th pin of the chip DS1 point Two-way, connects all the way with one end of resistance R4, and another road connects with the first video camera (2)；6th pin of the chip DS1 point Two-way, connects all the way with the other end of resistance R4, and another road connects with the first video camera (2)；10th pin of the chip DS1 Divide two-way, connect with one end of resistance R6 all the way, another road connects with the first video camera (2)；11st pin of the chip DS1 Divide two-way, connect with the other end of resistance R6 all the way, another road connects with the first video camera (2)；Draw the 13rd of the chip DS1 Foot point two-way, connects all the way with one end of resistance R5, and another road connects with the first video camera (2)；Draw the 14th of the chip DS1 Foot point two-way, connects all the way with the other end of resistance R5, and another road connects with the first video camera (2).

3. according to a kind of image registration control device based on FPGA described in claim 1 or 2, it is characterised in that：Described Two camera control modules (8) include the chip DS2 of model DS90LV031A, and the 1st pin of the chip DS2, the 4th are drawn Foot, the 7th pin, the 9th pin, the 12nd pin and the 15th pin connect with FPGA processor (1), and the 2nd of the chip DS2 draws Foot point two-way, connects all the way with one end of resistance R7, and another road connects with the second video camera (2)；Draw the 3rd of the chip DS2 Foot point two-way, connects all the way with the other end of resistance R7, and another road connects with the second video camera (2)；The 5th of the chip DS2 Pin point two-way, connects all the way with one end of resistance R8, and another road connects with the second video camera (2)；The 6th of the chip DS2 Pin point two-way, connects all the way with the other end of resistance R8, and another road connects with the second video camera (2)；The of the chip DS2 10 pins point two-way, connects all the way with one end of resistance R10, and another road connects with the second video camera (2)；The chip DS2's 11st pin point two-way, connects all the way with the other end of resistance R10, and another road connects with the second video camera (2)；The chip 13rd pin of DS2 point two-way, connects all the way with one end of resistance R9, and another road connects with the second video camera (2)；The chip 14th pin of DS2 point two-way, connects all the way with the other end of resistance R9, and another road connects with the second video camera (2).

4. according to a kind of image registration control device based on FPGA described in claim 1 or 2, it is characterised in that：Described One receptor (5) and the second receptor (9) include chip DS90CR288A.

5. according to a kind of image registration control device based on FPGA described in claim 1 or 2, it is characterised in that：It is described logical Letter module (12) is including RS422 serial interface circuits.

6. according to a kind of image registration control device based on FPGA described in claim 1 or 2, it is characterised in that：When described Clock circuit (10) is including chip DS1302.

7. according to a kind of image registration control device based on FPGA described in claim 1 or 2, it is characterised in that：The electricity Source module (20) includes chip LM7805 and chip AMS1117-3.3V, and the Vin pins of the chip LM7805 divide three tunnels, all the way Connect with 12V power output ends, another road Jing electric capacity C1 ground connection, the 3rd tunnel connects with a fixing end of swept resistance R1；Institute State the connection end of another fixing end of swept resistance R1 and the sliding end of swept resistance R1 and the anode phase of light emitting diode D1 Connect, the Vout pins of the chip LM7805 divide three tunnels electric capacity C3 Jing in parallel all the way and electric capacity C2 ground connection, another road and slip One fixing end of resistance R2 connects, and the 3rd tunnel connects with the Vin pins of chip AMS1117-3.3V；The swept resistance R2's The connection end of the sliding end of another fixing end and swept resistance R2 connects with the anode of light emitting diode D2, the light-emitting diodes The negative electrode of pipe D1 and the negative electrode of light emitting diode D2 are grounded, the Vout pins point two-way of the chip AMS1117-3.3V, and one Electric capacity C4 and electric capacity C5 road Jing in parallel is grounded, and another road is 3.3V power output ends.

8. according to a kind of image registration control device based on FPGA described in claim 1 or 2, it is characterised in that：The light According to sensor (18) including QY-150A optical sensors.

9. according to a kind of image registration control device based on FPGA described in claim 1 or 2, it is characterised in that：It is described FPGA processor (1) is including chip XC4VSX55.