CN206178773U - Modified NVME SSD test fixture - Google Patents

Modified NVME SSD test fixture Download PDF

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Publication number
CN206178773U
CN206178773U CN201621229375.6U CN201621229375U CN206178773U CN 206178773 U CN206178773 U CN 206178773U CN 201621229375 U CN201621229375 U CN 201621229375U CN 206178773 U CN206178773 U CN 206178773U
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CN
China
Prior art keywords
connector
nvme
snp
pcb
signals
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Expired - Fee Related
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CN201621229375.6U
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Chinese (zh)
Inventor
朱黎
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Zhengzhou Yunhai Information Technology Co Ltd
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Zhengzhou Yunhai Information Technology Co Ltd
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Priority to CN201621229375.6U priority Critical patent/CN206178773U/en
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Publication of CN206178773U publication Critical patent/CN206178773U/en
Expired - Fee Related legal-status Critical Current
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Abstract

The utility model provides a modified NVME SSD test fixture belongs to the testing tool field, its PCB board that adopts a bilayer, the NVME connector of standard in the welding. According to NVME connector's pin preface definition, draw forth TX, RX and CLK signal, TXRX signal lug connection is on SNP connector, and the CLK signal is at first connected on SNP connector, increases the switch switching circuit at the back. The utility model discloses direct walk the line connection through PCB and to the test equipment, realize measurationing, debugging of PCIE signal quality, adopt SNP connector, occupation space reduces, practices thrift the PCB cost, possesing speed and switching the module, the test that can comprehensively cover the PCIE signal, and not coordinating with the help of external equipment provides strong technical guarantee for NVME SSD's research and development and debugging.

Description

A kind of improved NVME SSD measurement jigs
Technical field
This utility model is related to testing tool field, specifically a kind of improved NVME SSD measurement jigs.
Background technology
Used as conventional memory device, development in recent years is not very rapid to hard disk, but with the appearance of solid state hard disc, is opened Begin the development for making people joyful, the thing followed is to have driven the hard-disk interface speed of development, and the law of development of things is exactly old Things breeds new things in innovation, and best replacement old thing is selected in the survival of the fittest.
The interface of hard disk develops similarly in this way, needs the development for accelerating to adapt to the progress of other products.Current solid-state Mainly based on SAS, SAS buses use embedded clock signal to the interface that hard disk is applied, and possess higher error correcting capability, The difference of its maximum compared with the past is can be to transmission instruction(Not exclusively data)Checked, if it find that mistake can be certainly Dynamic correction, something which increases the reliability of data transfer.
Serial line interface also has the advantages that simple structure, supports hot plug.But SAS limits the transmission speed of hard disk In 300 MB/s(Write)、500 MB/s(Read)This rank is difficult to be lifted again, cannot meet consumer to hard disk speed Expectation.
And PCIE interfaces can bring up to one data transmission rate
Very high frequency, reaches the SAS high bandwidths to be provided, thus SSD walk PCIE interfaces have one it is most direct Benefit, breaks through the transmission speed of mono- 600 MB/s of the current Gbps of SAS 6.0.
Nowadays, it is proposed much using the product of PCIE SSD, in performance, possesses the ultimate attainment read-write effect for surmounting imagination Energy.Chip manufacturer is also strongly promoting PCIE SSD, and future has been trend of the times using PCIE SSD, but at present industry is also The PCIE SSD measurement jigs of standard are not provided.
The content of the invention
Technical assignment of the present utility model is for the deficiencies in the prior art, there is provided a kind of improved NVME SSD tests are controlled Tool, by the PCIE signal measurement jig to simple NVME SSD interfaces be improved with it is perfect, increased speed handover module, Simplify test, the exploitation for the technology of PCIE SSD provides sound assurance.
This utility model solves the technical scheme that its technical problem adopted:
A kind of improved NVME SSD measurement jigs, including a pcb board, pcb board is the bilayer that top layer and bottom are constituted Structure, wherein top layer as TX signals and CLK signal routing layer, bottom as RX signals routing layer, in pcb board not cabling Part paving copper;
NVME Connector, SNP Connector and Switch switching circuits are separately set on pcb board, according to NVME The Pin sequences definition of Connector, TX signals, CLK signal and RX signals are drawn, and TX signals, RX signals are connected to SNP On Connector, CLK signal is firstly connected on SNP Connector, is then attached to Switch switching circuits.
Further, the TX signals, RX signal Jing PCB traces are connected to P, the N-terminal of correspondence SNP Connector.
Further, CLK signal Jing PCB traces first are connected to P, the N-terminal of correspondence SNP Connector, then Jing PCB traces are connected to Switch switching circuits.
Further, the PCB trace is the differential signal line of 100 ohm impedance matchings, P, N of each pair differential signal line Length discrepancy is controlled within 1 mil.
Further, NVME Connector fixing holes are reserved on the pcb board, NVME Connector are welded on PCB On the reserved NVME Connector fixing holes of plate.
Further, SNP Connector fixing holes are reserved on the pcb board, SNP Connector are welded on pcb board On reserved SNP Connector fixing holes.
Further, the Switch switching circuits include Switch switching devices and pull-up electric capacity.
A kind of improved NVME SSD measurement jigs of the present utility model, compared with prior art produced beneficial effect It is:
This utility model meets the NVME Connector of PCIE interface standards using the pcb board of a bilayer in welding. Pin sequences according to NVME Connector are defined, and TX, RX and CLK signal are drawn, and TX/RX signals are connected directly between SNP On Connector, CLK signal is connected to first on SNP Connector, behind increase Switch switching circuits.This practicality is new Type directly can be connected in test equipment by SNP cables, realize measurement, the debugging of PCIE signal quality;Using SNP Connector, take up room reduction, saves PCB costs;Possess speed handover module, can comprehensively cover the test of PCIE signal, And do not coordinate by external device, the research and development and debugging for PCIE SSD products provide strong technical support.
Description of the drawings
Accompanying drawing 1 is main structure diagram of the present utility model;
Accompanying drawing 2 is main structure diagram of the present utility model;
Accompanying drawing 3 is main structure diagram of the present utility model;
Accompanying drawing 4 is main structure diagram of the present utility model;
Accompanying drawing 5 is main structure diagram of the present utility model.
In figure, 1, top layer, 2, bottom, 3, SNP Connector, 4, Switch switching circuits, 5, NVME Connector, 6th, pcb board, 7, PCB trace.
Specific embodiment
Below in conjunction with the accompanying drawings 1-5, says in detailed below to a kind of improved NVME SSD measurement jigs of the present utility model It is bright.
As shown in accompanying drawing 1,2,4,5, a kind of improved NVME SSD measurement jigs of the present utility model, including a PCB Plate 6, pcb board 6 is the double-decker that top layer 1 and bottom 2 are constituted, wherein top layer 1 as TX signals and the routing layer of CLK signal, Bottom 2 as RX signals routing layer, pcb board 6 not cabling part paving copper, on the one hand provide reference layer, a side for signal Face avoids PP gummosis problems.The NVME Connector 5, fixing hole of SNP Connector 3 and signal are reserved on pcb board 6 Mouthful, and the location hole of Switch switching circuits 4.
NVME Connector 5 are welded on the reserved NVME Connector fixing holes of pcb board 6, Layout is carried out Design, it is specific as follows:
As shown in Figure 3, according to NVME Connector 5 Pin sequences define, by TX+, TX-, RX+, RX-, CLK+, CLK- signal Jing PCB traces 7 are drawn, and are connected to P, the N-terminal of corresponding SNP Connector 3.Wherein TX signals are believed with CLK Number top layer 1 is placed on, RX signals are placed on bottom 2.CLK signal Jing PCB traces 7 are connected to P, N of corresponding SNP Connector 3 Behind end, then Jing PCB traces 7 are connected to Switch switching circuits 4, and Switch switching circuits 4 are by Switch switching parts and pull-up Electric capacity is constituted.
Finally, the standard in welding on the reserved fixing holes of SNP Connector 3 of differential signal line terminal, pcb board 6 SNP Connector 3.
Differentiate for convenience of when measuring, indicate the title of differential signal line respectively at board SNP Connector 3, such as TX LANE0 P、TX LANE0 N、RX LANE0 P、RX LANE0 N、REFCLK P、REFCLK N。
On the basis of said structure, PCB trace 7 for 100 ohm impedance matchings differential signal line, each pair differential signal The Length discrepancy of line P, N is controlled within 1mil.
A kind of improved NVME SSD measurement jigs of the present utility model, its processing and fabricating is simple and convenient, and by specification is attached Processing and fabricating shown in figure.
In addition to the technical characteristic described in description, the known technology of those skilled in the art is.

Claims (7)

1. a kind of improved NVME SSD measurement jigs, it is characterised in that including a pcb board, pcb board is top layer and bottom structure Into double-decker, wherein top layer as TX signals and CLK signal routing layer, bottom as RX signals routing layer, in PCB Plate not cabling part paving copper;
NVME Connector, SNP Connector and Switch switching circuits are separately set on pcb board, according to NVME The Pin sequences definition of Connector, TX signals, CLK signal and RX signals are drawn, and TX signals, RX signals are connected to SNP On Connector, CLK signal is firstly connected on SNP Connector, is then attached to Switch switching circuits.
2. a kind of improved NVME SSD measurement jigs according to claim 1, it is characterised in that the TX signals, RX Signal Jing PCB traces are connected to P, the N-terminal of correspondence SNP Connector.
3. a kind of improved NVME SSD measurement jigs according to claim 1, it is characterised in that the CLK signal is first First Jing PCB traces are connected to P, the N-terminal of correspondence SNP Connector, and then Jing PCB traces are connected to Switch switching circuits.
4. a kind of improved NVME SSD measurement jigs according to Claims 2 or 3, it is characterised in that the PCB trace For the differential signal line of 100 ohm impedance matchings, P, N Length discrepancy control of each pair differential signal line is within 1 mil.
5. a kind of improved NVME SSD measurement jigs according to claim 1,2 or 3, it is characterised in that the pcb board Upper reserved NVME Connector fixing holes, NVME Connector are welded on the reserved NVME Connector of pcb board and fix Kong Shang.
6. a kind of improved NVME SSD measurement jigs according to claim 1,2 or 3, it is characterised in that the pcb board Upper reserved SNP Connector fixing holes, SNP Connector are welded on the reserved SNP Connector fixing holes of pcb board On.
7. a kind of improved NVME SSD measurement jigs according to claim 1,2 or 3, it is characterised in that described Switch switching circuits include Switch switching devices and pull-up electric capacity.
CN201621229375.6U 2016-11-16 2016-11-16 Modified NVME SSD test fixture Expired - Fee Related CN206178773U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621229375.6U CN206178773U (en) 2016-11-16 2016-11-16 Modified NVME SSD test fixture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621229375.6U CN206178773U (en) 2016-11-16 2016-11-16 Modified NVME SSD test fixture

Publications (1)

Publication Number Publication Date
CN206178773U true CN206178773U (en) 2017-05-17

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Application Number Title Priority Date Filing Date
CN201621229375.6U Expired - Fee Related CN206178773U (en) 2016-11-16 2016-11-16 Modified NVME SSD test fixture

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107390065A (en) * 2017-08-04 2017-11-24 郑州云海信息技术有限公司 A kind of PCH method of testings
CN109121286A (en) * 2018-10-11 2019-01-01 郑州云海信息技术有限公司 A kind of circuit board and server

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107390065A (en) * 2017-08-04 2017-11-24 郑州云海信息技术有限公司 A kind of PCH method of testings
CN109121286A (en) * 2018-10-11 2019-01-01 郑州云海信息技术有限公司 A kind of circuit board and server

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GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170517

Termination date: 20171116

CF01 Termination of patent right due to non-payment of annual fee