CN206162501U - Data conversion equipment, chip, and image system - Google Patents

Data conversion equipment, chip, and image system Download PDF

Info

Publication number
CN206162501U
CN206162501U CN201621060107.6U CN201621060107U CN206162501U CN 206162501 U CN206162501 U CN 206162501U CN 201621060107 U CN201621060107 U CN 201621060107U CN 206162501 U CN206162501 U CN 206162501U
Authority
CN
China
Prior art keywords
data
interface
chip
nvme
solid state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201621060107.6U
Other languages
Chinese (zh)
Inventor
庹伟
张强
刘志伟
王珂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai flying Mdt InfoTech Ltd
Original Assignee
Shenzhen Dajiang Innovations Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Dajiang Innovations Technology Co Ltd filed Critical Shenzhen Dajiang Innovations Technology Co Ltd
Priority to CN201621060107.6U priority Critical patent/CN206162501U/en
Application granted granted Critical
Publication of CN206162501U publication Critical patent/CN206162501U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The utility model provides a data conversion equipment, chip, and image system, this image system of includes: equipment and data conversion equipment are shot to the image, image shooting equipment includes a PCIE interface, and detachable connects NVME solid state hard drives, data conversion equipment includes a PCIE interface, and detachable meets NVME solid state hard drives, outside image processing facility is connected to a USB interface, a protocol conversion device all is connected with PCIE interface and USB interface, and protocol conversion device was used for when receiving image processing facility's write command, and the USB data conversion who carries the write command agrees the formatted data for NVME to issue the PCIE interface, when receiving image processing facility's read instruction, through the data that read NVME agreement form among the corresponding address space of PCIE interface follow read instruction to it issues the USB interface after the USB data to convert to.

Description

Data conversion equipment, chip and image system
Technical field
The application is related to data conversion technique, more particularly to data conversion equipment, chip and image system.
Background technology
At present the camera of some camera manufacturer productions can support the image data of RAW (original) form.To image data For, RAW is exactly that CMOS (partly lead by Complementary Metal Oxide Semiconductor, CMOS Body) or CCD (Charge-coupled Device, charge coupled cell) imageing sensors by the light signal for capturing turn The initial data of data signal, including supplemental characteristic during camera shooting are turned to (such as ISO values, shutter speed, f-number, Bai Ping Weighing apparatus etc.).
Because RAW files are the files of the generation after Lossless Compression, compared to JPEG (Joint Photographic Experts Group, Joint Photographic Experts Group) etc. the file of form can be much larger, storage RAW files need more jumbo Storage device, part camera manufacturer adopts SSD (Solid State Drives, solid state hard disc) as memory carrier, and adopts SATA (Serial Advanced Technology Attachment, serial ATA interface specification) interface general at present is realized The read-write of RAW files.Due to needing faster writing speed, therefore some phases when high-resolution image data is shot Machine manufacturer may be used as using NVME (Non-Volatile Memory Express, nonvolatile memory passage) SSD Memory carrier, but this can cause the RAW files being stored on the NVME SSD of camera to be easily transferred to the figure such as computer As in processing equipment.
Utility model content
The application provides data conversion equipment, chip and image system.
According to the first aspect of the embodiment of the present application, there is provided a kind of image system, including:Image capture devices and data turn Exchange device;
The image capture devices include a PCIE interfaces, for dismountable connection NVME solid state hard discs;
The data conversion equipment includes:
One PCIE interfaces, can releasably connect the NVME solid state hard discs;
One USB interface, for connecting the image processing equipment of outside;
One protocol conversion apparatus, the protocol conversion apparatus are used for when the write command of image processing equipment is received, will The usb data that write command is carried is converted to NVME protocol formatted datas, and issues PCIE interfaces, hard to write the NVME solid-states The corresponding address space of disk;When the reading instruction of image processing equipment is received, by PCIE interfaces correspondingly from reading instruction The data of NVME protocol formats are read in the space of location, and is converted into issuing the USB interface after usb data.
In one embodiment, the image capture devices include a head, and the head can releasably be installed on nobody On machine, the head is used to carry a camera, and increases for the camera steady.
It is described according to the second aspect of the embodiment of the present application, there is provided a kind of data conversion equipment, including data processing equipment Data processing equipment includes first interface and second interface;Wherein
The first interface is used for physical connection external host;
The second interface is used for physical connection NVME solid state hard disc;
The data processing equipment is used for the form of the write data for carrying write command and is converted to NVME protocol formats, so After write the corresponding address space of the NVME solid state hard discs;It is corresponding from reading instruction when external host reading instruction is received The data of NVME protocol formats are read in address space, and is converted into issuing external host after the data of the first form.
In one embodiment, the data processing equipment includes the first chip and passes through piece interface phase with the first chip The second chip even, the first interface is located on first chip, and the second interface is located on second chip;
First chip be used for second chip send from the first equipment reading instruction or write command, Yi Ji Data Format Transform and data transfer are carried out between external host and the second chip;
Second chip is used for based on the reading instruction or write command, and between the first chip and NVME solid state hard discs line number is entered According to form conversion and data transfer.
In one embodiment, the data processing equipment also includes the cache chip being connected with second chip, wherein Second chip first will delay before Data Format Transform is performed from the data of external host or from the data of NVME solid state hard discs It is stored to the cache chip.
In one embodiment, second chip also includes inner buffer, wherein the second chip is performing data form turn Before changing, first by the data from external host or from the NVME solid state hard discs data buffer storage to inner buffer.
In one embodiment, first chip is USB PHY chips, and the first interface is USB interface;Described second Chip is PLD, and described interface is parallel interface.
In one embodiment, the second interface is PCIE interfaces or U.2 interface.
In one embodiment, the data processing equipment also includes the power interface for connecting external power source.
According to the third aspect of the embodiment of the present application, there is provided a kind of chip, including:Second interface, parallel interface and association View conversion equipment;
The second interface is used for physical connection NVME solid state hard disc;
The parallel interface is used for and external device (ED) physical connection;
The protocol conversion apparatus are used for when receiving from the write command of the external device (ED), and write command is carried The form of write data is converted to NVME protocol formats, is then issued to second interface, to write the NVME solid state hard discs correspondence Address space;When receiving from the reading instruction of the external device (ED), read from the corresponding address space of reading instruction The data of NVME protocol formats, and parallel interface data are converted into, issue the parallel interface.
In one embodiment, the second interface is PCIE interfaces or U.2 interface.
According to the fourth aspect of the embodiment of the present application, there is provided a kind of chip, including:Second interface, USB interface and agreement Conversion equipment;
The USB interface is used for and external host physical connection;
The second interface is used for and NVME solid state hard disc physical connections;
The protocol conversion apparatus are used for when the write command of the external host is received, the write that write command is carried The form of data is converted to NVME protocol formats, empty to write the corresponding address of the NVME solid state hard discs by second interface Between;When the reading instruction of external host is received, the data of NVME protocol formats are read from the corresponding address space of reading instruction, And be converted into issuing the USB interface after usb data.
The data conversion equipment of embodiments herein, chip and image system, there is provided can be by NVME solid state hard discs The data of middle data and external host enter the solution of row format conversion and transmitted in both directions, therefore can be existing using external host Some external interfaces realize the data transfer with NVME solid state hard discs so that either NVME solid state hard discs or external host are equal Without the need for increasing complicated data converting function, so as to increased the convenience of NVME solid state hard disc data transfers.
It should be appreciated that the general description of the above and detailed description hereinafter are only exemplary and explanatory, not The application can be limited.
Description of the drawings
Fig. 1 is a system architecture schematic diagram in the embodiment of the present application;
Fig. 2 is the part-structure schematic diagram of data processing equipment in the embodiment of the application one;
Fig. 3 is the part-structure schematic diagram of data processing equipment in another embodiment of the application;
Fig. 4 is the part-structure schematic diagram of the second chip in the embodiment of the present application;
Fig. 5 is an application scenarios schematic diagram in the embodiment of the present application;
Fig. 6 is the part-structure schematic diagram of data processing equipment in the embodiment of the present application;
Fig. 7 is the part-structure schematic diagram of a chip in the embodiment of the present application;
Fig. 8 is the part-structure schematic diagram of the protocol conversion apparatus in chip shown in Fig. 7;
Fig. 9 is another schematic diagram of protocol conversion apparatus in the embodiment of the present application;
Figure 10 is the part-structure schematic diagram of another chip in the embodiment of the present application;
Figure 11 is the partial process view of data transfer device in the embodiment of the present application.
Specific embodiment
Here exemplary embodiment will be illustrated in detail, its example is illustrated in the accompanying drawings.Explained below is related to During accompanying drawing, unless otherwise indicated, the same numbers in different accompanying drawings represent same or analogous key element.Following exemplary embodiment Described in embodiment do not represent all embodiments consistent with the application.Conversely, they be only with it is such as appended Some the consistent device of aspect, examples of system, apparatus and method described in detail in claims, the application.
It is, only merely for the purpose of description specific embodiment, and to be not intended to be limiting the application in term used in this application. " one kind ", " described " and " being somebody's turn to do " of singulative used in the application and appended claims is also intended to include majority Form, unless context clearly shows that other implications.It is also understood that term "and/or" used herein is referred to and wrapped Containing one or more associated any or all possible combinations for listing project.
It will be appreciated that though various information, but this may be described using term first, second, third, etc. in the application A little information should not necessarily be limited by these terms.These terms are only used for that same type of information is distinguished from each other out.For example, without departing from In the case of the application scope, the first information can also be referred to as the second information, and similarly, the second information can also be referred to as One information.
With the increase of memory bandwidth demand, NVME solid state hard discs have begun to slowly popularize.Some manufacturers as needed, NVME solid state hard discs are installed on some electronic equipments, as storage device data storage.For example, some image documentation equipment (examples Such as camera, video recorder) on had been provided with the interface that is adapted to NVME solid state hard discs, stored using NVME solid state hard discs and regarded The image data such as frequency or picture.
The data that NVME solid state hard discs are stored may require that and export on external host sometimes, for example, in image documentation equipment Image data may be exported on the equipment such as PC;In some cases, it may be necessary to by external host to NVME solid-states Data in hard disk carry out write operation, for example, the data in NVME solid state hard discs are carried out with what additions and deletions changed by PC Operation.Because the external interface having on current external host is not the interface that is adapted to NVME solid state hard discs, therefore it is not easy to Operation is written and read to the data in NVME solid state hard discs.
The embodiment of the present application provides the solution that the data in NVME solid state hard discs and external host are carried out transmitted in both directions Scheme.Type the embodiment of the present application of external host is not limited, and can be the various terminals for possessing computing capability, for example can be with It is mobile phone, panel computer, notebook computer, desktop computer etc..
Fig. 1 is the part-structure figure of each equipment under a system architecture in one embodiment.
In embodiment shown in Fig. 1, there is provided a data conversion equipment 10, the data conversion equipment 10 can be independently of NVME Solid state hard disc 11 and external host 12, are convenient for carrying, are easy to use and do not increase NVME solid-states on different devices to reach The purposes such as the volume and power consumption of hard disk 11.In formalness, data conversion equipment 10 can be presented as a card reader.Certainly, In some occasions, it is also possible to be designed to data conversion equipment 10 and NVME solid state hard discs 11 or external host 12 integrated.
Such as Fig. 1, data conversion equipment 10 includes a data processing equipment 110.Data processing equipment 110 carries first interface 1101 and second interface 1102;External host 12 can be connected by first interface 1101, be connected by second interface 1102 NVME solid state hard discs 11.In an example, first interface 1101 and second interface 1102 can be hardware interfaces, can lead to respectively The mode for crossing physical connection is connected with external host 12 or NVME solid state hard discs 11.
First interface 1101 can match with the interface type of an external interface 120 of external host 12, can be by The form of the data of transmitted in both directions is referred to as the first form between first interface 1101 and external host 12, for example, works as external host When 12 interface is USB1.0, USB2.0 or USB3.0 interface, first interface 1101 is the USB interface that matches, the first form Data be usb data.For the interface type here of first interface 1101 is not enumerated, the data of the first form are not limited to In usb data.
Second interface 1102 can support the hardware interface of NVME agreements, U.2 such as PCIE interfaces, interface etc..
Data processing equipment 110 by one of interface to data when, be converted into corresponding to another interface Data form, and transferred out by another interface.The flow process of the Data Format Transform can be triggered by external host 12, For example, external host 12 triggers the data conversion that receives first interface 1101 by write command into the number of NVME protocol formats According to process, by reading instruction trigger by the data conversion of the NVME protocol formats in NVME solid state hard discs into the first form number According to processing procedure.Write command may refer to external host 12 and the instruction of write operation carried out to NVME solid state hard discs 11, read to refer to Order may refer to instruction of the external host 12 to the read operation of the data in NVME solid state hard discs 11.Write command or reading instruction institute The information of carrying can determine according to different designs demand, such as some occasions, and write command or reading instruction can carry data and deposit Put the information such as the length of address, read/write data.
The flow process of above-mentioned Data Format Transform can be described as procedure below:
Data processing equipment 110 when the write command of external host 12 is received, the write data that write command is carried Form is converted to NVME protocol formats, then writes the corresponding address space of NVME solid state hard discs 11;Receiving external host During 12 reading instruction, the number of NVME protocol formats is read in address space corresponding with reading instruction from NVME solid state hard discs 11 According to, and be converted into issuing external host 12 after the data of the first form.
In some other examples, those skilled in the art can with realized by the way of special chip data processing fill Put 110 data converting function.This special chip can be ASIC (Application Specific Integrated Circuit, special IC) (Field-Programmable Gate Array, scene can for chip, or FPGA Programming gate array) etc. programming device.The function that data processing equipment 110 has can be realized by a chip, also may be used To be respectively completed a portion function by different chips.Chip can realize corresponding function by software program, also may be used To realize corresponding function by example, in hardware such as circuits.
It is exemplified below in several different embodiments realizing the example of data processing equipment 110 by chip.Refer to Fig. 2- Fig. 4 and Figure 10.
Data processing equipment 110 includes the first chip 1103 and the second chip 1104 in Fig. 2.Two chips are by between piece Interface 1105 is connected.The type of piece interface 1105 can be determined by the type of two chips.For example, the first chip 1103 Can be USB PHY chips, the second chip 1104 can be fpga chip, now can be using parallel interface as two chips Between piece interface, such as parallel interface can be that GPIF (general programmable interface) is general can DLL etc..
Such as Fig. 2, first interface 1101 is located on the first chip 1103 in this example, and second interface 1102 is located at the second chip On 1104.
Transfer process of the data between the first form and NVME forms can be refined as multiple conversions again.With reference to Fig. 1 and Fig. 2, the first chip 1103 is with the reading instruction or write command sent to second chip 1104 from the first equipment, Yi Ji The function of Data Format Transform and data transfer is carried out between the chip 1104 of external host 12 and second;Second chip 1104 has Based on reading instruction or write command, Data Format Transform is carried out between the first chip 1103 and NVME solid state hard discs 11 and data are passed Defeated function.Therefore in this example, data conversion process can include procedure below:
When the first chip 1103 is received after the write command of external host 12 by first interface 1101, by write command with And data form that the write data of the first form entrained by write command are converted to corresponding to piece interface 1105 is (such as parallel Interface data), and the data after conversion are issued by the second chip 1104 by piece interface 1105;Second chip 1104 analyzes institute The write command for receiving, by the write data conversion for receiving into the data of NVME protocol formats, is then write by second interface 1102 Enter the appropriate address space of NVME solid state hard discs 11.
When the first chip 1103 is received after the reading instruction of external host 12 by first interface 1101, reading instruction is turned The data form (such as parallel interface data) being changed to corresponding to piece interface 1105, and after piece interface 1105 will be changed Reading instruction issue the second chip 1104;Second chip 1104 analyzes received reading instruction, by second interface 1102 from The data of NVME protocol formats are read in the appropriate address space of NVME solid state hard discs 11, then that the data conversion for being read is in blocks Data form corresponding to interface 1105, by piece interface 1105 the first chip 1103 is issued;First chip 1103 is being received After the data transmitted to piece interface 1105, the data of the first form are converted to, outside is transferred to by first interface 1101 Main frame 12.
In some examples, for the second chip 1104, before Data Format Transform is performed, can first by from external host 12 data or the data from NVME solid state hard discs 11 are cached, and conversion operation is then performed again.Here combines Fig. 3 in addition Explanation.
In some examples, there can be inner buffer (not shown) inside the second chip 1104, can be by inside Caching from the piece interface 1105 of the second chip 1104 and the data of NVME solid state hard discs 11 to caching.
In other examples, as shown in figure 3, data processing equipment 110 can also include cache chip 1106, positioned at second Outside chip 1104, and it is connected with the second chip 1104, it is possible to use cache chip 1106 pairs is from the second chip 1104 The data of piece interface 1105 and NVME solid state hard discs 11 are cached.Second chip 1104 can be controlled by a cache chip Data exchange of the module (this is not shown) to realize with cache chip 1106.
As an example, if the first chip 1103 or the power consumption of the second chip 1104 are more, data processing equipment 110 may be used also With comprising the independently-powered module independently of the power supply of first interface 1101, in addition, the maximum supply input energy of independently-powered module Power can be more than the maximum supply input ability of first interface 1101, and data processing equipment 110 can also include power interface, lead to It is that the first chip 1103 or the second chip 1104 are powered to cross connection external power source.
Can have multiple softwares or hardware module to realize what the second chip 1104 had respectively in second chip 1104 Partial function.Fig. 4 is the signal of an interior section structure of the second chip 1104.As an example, DDR is adopted in this example (Double Data Rate, Double Data Rate) chip 1106a is described as cache chip 1106.
Such as Fig. 4, the second chip 1104 includes DMA (Direct Memory Access, direct memory access) module Second interface drive module 1104c of 1104a, processing module 1104b and second interface 1102 connection.Modules can have There are following functions:
Dma module 1104a can be stored in the read/write instruction of external host 12 in DDR chip 1106a, and will caching ground Location notification handler module 1104b, and number is read from DDR chip 1106a according to the buffer address of processing module 1104b notice According to, and the first chip 1103 is transferred to by piece interface 1105;As an example, dma module can support DMA data transfer mould Formula.
The buffer address that processing module 1104b can be notified according to dma module 1104a obtains reading instruction, analyzes reading instruction With determine including including corresponding address space access parameter (for example source address, destination address, read/write data address it is long Degree), NVME solid state hard discs are accessed using second interface drive module 1104c according to parameter is accessed, NVME solid state hard discs are returned Data buffer storage in DDR chip 1106a, and the buffer address of data is notified into dma module 1104a;Or
The buffer address notified according to dma module 1104a obtains write command, and analysis write command is determining including corresponding Location space is written to the write data that write command is carried by second interface drive module 1104c in interior access parameter In NVME solid state hard discs 11.
As shown in figure 4, DDR control modules 1104d connection DDR chips 1106a and processing module 1104b, DDR chips The read-write operation of 1106a internal datas can control DDR control modules 1104d and complete by processing module 1104b.
Below in conjunction with a concrete application scene to describe Fig. 4 in the flow process of each module cooperative when working.Fig. 5 is the applied field A schematic diagram under scape.The application scenarios of Fig. 5 include an image shooting system 50 and an image processing equipment 515.Image is clapped Taking the photograph system 50 mainly includes an image capture devices 510 and data conversion equipment 10, and data conversion equipment 10 can be referred to as reading Card device.Wherein image capture devices 510 are illustrated by taking the head camera for being installed on unmanned plane as an example, and for example, filming image sets Standby 510 can include a head, and head can be releasably installed on unmanned plane, and head can carry a camera, and for camera Increase steady.
In this example, NVME solid state hard discs 11 as image capture devices 510 data storage device, image capture devices Include a PCIE interfaces 511 on 510, can specifically be presented as a PCIE interface slots, can removably connect NVME solid-states Hard disk 11.Image data operationally, NVME solid state hard discs 11 is write by PCIE interfaces 511 by image capture devices 510, and And when user needs, NVME solid state hard discs 11 can be taken out from the slot of PCIE interfaces 511, and insert data conversion equipment In 10, with the exchange data of image processing equipment 515, data conversion equipment 10 can be set by USB connecting lines 514 and image procossing Standby 515 connection.
Data conversion equipment 10 has hardware interface and data converting function.For example, data conversion equipment 10 provides one PCIE interfaces 513, dismountable connection NVME solid state hard discs 11, the PCIE interfaces 513 can be slot, be available for NVME solid-states hard Disk 11 is inserted;Data conversion equipment 10 also provides a USB interface 512, the image processing equipment 515 outside connection;In addition, data The functions such as conversion equipment 10 can also be indicated by providing power supply status, read/write status instruction, accordingly, data conversion equipment 10 can also have the output interfaces such as power supply indicator, read/write indicator lamp.
Data conversion equipment 10 can also include a protocol conversion apparatus (not showing in Fig. 5), receive image procossing During the write command of equipment 515, now write command data form is usb data, and protocol conversion apparatus can be converted to usb data The data of NVME protocol formats, and PCIE interfaces 513 are issued, to write the corresponding address space of NVME solid state hard discs 11;Connecing When receiving the reading instruction of described image processing equipment, read from the corresponding address space of reading instruction by PCIE interfaces 513 The data of NVME protocol formats, and be converted into after usb data issuing image processing equipment 515 by the USB interface.
Data conversion equipment 10 refers to Fig. 6, with reference to Fig. 2-Fig. 5, still realizes data conversion equipment with different chip portfolios As a example by 10 functions, the walk around function of device of agreement can be realized by one or more chips in data conversion equipment 10, for example In Fig. 6, data conversion equipment 10 can include USB PHY chips 601 (equivalent to the first chip 1103) and fpga chip (phase When in the second chip 1104).Wherein the USB interface of USB PHY chips is USB3.0 interfaces, and the model of USB PHY chips is optional Use CY3014.The fpga chip 602 carries PCIE interfaces.It is to connect parallel between USB PHY chips 601 and fpga chip 602 Mouthful, GPIF interfaces can be adopted.
In the present embodiment, USB PHY chips 601 realize usb protocol to the mutual conversion of parallel interface, due to USB associations The related function of view is completed by USB PHY chips 601, and fpga chip 602 can be without considering complicated usb protocol, therefore can Difficulty is realized with the built-in function for simplifying fpga chip 602, that is to say, that, although introducing USB PHY chips can increase hardware Cost, but FPGA development costs can decline to a great extent, and generally cost still has suitable advantage.
Fpga chip 602 includes USB_DMA modules 6022, CPU 6021, PCIE drive modules 6024, DDR control modules 6023.These functional modules can pass through programming realization.Wherein USB_DMA modules 6022 are by parallel interface and other control letters Number interface is interacted with USB PHY chips 601, it is possible to achieve the data transmit-receive of fpga chip 602 and USB PHY chips 601.From number From the point of view of according to write direction, USB_DMA modules 6022 be first cached to after the data of USB PHY chips DDR chips receiving In 1106a;From the point of view of digital independent direction, USB_DMA modules 6022 can read data from DDR chip 1106a and be sent to USB PHY chips 601, by USB_DMA modules 6022 data transmission efficiency can be improved, and reduce bearing for the CPU inside FPGA Lotus, it is to avoid the read or write speed that CPU bottlenecks cause declines, improves as much as possible read-write data bandwidth.
Fpga chip 602 is connected by PCIE interfaces with NVME solid state hard discs 11, realizes fpga chip 602 and NVME solid-states The data transmit-receive of hard disk 11.
Processor CPU 6021 (equivalent to processing module 1104b) on fpga chip 602 is to from 602 liang of fpga chip The transfer of the data of individual interface carries out management and control so that external host 12 needs to access NVME solid state hard discs by fpga chip 602 11.CPU 6021 and USB_DMA modules 6022, PCIE drive modules 6024, DDR control modules 6023 are carried out by AXI buses Interaction.
When external host 12 needs to write data to NVME solid state hard discs 11, external host 12 is by USB interface according to certainly The command format of definition sends usb data to USB PHY chips 601, and USB PHY chips 601 receive the data of external host 12 Afterwards, usb data is changed into into parallel interface data, the USB_DMA modules 6022 being sent to inside fpga chip 602, USB_DMA moulds Block 6022 is received after data, writes the address of DDR chips 1106a set in advance, then produces interruption, notifies fpga chip CPU 6021 inside 602, CPU 6021 are analyzed to notification message, and acquisition will write the destination of NVME solid state hard discs 11 Location, then CPU 6021 by the data conversion obtained from DDR chip 1106a into NVME protocol formats data, it is solid to NVME State hard disk 11 sends NVME IO WRITE commands, it would be desirable to which the data of write are carried in NVME IO WRITE commands, write NVNE solid state hard discs 11.
When external host 12 needs to read data from NVME solid state hard discs 11, first external host 12 passes through USB interface Reading instruction is sent to USB PHY chips 601, USB PHY chips 601 received and be converted into simultaneously after reading instruction according to predefined form Line interface data forwarding is received after read command to the USB_DMA modules 6022 inside fpga chip 602, USB_DMA modules 6022 Predefined DDR addresses are write, interruption is then produced, the CPU 6021 on fpga chip 602 is informed, CPU 6021 is to reading instruction It is analyzed, obtains and read address, read data volume etc. and access parameter, then CPU 6021 drives according to these access state modulators PCIE Dynamic model block 6024 to NVME solid state hard discs 11 send NVME IO read commands, and NVME solid state hard discs 11 lead to according to parameter is accessed Cross PCIE interfaces and send the data of NVME protocol formats in DDR chip 1106a, then CPU 6021 is from DDR chip 1106a Read the data of NVME protocol formats and be converted into parallel interface data, control dma module 6023 is the parallel interface after conversion Data is activation is to external host 12.
One DDR chip 1106a of FPGA peripheries connection, for the caching of data, either from the number of external host 12 Can be buffered in DDR chip 1106a, by the CPU on fpga chip 602 according to the data of still NVME solid state hard discs 11 6021 pairs of data are managed.
Because fpga chip power consumption is higher, the USB interface of USB PHY is difficult to drive whole card reader, therefore data conversion Equipment 10 can be solid to fpga chip 602, USB PHY chips 601 and NVME by a direct current power supply interface external direct current power supply State hard disk 11 provides power supply.
As can be seen that image processing equipment 515 is without realizing NVME agreements, NVME agreements are realized by fpga chip 602, figure As processing equipment 515 is only needed to NVME solid state hard discs 11 as common mass-memory unit, therefore need not change existing Equipment, makes the embodiment that the application is provided have more versatility.
Fig. 7 is the part-structure schematic diagram of a chip 70 in another embodiment.The chip 70 can be used as above-mentioned data One component of the structure of conversion equipment 10, or a part for other products provides corresponding function.
Such as Fig. 7, the chip 70 includes second interface 1102, parallel interface 702 and protocol conversion apparatus 701;
Second interface 1102 can connect NVME solid state hard discs 11, for example, can be PCIE interfaces, U.2 interface etc..Parallel Interface 702 and external device (ED) (such as the first chip 1103 in Fig. 2, but be not precluded from that other external device (ED)s can be connected) connection.
The function of protocol conversion apparatus 701 can be similar to the function of the second chip 1104 in Fig. 2, Fig. 3.For example, can connect Receive from the write command of the external device (ED) when, the form of write data that write command is carried is converted to into NVME agreement lattice Formula, is then issued to second interface 1102, to write the corresponding address space of NVME solid state hard discs 11;Receiving from described outer During the reading instruction of part device, the data of NVME protocol formats are read from the corresponding address space of reading instruction, and be converted into parallel Interface data, issues parallel interface 702.
The type of chip 70 can be the chip with programing function, such as fpga chip etc..Protocol conversion apparatus 701 Function both can be realized by software, it is also possible to be realized by way of hardware or soft or hard are combined.Its function implemented in software is Example, the protocol conversion apparatus 701 can include multiple functional modules, to cooperate with the function of completing protocol conversion apparatus 701, wherein One example, may be referred to the function of the part comprising modules in Fig. 4 inside the second chip 1104.Referring to Fig. 8, functional module can With second interface drive module 1104c for having dma module 1104a and the connection of second interface 1102, and processing module 1104b, The function of those modules and the principle of collaborative work refer to the description of respective modules in Fig. 4, and here is not being repeated.
In addition, with reference to Fig. 9, the chip 70 can also be connected with a cache chip, the cache chip is with DDR chip 1106a As a example by, DDR control modules 1104d can also be included in chip, chip can pass through DDR before Data Format Transform is performed Control module 1104d by from the data of external device (ED) or from NVME solid state hard discs data buffer storage to DDR chip 1106a In.
Figure 10 is the part-structure schematic diagram of the embodiment of another chip.The chip 90 relative to Fig. 7 chip, with more Many data converting functions, the chip 90 can be to realize the partial function of data conversion equipment 10, it is also possible to needs at other Want to realize its effect on the product of data conversion.
The chip 90 includes second interface 1102, USB interface 901 and protocol conversion apparatus 902;
It is connected with external host 12 by USB interface 901;Second interface 1102 is connected with NVME solid state hard discs 11, equally, Second interface 1102 is probably the interface that PCIE interfaces etc. support NVME agreements.
Protocol conversion apparatus 902 in chip 90 can have the direct phase of the data of usb data and NVME protocol formats The function of mutually changing.Process can be presented as:When the write command of the external host is received, the write that write command is carried The form of data is converted to NVME protocol formats, empty to write the corresponding address of NVME solid state hard discs by second interface 1102 Between;When the reading instruction of external host is received, the data of NVME protocol formats are read from the corresponding address space of reading instruction, And be converted into issuing USB interface 901 after usb data.
Figure 11 provides the part flow process of the embodiment of data transfer device.Each step of the flow process can pass through data Conversion equipment 10 is performing, but this method is not limited to only to perform by this equipment.
In S110 steps, the write command or reading instruction of external host are received;
S111, when the write command of external host 12 is received, the form of the write data that write command is carried is converted to NVME protocol formats, then write the corresponding address space (S112) of the NVME solid state hard discs 11;
S113, when 12 reading instruction of external host is received, reads NVME agreements from the corresponding address space of reading instruction Data of form, and be converted into issuing external host 12 (S114) after the data of the first form, the first form and external host 12 Interface type it is corresponding.
As an example, the data conversion between the data of the data of the first form and NVME protocol formats can be entered stage by stage OK, for example, when the data in the first form are converted to the data of NVME protocol formats, the write number that first can be carried write command According to being converted to parallel interface data, then by the parallel interface data conversion into NVME protocol formats data;When need by The data conversion of NVME protocol formats into the first form data when, NVME protocol formatted datas can be first converted into connecing parallel Mouth data, then the parallel interface data are converted to into the data of the first form.
It is understood that the whether sublevel of the data conversion between the data of the data of the first form and NVME protocol formats Duan Jinhang, and divide a several stages to carry out to be determined according to the demand of designer, for example, the chip knot with reference to shown in Figure 10 The data (such as usb data) of the first form in the design, directly can be converted to the number of NVME protocol formats by structure According to, or the data of NVME protocol formats are converted to into the data (such as usb data) of the first form.
Each embodiment described above is only schematic, wherein the unit as separating component explanation can be with It is or may not be physically separate, can is as the part that unit shows or may not be physical location, A place is may be located at, or can also be distributed on multiple NEs.Can select according to the actual needs wherein Some or all of module realizing the purpose of application scheme.Those of ordinary skill in the art are not paying creative work In the case of, you can to understand and implement.
The preferred embodiment of the application is the foregoing is only, not to limit the application, all essences in the application Within god and principle, any modification, equivalent substitution and improvements done etc. should be included within the scope of the application protection.

Claims (12)

1. a kind of image system, it is characterised in that include:Image capture devices and data conversion equipment;
The image capture devices include a PCIE interfaces, for dismountable connection NVME solid state hard discs;
The data conversion equipment includes:
One PCIE interfaces, can releasably connect the NVME solid state hard discs;
One USB interface, for connecting the image processing equipment of outside;
One protocol conversion apparatus, are all connected with the PCIE interfaces and the USB interface, and the protocol conversion apparatus are used to connect When receiving the write command of image processing equipment, the usb data that write command is carried is converted to into NVME protocol formatted datas, and is issued PCIE interfaces, to write the corresponding address space of the NVME solid state hard discs;When the reading instruction of image processing equipment is received, The data of NVME protocol formats are read from the corresponding address space of reading instruction by PCIE interfaces, and is converted into after usb data Issue the USB interface.
2. image system according to claim 1, it is characterised in that the image capture devices include a head, described Head can be releasably installed on unmanned plane, and the head is used to carry a camera, and increases for the camera steady.
3. a kind of data conversion equipment, it is characterised in that including data processing equipment, the data processing equipment connects including first Mouth and second interface;Wherein
The first interface is used for physical connection external host;
The second interface is used for physical connection NVME solid state hard disc;
The data processing equipment is used for the form of the write data for carrying write command and is converted to NVME protocol formats, then writes Enter the corresponding address space of the NVME solid state hard discs;When external host reading instruction is received, from the corresponding address of reading instruction The data of NVME protocol formats are read in space, and is converted into issuing external host after the data of the first form.
4. data conversion equipment according to claim 3, it is characterised in that
The data processing equipment includes the first chip and the second chip being connected by piece interface with the first chip, described First interface is located on first chip, and the second interface is located on second chip;
First chip is used to send reading instruction or write command from the first equipment to second chip, and in outside Data Format Transform and data transfer are carried out between main frame and the second chip;
Second chip is used for based on the reading instruction or write command, and data lattice are carried out between the first chip and NVME solid state hard discs Formula is changed and data transfer.
5. data conversion equipment according to claim 4, it is characterised in that the data processing equipment also include with it is described The cache chip of the second chip connection, wherein the second chip is before Data Format Transform is performed, first by from the number of external host According to or from NVME solid state hard discs data buffer storage to the cache chip.
6. data conversion equipment according to claim 4, it is characterised in that second chip also includes inner buffer, Wherein the second chip perform Data Format Transform before, first by the data from external host or from the NVME solid-states The data buffer storage of hard disk is to inner buffer.
7. data conversion equipment according to claim 4, it is characterised in that first chip is USB PHY chips, institute First interface is stated for USB interface;Second chip is PLD, and described interface is parallel interface.
8. data conversion equipment according to claim 3, it is characterised in that the second interface is PCIE interfaces or U.2 Interface.
9. data conversion equipment according to claim 3, it is characterised in that the data processing equipment is also included for even Connect the power interface of external power source.
10. a kind of chip, it is characterised in that include:Second interface, parallel interface and protocol conversion apparatus;
The second interface is used for physical connection NVME solid state hard disc;
The parallel interface is used for and external device (ED) physical connection;
The protocol conversion apparatus are used for when receiving from the write command of the external device (ED), the write that write command is carried The form of data is converted to NVME protocol formats, is then issued to second interface, corresponding to write the NVME solid state hard discs Location space;When receiving from the reading instruction of the external device (ED), NVME associations are read from the corresponding address space of reading instruction The data of view form, and parallel interface data are converted into, issue the parallel interface.
11. chips according to claim 10, it is characterised in that the second interface is PCIE interfaces or U.2 interface.
12. a kind of chips, it is characterised in that include:Second interface, USB interface and protocol conversion apparatus;
The USB interface is used for and external host physical connection;
The second interface is used for and NVME solid state hard disc physical connections;
The protocol conversion apparatus are used for when the write command of the external host is received, the write data that write command is carried Form be converted to NVME protocol formats, to write the corresponding address space of the NVME solid state hard discs by second interface; When receiving the reading instruction of external host, the data of NVME protocol formats are read from the corresponding address space of reading instruction, and turned Change into and issue after usb data the USB interface.
CN201621060107.6U 2016-09-18 2016-09-18 Data conversion equipment, chip, and image system Active CN206162501U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621060107.6U CN206162501U (en) 2016-09-18 2016-09-18 Data conversion equipment, chip, and image system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621060107.6U CN206162501U (en) 2016-09-18 2016-09-18 Data conversion equipment, chip, and image system

Publications (1)

Publication Number Publication Date
CN206162501U true CN206162501U (en) 2017-05-10

Family

ID=58651269

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621060107.6U Active CN206162501U (en) 2016-09-18 2016-09-18 Data conversion equipment, chip, and image system

Country Status (1)

Country Link
CN (1) CN206162501U (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108700896A (en) * 2017-07-31 2018-10-23 深圳市大疆创新科技有限公司 Data conversion and filming control method, system, head assembly and UAV system
CN110730287A (en) * 2019-10-24 2020-01-24 深圳市道通智能航空技术有限公司 Removable tripod head camera, aircraft, system and tripod head replacement method
CN110874339A (en) * 2018-09-04 2020-03-10 瑞昱半导体股份有限公司 Data transmission format conversion circuit and method for controlling operation thereof
CN111124985A (en) * 2019-12-24 2020-05-08 厦门市美亚柏科信息股份有限公司 Read-only control method and device for mobile terminal
CN111198836A (en) * 2018-11-20 2020-05-26 阿里巴巴集团控股有限公司 Data processing apparatus and computing device
WO2020215182A1 (en) * 2019-04-22 2020-10-29 深圳市大疆创新科技有限公司 Image data processing method, transmission method, transmission apparatus and data interface switching apparatus
CN112199312A (en) * 2020-10-09 2021-01-08 深圳市广和通无线股份有限公司 Interface conversion device of communication equipment and communication system
CN113033785A (en) * 2021-02-26 2021-06-25 上海阵量智能科技有限公司 Chip, neural network training system, memory management method, device and equipment

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108700896A (en) * 2017-07-31 2018-10-23 深圳市大疆创新科技有限公司 Data conversion and filming control method, system, head assembly and UAV system
CN110874339A (en) * 2018-09-04 2020-03-10 瑞昱半导体股份有限公司 Data transmission format conversion circuit and method for controlling operation thereof
CN111198836A (en) * 2018-11-20 2020-05-26 阿里巴巴集团控股有限公司 Data processing apparatus and computing device
WO2020215182A1 (en) * 2019-04-22 2020-10-29 深圳市大疆创新科技有限公司 Image data processing method, transmission method, transmission apparatus and data interface switching apparatus
CN110730287A (en) * 2019-10-24 2020-01-24 深圳市道通智能航空技术有限公司 Removable tripod head camera, aircraft, system and tripod head replacement method
CN111124985A (en) * 2019-12-24 2020-05-08 厦门市美亚柏科信息股份有限公司 Read-only control method and device for mobile terminal
CN112199312A (en) * 2020-10-09 2021-01-08 深圳市广和通无线股份有限公司 Interface conversion device of communication equipment and communication system
CN113033785A (en) * 2021-02-26 2021-06-25 上海阵量智能科技有限公司 Chip, neural network training system, memory management method, device and equipment
CN113033785B (en) * 2021-02-26 2024-01-09 上海阵量智能科技有限公司 Chip, neural network training system, memory management method, device and equipment

Similar Documents

Publication Publication Date Title
CN107077304B (en) Data conversion equipment, chip, method, apparatus and image system
CN206162501U (en) Data conversion equipment, chip, and image system
KR101111946B1 (en) Imaging device, image signal processor and method for sharing memory among chips
CN104956347B (en) By a kind of interconnection agreement enumerate and/or configuration mechanism be used for different interconnection agreements
US7222212B2 (en) Virtual USB card reader with PCI express interface
US7496703B2 (en) Virtual IDE card reader with PCI express interface
US20030074529A1 (en) Bulk storage method and system and autonomous portable bulk storage unit used in such a system
CN109313617A (en) Load reduced non-volatile memory interface
TWI537737B (en) Method and system for transferring high-speed data within a portable device
KR100589227B1 (en) Apparatus capable of multi-interfacing memories and interfacing method of the same
CN105282372A (en) Camera command set host command translation
KR101691760B1 (en) Enabling a metadata storage subsystem
TWI492147B (en) Control method of storage apparatus
CN102855150B (en) A kind of method and system to equipment burning information to be programmed
CN102521190A (en) Hierarchical bus system applied to real-time data processing
KR102140297B1 (en) Nonvolatile memory devicee and data storage device including the same
US20090138673A1 (en) Internal memory mapped external memory interface
KR20150079889A (en) Executing a command within a transport mechanism based on a get and set architecture
KR20080000559A (en) Low-power solid state storage controller for cell phones and other portable appliances
CN112765070A (en) Data transmission debugging method and system, electronic equipment and storage medium
WO2020056610A1 (en) Storage apparatus and electronic device
KR20120067412A (en) Method and device of controlling memory area of the multi-port memory device in the memorry link architecture
Lehmann et al. Weasel: A platform-independent streaming-optimized SATA controller
CN213518255U (en) System on chip
JP4509906B2 (en) Virtual USB flash memory storage device having PCI Express

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right

Effective date of registration: 20191213

Address after: 200000 room 1032, Wu Lou, 555 Dongchuan Road, Minhang District, Shanghai.

Patentee after: Shanghai flying Mdt InfoTech Ltd

Address before: 518057 Guangdong province Shenzhen city Nanshan District high tech Zone South Hing a No. 9 Hongkong, Shenzhen building 6 floor

Patentee before: Shenzhen Dji Technology Co., Ltd.

TR01 Transfer of patent right