CN206133410U - JBOD board based on general memory system - Google Patents
JBOD board based on general memory system Download PDFInfo
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- CN206133410U CN206133410U CN201621067162.8U CN201621067162U CN206133410U CN 206133410 U CN206133410 U CN 206133410U CN 201621067162 U CN201621067162 U CN 201621067162U CN 206133410 U CN206133410 U CN 206133410U
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- Prior art keywords
- jbod
- plates
- chips
- common store
- store system
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- 238000004891 communication Methods 0.000 claims description 12
- 238000012544 monitoring process Methods 0.000 claims description 11
- 230000003068 static effect Effects 0.000 claims description 3
- 230000005540 biological transmission Effects 0.000 abstract description 4
- 230000003014 reinforcing effect Effects 0.000 abstract 1
- 230000008901 benefit Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000011144 upstream manufacturing Methods 0.000 description 3
- 238000009434 installation Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
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Abstract
The utility model discloses a JBOD board based on general memory system relates to computer spare part, installs and use in general memory system, is provided with a plurality of high speed connector on this JBOD board for connect hard disk back plate, the JBOD board passes through hard disk back plate and the direct interconnection of HDD signal, with extend system storage space, still be provided with 1X2e on this JBOD board upper reaches SAS controller is connected to miniSASHD interface, one of them mouthful, and another mouth connects the same JBOD board of next stage for the storage extension is cascaded in the system of doing, and set up SAS3.0 re on this JBOD board the driver chip for reinforcing JBOD board SAS3.0 signal driver ability, the firm and hard JBOD that has appeared of this JBOD cascades extension and SAS3.0 signal long distance transmission like this.
Description
Technical field
The utility model is related to computer parts, specifically a kind of JBOD plates based on common store system.
Background technology
Storage system is referred in computer by the various storage devices of storage program and data, control unit and management information
The equipment of scheduling（Hardware）And algorithm（Software）The system for being constituted.The main storage of computer can not simultaneously meet access speed
Hurry up, big and low cost the requirement of memory capacity, must have in a computer speed from slow to fast, the descending multistage layer of capacity
External memory, with optimum control dispatching algorithm and rational cost, constitutes and has the acceptable storage system of performance.Storage system
The performance of system status in a computer is increasingly important.
JBOD（Just a Bunch Of Disks, disk cluster）Be in field of storage on a base plate install carry
The storage device of multiple disc drivers.Different with RAID array, JBOD does not have the data point that front end logic is come on hyperdisk
Cloth, conversely, each disk is individually addressed, as separate storage resource, or a part for Intrusion Detection based on host software, or
It is an adapter card of RAID groups.JBOD is used to refer to also not according to RAID（RAID）System configuration is increasing
Plus the computer hard disc of serious forgiveness and improvement data access performance.JBOD does not bring any benefit using independent disk,
The benefits such as the fault-tolerant or better performances to be brought of any RAID can not be provided.
Utility model content
Demand and weak point of the utility model for the development of current technology, there is provided a kind of based on common store system
JBOD plates.
A kind of JBOD plates based on common store system described in the utility model, solve the technology that above-mentioned technical problem is adopted
Scheme is as follows：A kind of JBOD plates based on common store system, in being applied in common store system, its overall structure
For a pcb board card, a PM8054 chip, CPLD chips, some high speed connectors, a SAS3.0 Re- are integrated with thereon
Driver chips, 1X2 e-MiniSAS HD interfaces；Wherein, the PM8054 chips connect at a high speed with the CPLD chips, each
Connect device, SAS3.0 Re-driver chips, 1X2 e-MiniSAS HD interfaces and be all connected with communication；The PM8054 chips are used for
Storage extension and system cascade；The CPLD chips are used to control JBOD plates electrifying timing sequence and interrelated logic control；It is described
High speed connector is used to connect hard disk backboard to extend system memory space；One connects in the 1X2 e-MiniSAS HD interfaces
SAS controller in mouth connection system, another interface connects the same JBOD plates of next stage for doing system cascade storage extension；It is described
SAS3.0 Re-driver chips are used to strengthen JBOD plate SAS3.0 signal driving forces.
Preferably, 5 Xcede HD series of high speed connectors are provided with the JBOD plates.
Preferably, two SAS3.0 Re-driver chips are provided with the JBOD plates.
Preferably, 3 Xcede HD series of power connectors, memory and hardware monitoring cores are additionally provided with JBOD plates
Piece, the power connector, memory, hardware monitoring chip with the PM8054 chips connection communication；The hardware monitoring
Chip and respectively with the CPLD chips, high speed connector connection communication；The power connector is taken by grafting hard disk backboard
Electricity is powered for JBOD plates.
Preferably, the memory includes PROM, SRAM static RAM, NVSRAM.
Preferably, the hard disk monitoring chip adopts NCT7904D.
Preferably, clock chip, UART Debug Header, FRU field changeable lists are additionally provided with the JBOD plates
Unit, wherein, UART Debug Header are debugged for UART, and the clock chip, UART Debug Header, FRU
With the PM8054 chips connection communication.
Preferably, 2 Xcede HD series be provided with the JBOD plates lead and cut, during for interconnecting with hard disk backboard from lead
To effect.
The beneficial effect that a kind of JBOD plates based on common store system described in the utility model have compared with prior art
It is really：In common store system, JBOD plates one end described in the utility model is directly interconnected by hard disk backboard with HDD, is formed
The memory space of system itself；The other end is by the cascade storage extension of 1X2 e-MiniSAS HD Interface for System；And lead to
Cross SAS3.0 Re-driver chips strengthen JBOD plate SAS3.0 signal driving forces, it is achieved thereby that JBOD cascade extension with
And the transmission of SAS3.0 signal long-distances；Also, the utility model is novel, easy to use, storage expanded function is stronger, has
Preferable market popularization value.
Description of the drawings
Accompanying drawing 1 is the structural representation of the JBOD plates.
Specific embodiment
It is right below in conjunction with specific embodiment to make the purpose of this utility model, technical scheme and advantage become more apparent
A kind of JBOD plates based on common store system described in the utility model are further described.
For common store system, the utility model proposes a kind of JBOD plates based on common store system, installation makes
In common store system, some high speed connectors are provided with the JBOD plates, for connecting hard disk backboard, JBOD plates pass through
Hard disk backboard is directly interconnected with HDD signals, to extend system memory space；1X2 e-MiniSAS are additionally provided with the JBOD plates
HD interfaces, one of mouth connects upstream SAS controller, and another mouth connects the same JBOD plates of next stage, for doing system cascade
Storage extension；And SAS3.0 Re-driver chips are provided with the JBOD plates, are driven for strengthening JBOD plate SAS3.0 signals
Kinetic force；So the JBOD plates realize JBOD cascades extension and the transmission of SAS3.0 signal long-distances.
Embodiment：
A kind of JBOD plates based on common store system of the present embodiment, its overall structure as shown in Figure 1, the JBOD plates
For a pcb board card, in being applied in common store system, a Ports of SAS3.0 Expander 36 is integrated with thereon
（PM8054）Chip, CPLD chips, some high speed connectors, SAS3.0 Re-driver chips, a 1X2 e-MiniSAS
HD interfaces；Wherein, the PM8054 chips and the CPLD chips, each high speed connector, SAS3.0 Re-driver cores
Piece, 1X2 e-MiniSAS HD interfaces are all connected with communication；The PM8054 chips are used for storage extension and system cascade；It is described
CPLD chips are used to control JBOD plates electrifying timing sequence and interrelated logic control；The high speed connector is used to connect hard disk backboard
To extend system memory space；The one of mouth of the 1X2 e-MiniSAS HD interfaces connects upstream SAS controller, another
Mouth connects the same JBOD plates of next stage for doing system cascade storage extension；The SAS3.0 Re-driver chips are used to strengthen
JBOD plate SAS3.0 signal driving forces.
In JBOD plates described in the present embodiment, as shown in Figure 1,5 Xcede HD series of high speed connectors are provided with（CN0、
CN1、CN2、CN3、CN4）, for connecting hard disk backboard, and mechanical hard disk HDD is provided with hard disk backboard；The 1X2 e-
MiniSAS HD interfaces, support that 2 groups of X4 Lane SAS3.0 signal extensions, every e-MiniSAS HD cable support flank speed
For 12Gb/s.In common store system, described JBOD plates one end passes through 12GT/s SAS3.0 letters between hard disk backboard and HDD
Number direct interconnection, with extension system memory space itself；The JBOD plates other end is connected by e-MiniSAS HD cables
The onboard 1X2 e-MiniSAS HD interfaces of JBOD plates, one of interface connection upstream SAS controller e-MiniSAS HD connects
Mouthful, another interface connects the e-MiniSAS HD interfaces of the same JBOD plates of next stage, for doing system cascade storage extension.
In JBOD plates described in the present embodiment, as shown in Figure 1, the SAS3.0 Re-driver chips are provided with two,
The driving of X8 Lane SAS3.0 RX end signals can be supported.Meanwhile, 3 Xcede HD are additionally provided with the JBOD plates serial
Power connector（PWR0、PWR1、PWR2）, memory and hardware monitoring chip, the power connector, memory, hardware
Monitoring chip with the PM8054 chips connection communication；The hardware monitoring chip and respectively with the CPLD chips, high speed
Connector connection communication；The power connector can be plugged on the hard disk backboard, be JBOD by hard disk backboard power taking
Plate is powered；The memory includes PROM（Programmable read only memory）, SRAM static RAMs, NVSRAM（It is non-
Volatibility SRAM）；The hard disk monitoring chip adopts NCT7904D.
Additionally, in JBOD plates described in the present embodiment, being additionally provided with clock chip（Clock）、UART Debug Header、
FRU (Field Replace Unit) Field Replaceable Unit, wherein, UART Debug Header are debugged for UART,
UART（Universal Asynchronous Receiver/Transmitter) it is a kind of asynchronous receiving-transmitting transmitter；And institute
State clock chip, UART Debug Header, FRU with the PM8054 chips connection communication.
The installation of hard disk backboard for convenience, is provided with 2 Xcede HD series and leads and cut on the JBOD plates, for it is hard
Disk backboard play the guiding role when interconnecting.Using the utility model, can be with the realization of quickness and high efficiency based on common store system
JBOD plates are designed, and realize JBOD cascades extension and the transmission of SAS3.0 signal long-distances.
Above-mentioned specific embodiment is only concrete case of the present utility model, and scope of patent protection of the present utility model includes
But it is not limited to above-mentioned specific embodiment, any art that meet claims of the present utility model and any
The appropriate change or replacement that those of ordinary skill is done to it, should all fall into scope of patent protection of the present utility model.
Claims (8)
1. a kind of JBOD plates based on common store system, in being applied in common store system, it is characterised in that its entirety
Structure is a pcb board card, and a PM8054 chip, CPLD chips, some high speed connectors, a SAS3.0 are integrated with thereon
Re-driver chips, 1X2 e-MiniSAS HD interfaces；Wherein, the PM8054 chips and the CPLD chips, each height
Fast connector, SAS3.0 Re-driver chips, 1X2 e-MiniSAS HD interfaces are all connected with communication；The PM8054 chips
For storage extension and system cascade；The CPLD chips are used to control JBOD plates electrifying timing sequence and interrelated logic control；
The high speed connector is used to connect hard disk backboard to extend system memory space；One in the 1X2 e-MiniSAS HD interfaces
SAS controller in individual interface connecting system, another interface connects the same JBOD plates of next stage for doing system cascade storage extension；
The SAS3.0 Re-driver chips are used to strengthen JBOD plate SAS3.0 signal driving forces.
2. a kind of JBOD plates based on common store system according to claim 1, it is characterised in that on the JBOD plates
It is provided with 5 Xcede HD series of high speed connectors.
3. a kind of JBOD plates based on common store system according to claim 2, it is characterised in that on the JBOD plates
It is provided with two SAS3.0 Re-driver chips.
4. according to a kind of arbitrary JBOD plates based on common store system of claims 1 to 3, it is characterised in that JBOD plates
On be additionally provided with 3 Xcede HD series of power connectors, memory and hardware monitoring chips, the power connector, deposit
Reservoir, hardware monitoring chip with the PM8054 chips connection communication；The hardware monitoring chip and respectively with the CPLD
Chip, high speed connector connection communication；The power connector is powered by the power taking of grafting hard disk backboard for JBOD plates.
5. a kind of JBOD plates based on common store system according to claim 4, it is characterised in that the memory includes
PROM, SRAM static RAM, NVSRAM.
6. a kind of JBOD plates based on common store system according to claim 5, it is characterised in that the hard disk monitors core
Piece adopts NCT7904D.
7. a kind of JBOD plates based on common store system according to claim 6, it is characterised in that on the JBOD plates also
Clock chip, UART Debug Header, FRU Field Replaceable Units are provided with, wherein, UART Debug Header are used for
UART debug, and the clock chip, UART Debug Header, FRU with the PM8054 chips connection communication.
8. a kind of JBOD plates based on common store system according to claim 7, it is characterised in that set on the JBOD plates
Being equipped with 2 Xcede HD series and lead and cut, playing the guiding role during for interconnecting with hard disk backboard.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621067162.8U CN206133410U (en) | 2016-09-21 | 2016-09-21 | JBOD board based on general memory system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621067162.8U CN206133410U (en) | 2016-09-21 | 2016-09-21 | JBOD board based on general memory system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206133410U true CN206133410U (en) | 2017-04-26 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621067162.8U Expired - Fee Related CN206133410U (en) | 2016-09-21 | 2016-09-21 | JBOD board based on general memory system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206133410U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110703870A (en) * | 2019-09-12 | 2020-01-17 | 苏州浪潮智能科技有限公司 | JBOD mainboard and storage system |
-
2016
- 2016-09-21 CN CN201621067162.8U patent/CN206133410U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110703870A (en) * | 2019-09-12 | 2020-01-17 | 苏州浪潮智能科技有限公司 | JBOD mainboard and storage system |
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| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170426 Termination date: 20190921 |
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| CF01 | Termination of patent right due to non-payment of annual fee |