CN206097476U - Traffic signal light control system based on FPGA - Google Patents

Traffic signal light control system based on FPGA Download PDF

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Publication number
CN206097476U
CN206097476U CN201621088098.1U CN201621088098U CN206097476U CN 206097476 U CN206097476 U CN 206097476U CN 201621088098 U CN201621088098 U CN 201621088098U CN 206097476 U CN206097476 U CN 206097476U
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China
Prior art keywords
module
fpga
output
vehicle
control
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Expired - Fee Related
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CN201621088098.1U
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Chinese (zh)
Inventor
杨鹏
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Xijing University
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Xijing University
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Priority to CN201621088098.1U priority Critical patent/CN206097476U/en
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Publication of CN206097476U publication Critical patent/CN206097476U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model provides a traffic signal light control system based on FPGA, including the image detection sensor, the output of image detection sensor and the vehicle detection module's in the FPGA control input connection, vehicle detection module's output and vehicle flowrate statistics module's input connection, vehicle flowrate statistics module's output and LED control module's input connection, vehicle detection module, vehicle flowrate statistics module and LED control module connect the control of constitution FPGA, LED control module's the output and the input connection of LED lamp, utilize FPGA control to realize the control of LED lamp, can be according to the current vehicle flowrate in traffic crossing how much realize the automatic timing of traffic signal lamp, it is simple to have the circuit, advantages such as good reliability.

Description

A kind of traffic light control system based on FPGA
Technical field
This utility model is related to a kind of traffic light control system, and in particular to a kind of traffic light based on FPGA Control system.
Background technology
FPGA (Filed-Programmable Gate Array), i.e. field programmable gate array, are a kind of semi-custom electricity Road, is made up of configurable logic blocks, three parts of input/output module and interconnector.There is FPGA development process to invest Little, cycle is short, can program repeatedly, good confidentiality, the features such as autgmentability is strong, with the continuous progress of electronic fabrication processes, FPGA Integrated level more and more higher, stability becomes better and better, and price is but more and more lower, and FPGA has become Contemporary Digital design of circuit system One of preferred manner.
With the continuous improvement of our people's living standard, increasing personal and family has been owned by the private savings of oneself Car, a principal element for producing vehicle congestion are that the setting of urban traffic intersection traffic lights has such-and-such technology and pipe Reason problem.At present, the traffic light of China main cities traffic intersection all adopt the timing control of the chips such as single-chip microcomputer or PLC System, control form are single, it is impossible to adjusted according to the change of concrete traffic, and system peripherals circuit complexity, program are repaiied Change dumb, high expensive etc..
The content of the invention
In order to overcome the shortcoming of above-mentioned technology, the purpose of this utility model to there are provided a kind of traffic based on FPGA and believe Ship's light control system, can according to the current vehicle flowrate of traffic intersection number realizing the automatic timing of traffic light, with electricity Road is simple, it is highly reliable the advantages of.
In order to achieve the above object, the technical solution of the utility model is realized in:
A kind of traffic light control system based on FPGA, including image detecting senor 1, image detecting senor 1 Output control the input of vehicle detection module 2 in 6 with FPGA and be connected, the output of vehicle detection module 2 and vehicle flowrate The input connection of module 3, the output of vehicle flowrate module 3 are connected with the input of LED control module 4, vehicle detection module 2, Vehicle flowrate module 3 and LED control module 4 connect and compose FPGA controls 6, and the output of LED control module 4 is defeated with LED 5 Enter connection.
This utility model has the advantages that:The control of LED 5 is realized using FPGA controls 6, can be according to traffic The current vehicle flowrate in crossing number realizing the automatic timing of traffic light, have the advantages that circuit is simple, highly reliable.
Description of the drawings
Fig. 1 is structured flowchart of the present utility model.
Specific embodiment
Below in conjunction with the accompanying drawings this utility model is described in detail.
With reference to Fig. 1, a kind of traffic light control system based on FPGA, including image detecting senor 1, image detection The output of sensor 1 controls the input of vehicle detection module 2 in 6 with FPGA and is connected, the output of vehicle detection module 2 and wagon flow The input connection of amount statistical module 3, the output of vehicle flowrate module 3 are connected with the input of LED control module 4, vehicle detection Module 2, vehicle flowrate module 3 and LED control module 4 connect and compose FPGA controls 6, the output of LED control module 4 and LED The input connection of lamp 5.
Operation principle of the present utility model is:
The system receives the view data of 1 transmission of external image sensor with FPGA controls 6 as control core;By car Detection module 2 determines whether vehicle and passes through, and is counted by 3 pairs of vehicle flowrate quantity for passing through of vehicle flowrate module, LED Control module 4 is responsible for the result for receiving 3 statistics of vehicle flowrate module, according to corresponding rule, provides corresponding traffic light time, It is current to outside LED 5 to be controlled.

Claims (1)

1. a kind of traffic light control system based on FPGA, including image detecting senor (1), it is characterised in that:Image The input that the output of detection sensor (1) controls the vehicle detection module (2) in (6) with FPGA is connected, vehicle detection module (2) Output be connected with the input of vehicle flowrate module (3), the output of vehicle flowrate module (3) and LED control module (4) Input connection, vehicle detection module (2), vehicle flowrate module (3) and LED control module (4) connect and compose FPGA controls (6), the output of LED control module (4) is connected with the input of LED (5).
CN201621088098.1U 2016-09-28 2016-09-28 Traffic signal light control system based on FPGA Expired - Fee Related CN206097476U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621088098.1U CN206097476U (en) 2016-09-28 2016-09-28 Traffic signal light control system based on FPGA

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621088098.1U CN206097476U (en) 2016-09-28 2016-09-28 Traffic signal light control system based on FPGA

Publications (1)

Publication Number Publication Date
CN206097476U true CN206097476U (en) 2017-04-12

Family

ID=58481066

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621088098.1U Expired - Fee Related CN206097476U (en) 2016-09-28 2016-09-28 Traffic signal light control system based on FPGA

Country Status (1)

Country Link
CN (1) CN206097476U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116168536A (en) * 2023-02-07 2023-05-26 山东浪潮科学研究院有限公司 Traffic road flow balancing method, system and device based on FPGA

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116168536A (en) * 2023-02-07 2023-05-26 山东浪潮科学研究院有限公司 Traffic road flow balancing method, system and device based on FPGA

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GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170412

Termination date: 20190928