CN206022355U - Multi-project wafer fast packing plate - Google Patents

Abstract

This utility model is related to multi-project wafer fast packing plate, the package board includes the substrate with two sides signals layer, substrate is provided with external terminal solder ball, the substrate includes various sizes of element circuit, every element circuit surrounding includes preforming package enclosure wall, each unit circuit is surrounded a cavity by the enclosure wall, in the cavity paster, complete to encapsulate after gold thread welding.This utility model is broken the normal procedure the identical concept of all circuit units of substrate jigsaw, realize that encapsulation of the disparity items chip on same substrate is realized, in conjunction with realization of the innovative preforming process on substrate, base plate for packaging versatility is greatly improved, realizes that multi-project wafer fast packing is tested.

Description

Multi-project wafer fast packing plate

Technical field

This utility model is related to the fast packing of multi-project wafer, specifically refers to a kind of multi-project wafer fast packing plate, Belong to technical field of semiconductor encapsulation.

Background technology

With IC industry flourish, Chevron Research Company's multiple types, small number chip packaging and testing demand not Disconnected increase, how to be rapidly performed by wafer package, realize product electric performance test, to shorten time to market (TTM), increasingly into For product design company concern.

In general, in known wafer package technology, common encapsulating structure as shown in Figure 1 with normal shown in Fig. 2 Use substrate.In encapsulating structure shown in Fig. 1, the solder joint coordinate difference for different chips size is different, on chip, special exploitation with Coupling substrate 6a, golden finger solder joint 7a positions and number on substrate are determined according to wafer size and chip solder joint coordinate, finally Determine external terminal 10a numbers.Encapsulating after gold thread welding on this substrate completes wafer package.Which mainly includes a substrate 6a, A plurality of external terminal 10a are set on substrate 6a for the connection of substrate circuit and external circuit, the electricity of substrate 6a upper surfaces Road 8a is realized by the via 9a with Electric connection characteristic.

After the completion of the exploitation of aforesaid substrate element circuit, a plurality of same substrate unit u' arrangement form substrate strips (Fig. 3), base After every unit chip attachment, gold thread welding on lath, then protection is packaged to whole piece substrate strip.

This is designed as well known substrate package technique volume production cooked mode, by by a plurality of unit u' jigsaw to a base It is packaged on lath, the encapsulation that many cell substrates of whole piece are completed by one-time process.After the completion of encapsulation, then by element circuit Separate in substrate strip.

This kind of design structure is excellent, becomes the wafer package method that encapsulation volume production is commonly used.But in this kind of structure, a side Face, needs to carry out single substrate design for different chips, i.e., for various sizes of chip, will have corresponding base Lath, substrate versatility are poor；On the other hand, due to the demand of chip encapsulating, due to the encapsulating that the chip of different-thickness is used Mould is different, and the fund of mould and time are put into typically than larger.

As can be seen here, above-mentioned known chip package structure and substrate strip jigsaw structure can not meet the need of high universalizable Ask, be further to improve its versatility, reduce input cost, shorten product come into the market the time, it would be highly desirable to make encapsulating structure with The Curve guide impeller of substrate jigsaw.

Content of the invention

The purpose of this utility model is to provide a kind of multi-project wafer fast packing plate, in same substrate strip, realizes Multiple types substrate jigsaw, correspondingly realizes the fast packing test checking of multi-project wafer.

Realize that the technical scheme that this utility model purpose is adopted is：

A kind of multi-project wafer fast packing plate, including the substrate with two sides signals layer, substrate is provided with external terminal weldering Stannum ball, it is characterised in that：The substrate includes various sizes of element circuit, and every element circuit surrounding is sealed comprising preforming Dress enclosure wall, each unit circuit surrounds a cavity by the enclosure wall, in the cavity paster, complete packaging technology after gold thread welding.

Substrate in this utility model multi-project wafer fast packing plate is made up of different types of base board unit, a base Plate can correspond to the chip package base board of multiple types, realize that entry, multiple types chip are shared with a substrate, improve the suitable of substrate The property used.On the other hand, due to this encapsulating structure, before substrate paster, preforming encapsulating is made in the surrounding of substrate, in base Enclosure wall cavity is formed on plate, in the cavity after paster and gold thread welding, directly adding a cover on test or enclosure wall can test, it is to avoid Time and fund input needed for the new mould of different chips, improve the versatility of the encapsulating structure.

Description of the drawings

Fig. 1 is existing conventional substrate encapsulation structure schematic diagram.

The existing conventional substrate strip jigsaw mode top schematic diagrams of Fig. 2.

Fig. 3 is the unit section schematic diagram according to multi-project wafer fast packing plate of the present utility model.

Fig. 4 is according to entry substrate jigsaw mode top schematic diagram of the present utility model.

Specific embodiment

The structure of this utility model multi-project wafer fast packing plate as shown in figure 3, including a universal pre-packaged substrate, The encapsulation enclosure wall of epoxy resin preforming is made on base board unit, and each unit circuit is surrounded into by enclosure wall, shape on substrate Squarely cavity, in the cavity after paster, welding gold thread, for test use after adding a cover son on cavity, it is to avoid for different The mould input encapsulated by product substrate, shortens product and puts goods on the market the time, reduce product packaging cost.Different types of Base board unit jigsaw obtains substrate as indicated at 4, it is to avoid a kind of product, a substrate, reduces substrate processing die sinking engineering cost With.

It is to reach technological means and effect that predetermined utility model purpose is taken for this utility model is expanded on further, with Lower combination accompanying drawing preferred embodiment, to according to multi-project wafer fast packing plate of the present utility model and preparation method thereof, encapsulation The specific embodiment of method, structure, feature and its effect, describe in detail as after.

According to a preferred embodiment of the present utility model, a kind of multi-project wafer fast packing method is disclosed, Fig. 3 is multinomial The generalized section of mesh chip fast packing plate, Fig. 4 are the multi-project wafer base plate for packaging jigsaw top schematic diagrams.

Referring initially to shown in accompanying drawing 3, the multi-project wafer fast packing plate, which is illustrated as preferable reality of the present utility model Structure is applied, multi-project wafer fast packing knot tying of the present utility model mainly includes a substrate 6b, and how several external terminals are welded Stannum ball 10b, solder ball 10b are for being externally bound to external printed circuit board.

Substrate 6b meets the general concept of wiring board, and as is generally understood, which has and only two faces, simultaneously carries out pre- The placement of encapsulation body of wall 11b, in addition simultaneously carry out external terminal solder ball puts plant.Whole encapsulating structure is from signal of telecommunication conducting side For formula, identical with encapsulating structure shown in traditional Fig. 1, realize that chip electrode and the electric attribute of substrate gold finger connect by gold thread Connect, electrical properties are conducted to by substrate another side by via on substrate, and are connected with external terminal solder ball.

But in this utility model, before mounting chip on substrate 6a, first pre- in each element circuit surrounding injection The Plastic Package enclosure wall 11b of molding, forms the cavity base board unit structure with fence structure.When chip is verified, chip is pasted It is filled in the cavity of enclosure wall 11b formation, then drop glue or plus cover for protecting.So before chip attachment, prepare in advance Cavity board structure, when need to verify, directly paster, gold thread binding in the cavity, reduces correspondingly designing substrate, mould according to chip Engineering cost and the time cycle.

Many for Chevron Research Company's product category, the larger present situation of product type diversity is further to improve packaging efficiency, Shorten wafer package to put goods on the market the time with product, different types of base board unit is carried out by cost needed for reducing wafer package Jigsaw is combined, and obtains entry substrate jigsaw structure as shown in Figure 4.

In the traditional substrate 1' jigsaw modes of Fig. 2, substrate strip has been divided into tri- areas of 3', 4', 5', and Er Sange areas are by phase Same base board unit u' compositions, base board unit u' contain identical external terminal b'.Fluting 2' in substrate strip respectively will be separated out, For Stress Release.In this utility model multi-project wafer fast packing substrate used thereof 1, it is by different types of base board unit group Plate is merged to a substrate strip, pass the imperial examinations at the provincial level 1 point of spr substrate of figure is 3,4,5 three areas, and 3rd area are made up of base board unit 3u, and 4th area are by base Slab element 4u is constituted, and 5th area are made up of base board unit 5u, and feature is 3u, and 4u, 5u base board unit only needs consistency of thickness, unit size, Welding golden finger arrangement, circuit distribution, external terminal (3b, 4b, 5b) number and position each can be arranged as needed, improve The suitability of substrate, for the package requirements of different money products, improves packaging efficiency.Each fluting 2 that distinguishes between cutting is used for stress Release.

With regard to this encapsulated wafer, wafer thickness should be less than pre-packaged enclosure wall height, or should be ground to wafer thickness and be less than Chip attachment is carried out after enclosure wall height.Chip length and width size should be less than the cavity size that enclosure wall on this substrate is formed, with can be complete Into chip attachment process.By pre-packaged encapsulating process, not exclusively encapsulated on substrate before paster, therefore tradition can be avoided The launch products time is shortened in the time of fully enclosed mould and fund input after paster in technique, reduces cost.Separately Outward, the structure of substrate jigsaw shown in Fig. 4, by multiple different types of base board unit jigsaw in a substrate strip, realizes one The pre-packaged of many money base board units is completed in substrate strip, realizes that multi-project wafer, multiple types chip are quick on a substrate Encapsulation.

It is illustrated using the jigsaw mode in three areas only for three kinds of wafer substrate units above, this utility model Substrate jigsaw mode is applied to the combination jigsaw of multiple wafer substrates, when wafer variety changes, needs to be divided into substrate strip The region of respective amount, concrete structure are same as the previously described embodiments with using method, and here is omitted.

The above, is only preferred embodiment of the present utility model, not this utility model is done any formal Restriction, although this utility model is disclosed above with preferred embodiment, but is not limited to this utility model, any ripe Professional and technical personnel is known, in the range of without departing from technical solutions of the utility model, when in the technology using the disclosure above Hold the Equivalent embodiments that makes a little change or be modified to equivalent variations, as long as without departing from technical solutions of the utility model Hold, according to technical spirit of the present utility model to any simple modification made for any of the above embodiments, equivalent variations and modification, still Belong in the range of technical solutions of the utility model.

Claims (4)

1. a kind of multi-project wafer fast packing plate, including the substrate with two sides signals layer, substrate is provided with external terminal scolding tin Ball, it is characterised in that：The substrate includes various sizes of element circuit, and every element circuit surrounding includes preforming package Each unit circuit is surrounded a cavity by enclosure wall, the enclosure wall, in the cavity paster, complete to encapsulate after gold thread welding.

2. multi-project wafer fast packing plate according to claim 1, it is characterised in that：The element circuit be size not Same base board unit circuit, different element circuits constitute different areas, and different areas is combined into the substrate for whole piece.

3. multi-project wafer fast packing plate according to claim 2, it is characterised in that：Gold for the welding of chip gold thread , located at the chip attachment face of substrate, two sides signal interlayer is useful in the logical of receiving wiring interlayer coupling connection circuit for finger Hole.

4. multi-project wafer fast packing plate according to claim 3, it is characterised in that：Use is provided with element circuit cavity In the golden finger of gold thread welding, the signal of telecommunication mounts the circuit in face, through hole realization and external terminal solder ball by being located at chip Electrical connection.