CN206004646U - Numeral input multiplex circuit - Google Patents
Numeral input multiplex circuit Download PDFInfo
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- CN206004646U CN206004646U CN201620934799.6U CN201620934799U CN206004646U CN 206004646 U CN206004646 U CN 206004646U CN 201620934799 U CN201620934799 U CN 201620934799U CN 206004646 U CN206004646 U CN 206004646U
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Abstract
This utility model is related to a kind of numeral input multiplex circuit, including：Digital signal state detection unit, for by being compared with high-level threshold and low level threshold value, detect the digital signal of effective status, the level of described digital signal is less than described low level threshold value or it is effective status more than during described high-level threshold；Signal condition unit, for nursing one's health into low level digital signal by the level of the digital signal of effective status；Described digital signal state detection unit is connected with described signal condition unit.This utility model structure is simple, low cost, compatible high effective and low effective digital signal, furthermore it is possible to easily set the decision threshold of supplied with digital signal, it is accurate that wide ranges, border set.
Description
Technical field
This utility model belongs to technical field of automotive electronics, more particularly, to a kind of numeral input multiplex circuit.
Background technology
At present, there is the controller of input/output function, especially automobile instrument, engineering machinery control device and factory certainly
Dynamicization product has larger proportion in electronic product.Wherein, input signal is generally provided by various kinds of sensors, by these biographies
Sensor, controller can perceive outer environment state, and thus judges output.Input signal is broadly divided into digital quantity signal
And analog signalses, and digital quantity signal, according to the difference of trigger condition, can be divided into high useful signal and low useful signal.In reality
During border uses, instrument or controller would generally correspond to different control objects, lead to external digital input signal to have
Multiformity and unpredictability, the digital signal output of the application that such as same controller has is low effectively, and some meetings
High effectively, these can lead to input port definition uncertain, or in application process, due to outside input change lead to former
It is unsatisfactory for requirement etc. to design.
Therefore be necessary to provide a kind of compatible height effective and low significant digits signal numeral input multiplex circuit.
Utility model content
Based on this, for above-mentioned technical problem, provide a kind of numeral input multiplex circuit.
For solving above-mentioned technical problem, this utility model adopts the following technical scheme that：
A kind of numeral input multiplex circuit, including：
Digital signal state detection unit, for by being compared with high-level threshold and low level threshold value, detecting
Go out the digital signal of effective status, the level of described digital signal is less than described low level threshold value or is more than described high level threshold
During value, it is effective status；
Signal condition unit, for nursing one's health into low level digital signal by the level of the digital signal of effective status；
Described digital signal state detection unit is connected with described signal condition unit.
Described digital signal state detection unit include the first operational amplifier, the second operational amplifier, first resistor,
Two resistance, 3rd resistor, the 4th resistance, the 5th resistance, the 6th resistance and the 7th resistance, described first operational amplifier and
The positive power source terminal of the second operational amplifier is all connected with the first power supply, and negative power end is all grounded, described first operational amplifier
In-phase input end accesses described digital signal, its inverting input and described 4th resistance and the 5th electricity through described first resistor
One end of resistance connects, and the other end of described 4th resistance is connected with described first power supply, and the other end of described 5th resistance is through institute
State the 6th resistance and the 7th resistance eutral grounding, described second resistance one end is connected with described 5th resistance and the 6th resistance, separately
Described digital signal, the in-phase input end of described second operational amplifier and described 6th resistance and the 7th resistance are accessed in one end
Connect, its inverting input accesses described digital signal through described 3rd resistor；
Described signal condition unit includes audion, the 8th resistance, the 9th resistance and the tenth resistance, described 8th resistance
And the 9th one end of resistance be connected with the outfan of described first operational amplifier and the second operational amplifier respectively, this
The other end of eight resistance and the 9th resistance is all connected with the base stage of described audion, and the colelctor electrode of described audion is through described
Ten resistance are connected with second source, and its emitting stage is grounded.
Described high-level threshold meets：
Described low level threshold value meets：
Wherein, VIHFor high-level threshold, VILFor low level threshold value, V1 is the first power supply, and R4, R5, R6, R7 are respectively the
Four resistance, the 5th resistance, the 6th resistance and the 7th resistance.
This utility model structure is simple, low cost, first passes through digital signal state detection unit and detects effective status
No matter then the digital signal of this effective status nursed one's health into low level digital signal by signal condition unit by digital signal
The digital signal of input is high useful signal or low useful signal, can be received and know by the low effective port of controller MCU
, do not overcome and lead to due to multiformity and the unpredictability of the digital signal of outside input controller MCU compatible
High effectively and low effective digital signal, furthermore it is possible to easily set the decision threshold of supplied with digital signal, wide ranges, side
Boundary sets accurately.
Brief description
This utility model is described in detail with reference to the accompanying drawings and detailed description：
Fig. 1 is structural representation of the present utility model.
Specific embodiment
As shown in figure 1, a kind of numeral input multiplex circuit, including digital signal state detection unit 11 and signal condition
Unit 12, digital signal state detection unit 11 is connected with signal condition unit 11.
Digital signal state detection unit 11 is used for by being compared with high-level threshold and low level threshold value, detection
Go out the digital signal of effective status.
Wherein, the level of digital signal is less than low level threshold value (low effectively) or more than high-level threshold (high effectively)
When, the state of this digital signal is effective status, and when digital signal level is more than low level threshold value and is less than high-level threshold,
The state of this digital signal is vacant state.
Signal condition unit 12 is used for for the level of the digital signal of effective status nursing one's health into low level digital signal.
This utility model numeral input multiplex circuit first passes through digital signal state detection unit 11 and detects effective status
Digital signal, then the digital signal of this effective status is nursed one's health into by low level digital signal by signal condition unit 12,
The digital signal no matter inputting is high useful signal or low useful signal, can be received by the low effective port of controller MCU
And identify, overcome and lead to due to multiformity and the unpredictability of the digital signal of outside input the controller MCU cannot
Compatible high effectively and low effective digital signal, furthermore it is possible to easily set the decision threshold of supplied with digital signal, scope
Wide, border sets accurately.
Specifically, digital signal state detection unit 11 include the first operational amplifier U1A, the second operational amplifier U1B,
First resistor R1, second resistance R2,3rd resistor R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6 and the 7th resistance
R7.
The positive power source terminal of the first operational amplifier U1A and the second operational amplifier U1B is all connected with the first power supply V1, bears
Power end is all grounded, the in-phase input end of the first operational amplifier U1A through first resistor R1 incoming digital signal, its anti-phase input
End is connected with one end of the 4th resistance R4 and the 5th resistance R5, and the other end of the 4th resistance R4 is connected with the first power supply V1, the
The other end of five resistance R5 is grounded through the 6th resistance R6 and the 7th resistance R7, first resistor R2 one end and the 5th resistance R5 and
6th resistance R6 connects, other end incoming digital signal, the in-phase input end of the second operational amplifier U1B and the 6th resistance R6 with
And the 7th resistance R7 connect, its inverting input is through 3rd resistor R3 incoming digital signal.
Digital signal state detection unit 11 with two amplifiers as core, by input digital signal voltage VINWith
Predetermined threshold value is compared, and exports comparative result respectively.The voltage of the first power supply V1 through the 4th resistance R4, the 5th resistance R5,
The series connection partial pressure of the 6th resistance R6 and the 7th resistance R7, produces high-level threshold VIH, low level threshold value VILAnd vacantly input
When datum VNO：
Signal condition unit 12 includes audion Q1, the 8th resistance R8, the 9th resistance R9 and the tenth resistance R10.
One end of 8th resistance R8 and the 9th resistance R9 respectively with the first operational amplifier U1A and the second operation amplifier
The outfan of device U1B connects, and the other end of the 8th resistance R8 and the 9th resistance R9 is all connected with the base stage of audion Q1, and three
The colelctor electrode of pole pipe Q1 is connected with second source V2 through the tenth resistance R10, and its emitting stage is grounded.
Input signal VINWith VILAnd VIHIt is compared, if VIN<VIL, the outfan of the second operational amplifier U1B is defeated
Go out for height, the outfan of the first operational amplifier U1A is output as low, then now audion Q1 saturation conduction, and output Vout is low；
If VIN>VIH, the outfan of the first operational amplifier U1A is output as height, and the outfan of the second operational amplifier U1B is output as
Low, then now audion Q1 saturation conduction, Vout is output as low；If input is hanging, VIL=VNO>VILAnd VIL=VNO<VIH, the
The outfan of two operational amplifier U1B is output as low, and the outfan of the first operational amplifier U1A is output as low, then now three pole
Pipe Q1 can not saturation conduction, Vout is output as height；If VIN>VILAnd VIN<VIH, the outfan of the second operational amplifier U1B is defeated
Go out for low, the outfan of the first operational amplifier U1A be output as low, then now audion Q1 can not saturation conduction, Vout is defeated
Go out for height.
Only the output Vout of audion Q1 need to be inputted to the low effective port of controller MCU, you can realize high effectively with
The compatibility of low effective digital signal.
This utility model carries out state-detection and state isolation using operational amplifier, and circuit reliability is good.
Taking the system using 12V the first power supply V1,3.3V second source V2 as a example, define VIHFor 8V, VILFor 2V, that is, high
It is all considered to high level in 8V, be all considered to low level less than 2V.
R1=100k, R2=10k, R3=100k, R4=3.9k, R5=3k, R6=3k, R7=2k, R8=100k, R9=
100k, R=10k.
, all using LM2904, audion Q1 adopts BC338 for first operational amplifier U1A, the second operational amplifier U1B.
Low level threshold value
High-level threshold
Hanging datum
When outside input is for digital signal, the homophase input terminal voltage of the first operational amplifier U1A is VIN, anti-phase input
Hold as 8.07V, the anti-phase input terminal voltage of the second operational amplifier U1B is VIN, in-phase input end is 2.02V.
If VIN<2.02V, then the first operational amplifier U1A be output as low, the second operational amplifier U1B is output as
Height, then audion Q1 saturation conduction, Vout exports low level；If VIN>8.07V, then the first operational amplifier U1A be output as
Height, the second operational amplifier U1B is output as low, then audion Q1 saturation conduction, and output Vout is low level；If VIN>
2.02V and VIN<8.07V, then the first operational amplifier U1A be output as low, the second operational amplifier U1B is output as low, then
Audion Q1 ends, and output Vout is high level；If input is hanging, the in-phase input end of the first operational amplifier U1A and
The inverting input of the second operational amplifier U1B is equal to VNOFor 5.04V, now VNO>2.02V and VNO<8.07V, then the first computing
Amplifier U1A is output as low, and the second operational amplifier U1B is output as low, then audion Q1 cut-off, and output Vout is high electricity
Flat.
The present embodiment numeral input multiplex circuit is low effective status in the digital signal inputting or high effective status is
And if only if VIN<2.02V or VIN>Low level digital signal is just nursed one's health into, so as to be had by the low of controller MCU during 8.07V
Effect port receives and identifies, and enables controller MCU compatible high effective and low effective digital signal.
But, those of ordinary skill in the art is it should be appreciated that above embodiment is intended merely to explanation originally
Utility model, and be not used as being to restriction of the present utility model, as long as in spirit of the present utility model, to
The change of upper described embodiment, modification all will fall in Claims scope of the present utility model.
Claims (3)
1. a kind of numeral input multiplex circuit is it is characterised in that include：
Digital signal state detection unit, for by being compared with high-level threshold and low level threshold value, being tested with
The digital signal of effect state, when the level of described digital signal is less than described low level threshold value or is more than described high-level threshold
It is effective status；
Signal condition unit, for nursing one's health into low level digital signal by the level of the digital signal of effective status；
Described digital signal state detection unit is connected with described signal condition unit.
2. a kind of numeral input multiplex circuit according to claim 1 is it is characterised in that described digital signal state-detection
Unit include the first operational amplifier, the second operational amplifier, first resistor, second resistance, 3rd resistor, the 4th resistance,
Five resistance, the 6th resistance and the 7th resistance, the positive power source terminal of described first operational amplifier and the second operational amplifier is equal
It is connected with the first power supply, negative power end is all grounded, the in-phase input end of described first operational amplifier connects through described first resistor
Enter described digital signal, its inverting input is connected with one end of described 4th resistance and the 5th resistance, described 4th resistance
The other end be connected with described first power supply, the other end of described 5th resistance connects through described 6th resistance and the 7th resistance
Ground, described second resistance one end is connected with described 5th resistance and the 6th resistance, and the other end accesses described digital signal, described
The in-phase input end of the second operational amplifier is connected with described 6th resistance and the 7th resistance, and its inverting input is through described
Three resistance access described digital signal；
Described signal condition unit includes audion, the 8th resistance, the 9th resistance and the tenth resistance, described 8th resistance and
One end of 9th resistance is connected with the outfan of described first operational amplifier and the second operational amplifier respectively, the 8th electricity
The other end of resistance and the 9th resistance is all connected with the base stage of described audion, and the colelctor electrode of described audion is through the described tenth electricity
Resistance is connected with second source, and its emitting stage is grounded.
3. a kind of numeral input multiplex circuit according to claim 1 is it is characterised in that described high-level threshold meets：
Described low level threshold value meets：
Wherein, VIHFor high-level threshold, VILFor low level threshold value, V1 is the first power supply, and R4, R5, R6, R7 are respectively the 4th electricity
Resistance, the 5th resistance, the 6th resistance and the 7th resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620934799.6U CN206004646U (en) | 2016-08-24 | 2016-08-24 | Numeral input multiplex circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620934799.6U CN206004646U (en) | 2016-08-24 | 2016-08-24 | Numeral input multiplex circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206004646U true CN206004646U (en) | 2017-03-08 |
Family
ID=58197112
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620934799.6U Active CN206004646U (en) | 2016-08-24 | 2016-08-24 | Numeral input multiplex circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206004646U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108596592A (en) * | 2018-04-19 | 2018-09-28 | 深圳鼎智通讯股份有限公司 | A kind of triggering lock machine method of intelligent terminal |
| CN115372805A (en) * | 2022-10-25 | 2022-11-22 | 苏州路之遥科技股份有限公司 | Method for determining whether external input digital signal is suspended and invalid |
-
2016
- 2016-08-24 CN CN201620934799.6U patent/CN206004646U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108596592A (en) * | 2018-04-19 | 2018-09-28 | 深圳鼎智通讯股份有限公司 | A kind of triggering lock machine method of intelligent terminal |
| CN115372805A (en) * | 2022-10-25 | 2022-11-22 | 苏州路之遥科技股份有限公司 | Method for determining whether external input digital signal is suspended and invalid |
| CN115372805B (en) * | 2022-10-25 | 2022-12-20 | 苏州路之遥科技股份有限公司 | Method for determining whether external input digital signal is suspended and invalid |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |