CN205883444U - Surveillance video intelligent display system - Google Patents
Surveillance video intelligent display system Download PDFInfo
- Publication number
- CN205883444U CN205883444U CN201620738573.9U CN201620738573U CN205883444U CN 205883444 U CN205883444 U CN 205883444U CN 201620738573 U CN201620738573 U CN 201620738573U CN 205883444 U CN205883444 U CN 205883444U
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- China
- Prior art keywords
- video
- video signal
- dvi
- output interface
- interface circuit
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- Expired - Fee Related
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- 238000000034 method Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- 230000005856 abnormality Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000001314 paroxysmal effect Effects 0.000 description 1
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Abstract
The utility model discloses a surveillance video intelligent display system, including FPGA chip, ARM treater, a plurality of memory and a plurality of video output interface circuit, the FPGA chip is used for changing the later stage video signal in order to obtain DVI form or VGA form to the original video signal of received RGB form and/or YUV form, every memory all links to each other with FPGA chip electrical property, the ARM treater is used for controlling switching on and breaking off of every video output interface circuit, every video output interface circuit all is used for the DVI interface through the monogamy, export the later stage video signal of received DVI form or VGA form to the display device of monogamy. The utility model discloses not only can handle the original video signal of the multiple resolution ratio of multiple form, can also pass through an interface, support the output of multiple video signal.
Description
Technical field
This utility model relates to a kind of monitor video intelligent display system.
Background technology
The physical basis that video monitoring is every profession and trade key sector or important place monitors in real time, administration section can lead to
Cross it and obtain valid data, image or acoustic information, the process of paroxysmal abnormality event is monitored timely and remembers, use
With provide efficiently, in time commander and height, arrange police strength, settle a case.
Along with science and technology is maked rapid progress, processing system for video application is increasingly extensive, with popular Working Life is the closest.One
As processing system for video, disposal ability, output interface support to video format are all that comparison is single, such as: can not process not
Various video signal can not be exported with video signal, single interface of the resolution of form difference.
Utility model content
In order to overcome the deficiencies in the prior art, the purpose of this utility model is to provide a kind of monitor video intelligent display system
System, it solution can must not process video signal that different-format difference differentiates and single interface can not export various video signal
Problem.
The purpose of this utility model realizes by the following technical solutions:
A kind of monitor video intelligent display system, including fpga chip, arm processor, some memorizeies and some regard
Frequently output interface circuit；Fpga chip is for carrying out turning to the raw video signal of the rgb format received and/or yuv format
Changing to obtain the later stage video signal of DVI form or VGA form, each memorizer is all electrical connected with fpga chip, ARM process
Device is for controlling conducting and the disconnection of each video output interface circuit, and each video output interface circuit is used to by a pair
The DVI interface answered, exports the display device to a correspondence by the later stage video signal of the DVI form received or VGA form.
Preferably, each memorizer is DDR3SDRAM memorizer.
Preferably, the quantity of described memorizer is four.
Preferably, the quantity of described video output interface circuit is four, and the quantity of DVI interface is four, display device
Quantity be four.
Compared to existing technology, the beneficial effects of the utility model are:
The simple in construction of this monitor video intelligent display system, can not only process the original of the multiple resolution of multiple format
Video signal, moreover it is possible to by an interface, supports various video signal output.Meanwhile, the setting of arm processor can also make
The service behaviour of monitor video intelligent display system is more stable, so that the video frequency output performance of display device is more preferably.
Accompanying drawing explanation
Fig. 1 is the structure chart of this utility model monitor video intelligent display system.
Detailed description of the invention
Below, in conjunction with accompanying drawing and detailed description of the invention, this utility model is described further:
As it is shown in figure 1, a kind of monitor video intelligent display system, not only possess at the video signal of multi-format multiresolution
Reason ability, also has the output function that single interface supports the video signal of multiple format, and it specifically includes at fpga chip, ARM
Reason device, some memorizeies and some video output interface circuit.
Fpga chip is for changing to obtain to the raw video signal of the rgb format received and/or yuv format
The later stage video signal of DVI form or VGA form.Wherein, fpga chip is converted to the later stage and regards raw video signal
Frequently signal is existing technology.Concrete, the front end of fpga chip is responsible for receiving raw video signal, and raw video signal exists
After fpga chip is changed, export later stage video signal through the rear end of fpga chip.Fpga chip can process rgb format
With the raw video signal of yuv format, and generate the later stage video signal of DVI form or VGA form.
Each memorizer is all electrical connected with fpga chip.Memorizer for fpga chip conversion raw video signal time
Cache.As preferably, each memorizer can be all DDR3SDRAM memorizer.The optimal number of described memorizer is
Four.Concrete, two memorizeies therein may be used for the high speed of the raw video signal of the front end receiver of fpga chip and delay
Depositing, two other memorizer may be used for the cache of the converted later stage video signal of the rear end of fpga chip.
Arm processor is for controlling conducting and the disconnection of each video output interface circuit.Each video output interface electricity
Road is used to the DVI interface by a correspondence, exports the later stage video signal of the DVI form received or VGA form to one
Corresponding display device.Video output interface circuit can either identify the later stage video signal of DVI form, also can identify VGA lattice
The later stage video signal of formula, in like manner, DVI interface possesses above-mentioned functions.As preferably, the number of described video output interface circuit
Amount can be four, and the quantity of corresponding DVI interface is four, and the quantity of corresponding display device is also four.
When the quantity of video output interface circuit is four, later stage video signal is divided into four tunnels by fpga chip.ARM
Processor controls four video output interface circuit successively, and one of them video output interface circuit of concrete control successively is led
Logical, and remaining three video output interface circuit disconnects, so that corresponding display device carries out video and shows.Now,
The video of four display devices of human eye viewing remains simultaneous display.
It will be apparent to those skilled in the art that can technical scheme as described above and design, make other various
Corresponding change and deformation, and all these change and deformation all should belong to the protection of this utility model claim
Within the scope of.
Claims (4)
1. a monitor video intelligent display system, it is characterised in that include fpga chip, arm processor, some memorizeies with
And some video output interface circuit；Fpga chip is for believing the original video of the rgb format received and/or yuv format
Number carry out changing to obtain the later stage video signal of DVI form or VGA form, all electrical with the fpga chip phase of each memorizer
Even, arm processor is for controlling conducting and the disconnection of each video output interface circuit, and each video output interface circuit is all used
In the DVI interface by a correspondence, the later stage video signal of the DVI form received or VGA form is exported to a correspondence
Display device.
2. monitor video intelligent display system as claimed in claim 1, it is characterised in that each memorizer is
DDR3SDRAM memorizer.
3. monitor video intelligent display system as claimed in claim 2, it is characterised in that the quantity of described memorizer is four
Individual.
4. monitor video intelligent display system as claimed in claim 1, it is characterised in that described video output interface circuit
Quantity is four, and the quantity of DVI interface is four, and the quantity of display device is four.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620738573.9U CN205883444U (en) | 2016-07-11 | 2016-07-11 | Surveillance video intelligent display system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620738573.9U CN205883444U (en) | 2016-07-11 | 2016-07-11 | Surveillance video intelligent display system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205883444U true CN205883444U (en) | 2017-01-11 |
Family
ID=57696494
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620738573.9U Expired - Fee Related CN205883444U (en) | 2016-07-11 | 2016-07-11 | Surveillance video intelligent display system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205883444U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108053344A (en) * | 2017-12-19 | 2018-05-18 | 天津天地伟业信息系统集成有限公司 | Electronic certificate demonstration system and electronic certificate demonstration video correction method |
| CN115766978A (en) * | 2022-11-11 | 2023-03-07 | 武汉华之洋科技有限公司 | Computer video display and admission integrated display and method |
-
2016
- 2016-07-11 CN CN201620738573.9U patent/CN205883444U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108053344A (en) * | 2017-12-19 | 2018-05-18 | 天津天地伟业信息系统集成有限公司 | Electronic certificate demonstration system and electronic certificate demonstration video correction method |
| CN115766978A (en) * | 2022-11-11 | 2023-03-07 | 武汉华之洋科技有限公司 | Computer video display and admission integrated display and method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| CP02 | Change in the address of a patent holder | ||
| CP02 | Change in the address of a patent holder |
Address after: 510000 room 414, room 413, No. 662, Huangpu Avenue middle, Tianhe District, Guangzhou City, Guangdong Province (office only) Patentee after: GUANGZHOU HONGSEN TECHNOLOGY Co.,Ltd. Address before: 510665, room 12, No. 301, Yun Yun Road, Guangzhou, Guangdong, Tianhe District Patentee before: GUANGZHOU HONGSEN TECHNOLOGY Co.,Ltd. |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170111 |