CN205880856U - Control unit with chip selection function - Google Patents
Control unit with chip selection function Download PDFInfo
- Publication number
- CN205880856U CN205880856U CN201620562645.9U CN201620562645U CN205880856U CN 205880856 U CN205880856 U CN 205880856U CN 201620562645 U CN201620562645 U CN 201620562645U CN 205880856 U CN205880856 U CN 205880856U
- Authority
- CN
- China
- Prior art keywords
- pin
- data
- address bus
- port
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Small-Scale Networks (AREA)
Abstract
The utility model provides a control unit with chip selection function, relates to a control unit with chip selection function who is used for power module, and it includes analog input interface for collect the analog quantity data, carry to CPU, CPU handles the processing of analog quantity data, through LCD, LED and keyboard interface outlet, data address bus interface sets up in CPU, LAN communication interface is used for data transmission, RS232 communication interface is used for data transmission, CAN communication interface is used for data transmission, CPU is provided with the chip selection circuit, and the chip selection circuit includes decoder U21 and AND gate U14. Electrical power generating system's intellectuality has been realized in being applicable to power monitoring to the monitoring module, and exchange through all kinds of communication functions and external data has realized the measurement to the AC/DC power supply of system, and the control shows, the function of warning and management, extension through the communication function realized with the data interchange of other intermodules of system, improve system stability.
Description
Technical field
This utility model relates to a kind of power circuit, is specifically related to a kind of prison with chip select functionality for supply module
Control unit.
Background technology
Monitoring unit in supply module, simple in construction in prior art, it is impossible to good and ambient systems compatibility, use
Inconvenience, narrow application range.
Summary of the invention
In view of this, main purpose of the present utility model is to provide a kind of applied widely, sheet choosing to have sheet easily
Select the monitoring unit of function.
For reaching above-mentioned purpose, the technical solution of the utility model is achieved in that
A kind of monitoring unit with chip select functionality, it includes analog input interface, is used for collecting analog data, defeated
Deliver to CPU；CPU processes the process of analog data, is exported by LCD, LED and keyboard interface；Data/address bus interface,
It is arranged at CPU；LAN communication interface transmits for data；RS232 communication interface transmits for data；CAN communication interface is used for counting
According to transmission；
Described CPU is provided with chip select circuit, and described chip select circuit includes decoder U21, and door U14,3.3V DC source,
Input pin 1A, pin 2B, pin 3C, input port CS_IO, input port RD, input port WE0, port CSDO1, enable
Port CSKEY_T, enable port CSLCD_T, enable port CSLED_T；
The annexation of circuit is: the input pin 1A of decoder U21, pin 2B, pin 3C and 3 bit slices select signal port
A [0], port A [1], port A [2] are connected, and 2 ends of input pin 6CS1 and resistance R87 are connected, 1 end of resistance R87 and 3.3V
DC source is connected, input pin 4CS2 and being connected with the Y end of door U14, and input pin 5CS3 is connected with input port CS_IO,
It is connected with input port RD, input port WE0 respectively with two input port A, the input port B of door U14；Decoder U21's
Output port Y015 is connected with the enable port CSKEY_T of keyboard, the enable port CSLCD_T phase of output port Y114 with LCD
Even, the enable port CSLED_T of output port Y213 with LED is connected, and output port Y312 is connected with port CSDO1.
Wherein, described CPU is ARM7 chip.
Wherein, described CPU includes pin ADIN0, pin ADIN1, pin ADIN2, pin ADIN3, pin ADIN4, pipe
Foot ADIN5, pin ADIN6, pin ADIN7, pin ADIN8, pin ADIN9, pin ADIN10, described pin ADIN0, pin
ADIN1, pin ADIN2, pin ADIN3, pin ADIN4, pin ADIN5, pin ADIN6, pin ADIN7, pin ADIN8,
Pin ADIN9, pin ADIN10 are for the input pin of analog data.
Wherein, described CPU includes pin GIOD0, pin GIOD1, pin GIOD2, pin GIOD3, pin GIOD4, pipe
Foot GIOD5, also includes address bus A [0], address bus A [1], address bus A [2], address bus A [3], address bus A
[4] and address bus A [5], they respectively with pin GIOD0, pin GIOD1, pin GIOD2, pin GIOD3, pin
GIOD4, pin GIOD5 connect；
Described CPU includes pin GIOG0, pin GIOG1, pin GIOG2, pin GIOG3, pin GIOG4, pin
GIOG5, pin GIOG6, pin GIOG7, pin GIOH0, pin GIOH1, pin GIOH2, pin GIOH3, pin GIOH4,
Pin GIOH5, also includes data/address bus A6, data/address bus A7, data/address bus A8, data/address bus A9, data/address bus A10, data
Bus A11, data/address bus A12, data/address bus A13, data/address bus A14, data/address bus A15, data/address bus A16, data/address bus
A17, data/address bus A18；
Described data/address bus A6, data/address bus A7, data/address bus A8, data/address bus A9, data/address bus A10, data/address bus
A11, data/address bus A12, data/address bus A13 respectively with described pin GIOG0, pin GIOG1, pin GIOG2, pin GIOG3,
Pin GIOG4, pin GIOG5, pin GIOG6, pin GIOG7 connect, described pin GIOH0, pin GIOH1, pin
GIOH2, pin GIOH3, pin GIOH4 respectively with data/address bus A14, data/address bus A15, data/address bus A16, data/address bus
A17, data/address bus A18 connect, and pin GIOH5 sky connects.
Wherein, described CPU is provided with pin CAN1SRX and two pins of pin CAD1STX, and they connect for CAN communication
Mouthful, they are connected with CAN communication module with transmitting terminal respectively as receiving.
Wherein, described CPU is provided with pin CAN2SRX and pin CAN2STX, as another set CAN communication interface.
Wherein, described CPU is provided with pin SCI2TX, pin SCI2RX, pin SCI2CLK；Described pin SCI2TX, pipe
Foot SCI2RX, pin SCI2CLK are as RS232 asynchronous serial port peripheral hardware pin, respectively as transmission, receive and clock port.
Wherein, described CPU is provided with pin SPI1SIMO, pin SPI1SIMI, pin SPI1CLK, synchronizes as RS232
Serial ports peripheral hardware pin, respectively as output, input and clock port.
Have the beneficial effect that:
A kind of monitoring unit with chip select functionality, including analog input interface, is used for collecting analog data, conveying
To CPU；CPU processes the process of analog data, is exported by LCD, LED and keyboard interface；Data/address bus interface, if
It is placed in CPU；LAN communication interface transmits for data；RS232 communication interface transmits for data；CAN communication interface is used for data
Transmission.
This monitoring unit, can feed back in the CPU processor that ARM7 is core according to external signal, completes data and processes,
And complete visual display, it is achieved for the monitoring function of external system.Signal flow is as it can be seen, analog input connects
Mouthful, receiving analog data, be transported in the minimum control unit of CPU, CPU carries out the detailed process of data, and logical algorithm is sentenced
Have no progeny, obtain result, by the output of LCD, LED, display explanation current system conditions, support the multiple way of output.With
Time, CPU also with R232, the communication interface such as LAN, CAN is connected, it is achieved communication between data, feedback.System is supported on the market substantially
All main flow communications protocol, can other external systems of seamless link, there is good ductility.CPU has also reserved data and ground
Location bus, the convenient extension easily realizing internal memory and peripheral hardware.Monitoring module is be applicable to Power Supply Monitoring, it is achieved that power-supply system
Intellectuality, is that power-supply system remotely controls, unattended guarantee, by all kinds of communication functions and the exchange of external data, real
Show the measurement of the power of alterating and direct current to system, monitoring, display, the function alerting and managing.Real by the extension of communication function
Show and the data exchange of other intermodules of system, improved system stability.
Accompanying drawing explanation
Fig. 1 is circuit block diagram of the present utility model.
Fig. 2 is the structural representation of CPU of the present utility model.
Fig. 3 is chip select circuit circuit diagram of the present utility model.
Fig. 4 is watchdog circuit circuit diagram of the present utility model.
Detailed description of the invention
Below in conjunction with the accompanying drawings this utility model is described in detail.
A kind of monitoring unit with chip select functionality, sees Fig. 1, Fig. 2, including analog input interface, is used for collecting mould
Analog quantity data, are delivered to CPU；CPU processes the process of analog data, is exported by LCD, LED and keyboard interface；Data/ground
Location EBI, is arranged at CPU；LAN communication interface transmits for data；RS232 communication interface transmits for data；CAN leads to
Communication interface transmits for data；Described CPU is ARM7 chip.The CPU that CPU minimum system in Fig. 1 is in the application.
This monitoring unit, can feed back in the CPU processor that ARM7 is core according to external signal, completes data and processes,
And complete visual display, it is achieved for the monitoring function of external system.Signal flow is as it is shown in figure 1, analog input connects
Mouthful, receiving analog data, be transported in the minimum control unit of CPU, CPU carries out the detailed process of data, and logical algorithm is sentenced
Have no progeny, obtain result, by the output of LCD, LED, display explanation current system conditions, support the multiple way of output.With
Time, CPU also with R232, the communication interface such as LAN, CAN is connected, it is achieved communication between data, feedback.System is supported on the market substantially
All main flow communications protocol, can other external systems of seamless link, there is good ductility.CPU has also reserved data and ground
Location bus, the convenient extension easily realizing internal memory and peripheral hardware.Monitoring module is be applicable to Power Supply Monitoring, it is achieved that power-supply system
Intellectuality, is that power-supply system remotely controls, unattended guarantee, by all kinds of communication functions and the exchange of external data, real
Show the measurement of the power of alterating and direct current to system, monitoring, display, the function alerting and managing.Real by the extension of communication function
Show and the data exchange of other intermodules of system, improved system stability.
Pin ADIN0-pin ADIN11 is as analog input pin.
The pin GIOD0-pin GIOD5 pin of port A [0]-port A [5] and CPU is connected, port A [6]-port A
[18] pin GIOG0-pin GIOG7, pin GIOH0-pin GIOH4 with CPU are connected, pre-be connected externally to as CPU
Stay address bus, the pin GIOE0-pin vGIOE7, pin GIOF0-pin GIOF7 of port D [0]-port D [15] and CPU
It is connected, as reserved data/address bus.
Pin CAN1SRX and pin CAN1STX, as CAN communication interface, receives and transmitting terminal connects with CAN communication module
Connect.
Pin CAN2SRX and pin CAN2STX is as another set CAN communication interface.
Pin SCI2TX, pin SCI2RX, pin SCI2CLK are as RS232 asynchronous serial port peripheral hardware pin, respectively as sending out
Send, receive and clock port.
Pin SPI1SIMO, pin SPI1SIMI, pin SPI1CLK are as RS232 synchronous serial interface peripheral hardware pin, respectively
As output, input and clock port.
Wherein, described CPU includes pin ADIN0, pin ADIN1, pin ADIN2, pin ADIN3, pin ADIN4, pipe
Foot ADIN5, pin ADIN6, pin ADIN7, pin ADIN8, pin ADIN9, pin ADIN10, described pin ADIN0, pin
ADIN1, pin ADIN2, pin ADIN3, pin ADIN4, pin ADIN5, pin ADIN6, pin ADIN7, pin ADIN8,
Pin ADIN9, pin ADIN10 are for the input pin of analog data.
Wherein, described CPU includes pin GIOD0, pin GIOD1, pin GIOD2, pin GIOD3, pin GIOD4, pipe
Foot GIOD5, also includes address bus A [0], address bus A [1], address bus A [2], address bus A [3], address bus A
[4] and address bus A [5] respectively with pin GIOD0, pin GIOD1, pin GIOD2, pin GIOD3, pin GIOD4, pin
GIOD5 connects.
Described CPU includes pin GIOG0, pin GIOG1, pin GIOG2, pin GIOG3, pin GIOG4, pin
GIOG5, pin GIOG6, pin GIOG7, pin GIOH0, pin GIOH1, pin GIOH2, pin GIOH3, pin GIOH4,
Pin GIOH5, also includes data/address bus A6, data/address bus A7, data/address bus A8, data/address bus A9, data/address bus A10, data
Bus A11, data/address bus A12, data/address bus A13, data/address bus A14, data/address bus A15, data/address bus A16, data/address bus
A17, data/address bus A18, described data/address bus A6, data/address bus A7, data/address bus A8, data/address bus A9, data/address bus A10,
Data/address bus A11, data/address bus A12, data/address bus A13 respectively with described pin GIOG0, pin GIOG1, pin GIOG2, pipe
Foot GIOG3, pin GIOG4, pin GIOG5, pin GIOG6, pin GIOG7 connect, described pin GIOH0, pin GIOH1,
Pin GIOH2, pin GIOH3, pin GIOH4 are total with data/address bus A14, data/address bus A15, data/address bus A16, data respectively
Line A17, data/address bus A18 connect, and pin GIOH5 sky connects.
Wherein, described CPU is provided with pin CAN1SRX and two pins of pin CAD1STX, for CAN communication interface,
Receive and transmitting terminal is connected with CAN communication module.
Wherein, described CPU is provided with pin CAN2SRX and pin CAN2STX, as another set CAN communication interface.
Wherein, described CPU is provided with pin SCI2TX, pin SCI2RX, pin SCI2CLK, described pin SCI2TX, pipe
Foot SCI2RX, pin SCI2CLK are as RS232 asynchronous serial port peripheral hardware pin, respectively as transmission, receive and clock port.
Wherein, described CPU is provided with pin SPI1SIMO, pin SPI1SIMI, pin SPI1CLK, synchronizes as RS232
Serial ports peripheral hardware pin, respectively as output, input and clock port.
CPU is additionally provided with chip select circuit and watchdog circuit, as it is shown on figure 3, a kind of chip select circuit, uses linear selection system to enter
Row chip selects.This circuit includes decoder U21, and door U14,3.3V DC source, input pin 1A, pin 2B, pin 3C,
Input port CS_IO, input port RD, input port WE0, port CSDO1, enable port CSKEY_T, enable port CSLCD_
T, enable port CSLED_T.The annexation of circuit is: the input pin 1A of decoder U21, pin 2B, pin 3C and 3 bit slices
Selecting signal port A [0], port A [1], port A [2] to be connected, 2 ends of input pin 6CS1 and resistance R87 are connected, resistance R87's
1 end is connected with 3.3V DC source, input pin 4CS2 and being connected with the Y end of door U14, input pin 5CS3 and input port
CS_IO is connected, and is connected with input port RD, input port WE0 respectively with two input ports A, B of door U14；Decoder U21
Output port Y015 be connected with the enable port CSKEY_T of keyboard, the enable port CSLCD_T of output port Y114 Yu LCD
Being connected, the enable port CSLED_T of output port Y213 with LED is connected, and output port Y312 is connected with port CSDO1.
Having expanded a lot of chips on CPU, when sharing same bus, system needs a signal to distinguish in bus
Data and address should be carried out next step information processing by which chip, and this selection signal is also referred to as chip selection signal, and circuit is former
Reason: circuit as shown in Figure 2, uses linear selection system, it is simply that be directly respectively connected to the high address line in addition to addressing in sheet
The sheet of each storage chip selects end, when certain address wire information is 0, just chooses corresponding storage chip.These sheet selection of lands
One can only be had when location line addresses every time effectively not allow have multidigit effective, and such guarantee the most only chooses one simultaneously
Chip.The core of this decoding circuit is Block decoder U21 as shown in Figure 3.Port A [0], port A [1], port A [2] is as 3
The high address input of position chip selection signal, output pin 0, pin 1, pin 2 respectively connected keyboard, LCD, LED, and low level is made
For enabling signal, therefore signal is the most first made non-post by output pin, then exports.This chip select circuit the most easily realizes, it is possible to compatible
The multiple CPU of this utility model is applied in combination.
As shown in Figure 4, a kind of watchdog circuit, it is used for detecting in real time the running status of CPU, prevention whole system is absorbed in stops
Stagnant state.This circuit includes: timing chip U2,3.3V DC source, earth terminal GND, resistance R75, resistance R70, resistance R65,
Electric capacity C48, two amplifierinverter U4, reseting pin RST_LAN, reseting pin RST.The annexation of circuit is: timing core
Sheet U2, power pin VCC is connected with 3.3V DC source, and ground pin GND is connected with earth terminal GND, output pin RESET with
1 end of resistance R75 is connected, and 2 ends of resistance R75 are connected with earth terminal GND, simultaneously output pin RESET with two connect
Be connected to amplifier U4, the outfan of the amplifierinverter U4 of two series connection respectively with 1 end and 1 end of resistance R65 of resistance R70
Being connected, 2 ends of resistance R70 are input to the LAN communication reseting pin RST_LAN of single-chip microcomputer, the 2 of resistance R65 as reset signal
End is input to the reseting pin RST of single-chip microcomputer as reset signal, and 2 ends of resistance R65 are connected to 1 end of electric capacity of voltage regulation C48,
2 ends of electric capacity C48 are connected with earth terminal GND.
In the computer system that single-chip microcomputer is core, the work of single-chip microcomputer usually can by the interference of external electromagnetic field or
Person, owing to programming is per se with defect, causes the program cannot be properly functioning, and is absorbed in endless loop, and the operation of program is beaten
Disconnected, the system controlled cannot work on, and that can cause whole system is absorbed in dead state, and unpredictable consequence occurs.
Therefore for the consideration that single-chip microcomputer running status is monitored in real time, just create one and be specifically designed to monitoring single-chip microcomputer journey
The chip of sort run state, is commonly called as " house dog ".After using watchdog circuit, single-chip microcomputer can realize under unmanned state continuously
Work.
Its operation principle: the acp chip of house dog is a timer, Watch Dog Timer chip and the one of single-chip microcomputer
Individual I/O pin is connected, this I/O pin by programme-control it periodically toward send on this pin of house dog high level (or
Low level), if program normal operation, CPU can send and allow the instruction of timer reset after a period of time, and timer then starts
Again count down.Being typically to start to countdown from a bigger number, once single-chip microcomputer is owing to interference causes program fleet
Being absorbed in a certain program segment when not entering endless loop state, timer successively decreases until being 0 the most not receive reset signal always, the most silent
Recognize system not in normal operating conditions, force whole system is resetted, the reset pin being i.e. connected with single-chip microcomputer house dog
On send a reset signal, make monolithic processor resetting, i.e. program from the original position that program stores restart perform, Jin Ershi
Show automatically reset function.
U2 is core timing chip as shown in Figure 4, its output pin RESET as the reset signal outfan of single-chip microcomputer,
Be connected two reverser U4, is input to the reset input pipe of the LAN communication of single-chip microcomputer after series resistance R70 as reset signal
Foot, additionally a resistance R55 in parallel is input to the reset input pin of single-chip microcomputer as reset signal, it is achieved reset function.
The above, preferred embodiment the most of the present utility model, it is not intended to limit protection of the present utility model
Scope.
Claims (8)
1. a monitoring unit with chip select functionality, it is characterised in that: include analog input interface, be used for collecting analog quantity
Data, are delivered to CPU；CPU processes the process of analog data, is exported by LCD, LED and keyboard interface；Data/address is total
Line interface, is arranged at CPU；LAN communication interface transmits for data；RS232 communication interface transmits for data；CAN communication connects
Mouth transmits for data；
Described CPU is provided with chip select circuit, and described chip select circuit includes decoder U21, with door U14,3.3V DC source, input
Pin 1A, pin 2B, pin 3C, input port CS_IO, input port RD, input port WE0, port CSDO1, enable port
CSKEY_T, enable port CSLCD_T, enable port CSLED_T；
The annexation of circuit is: the input pin 1A of decoder U21, pin 2B, pin 3C and 3 bit slices select signal port A
[0], port A [1], port A [2] be connected, 2 ends of input pin 6CS1 and resistance R87 are connected, and 1 end of resistance R87 is straight with 3.3V
Stream power supply is connected, input pin 4CS2 and being connected with the Y end of door U14, and input pin 5CS3 is connected with input port CS_IO, with
Two input port A, the input port B of door U14 are connected with input port RD, input port WE0 respectively；Decoder U21's is defeated
Going out port Y015 to be connected with the enable port CSKEY_T of keyboard, the enable port CSLCD_T of output port Y114 with LCD is connected,
The enable port CSLED_T of output port Y213 with LED is connected, and output port Y312 is connected with port CSDO1.
A kind of monitoring unit with chip select functionality the most according to claim 1, it is characterised in that: described CPU is ARM7
Chip.
A kind of monitoring unit with chip select functionality the most according to claim 1, it is characterised in that: described CPU includes pipe
Foot ADIN0, pin ADIN1, pin ADIN2, pin ADIN3, pin ADIN4, pin ADIN5, pin ADIN6, pin
ADIN7, pin ADIN8, pin ADIN9, pin ADIN10, described pin ADIN0, pin ADIN1, pin ADIN2, pin
ADIN3, pin ADIN4, pin ADIN5, pin ADIN6, pin ADIN7, pin ADIN8, pin ADIN9, pin ADIN10
Input pin for analog data.
A kind of monitoring unit with chip select functionality the most according to claim 1, it is characterised in that: described CPU includes pipe
Foot GIOD0, pin GIOD1, pin GIOD2, pin GIOD3, pin GIOD4, pin GIOD5, also include address bus A [0],
Address bus A [1], address bus A [2], address bus A [3], address bus A [4] and address bus A [5], they respectively with
Pin GIOD0, pin GIOD1, pin GIOD2, pin GIOD3, pin GIOD4, pin GIOD5 connect；
Described CPU includes pin GIOG0, pin GIOG1, pin GIOG2, pin GIOG3, pin GIOG4, pin GIOG5, pipe
Foot GIOG6, pin GIOG7, pin GIOH0, pin GIOH1, pin GIOH2, pin GIOH3, pin GIOH4, pin
GIOH5, also includes data/address bus A6, data/address bus A7, data/address bus A8, data/address bus A9, data/address bus A10, data/address bus
A11, data/address bus A12, data/address bus A13, data/address bus A14, data/address bus A15, data/address bus A16, data/address bus A17,
Data/address bus A18；
Described data/address bus A6, data/address bus A7, data/address bus A8, data/address bus A9, data/address bus A10, data/address bus A11,
Data/address bus A12, data/address bus A13 respectively with described pin GIOG0, pin GIOG1, pin GIOG2, pin GIOG3, pin
GIOG4, pin GIOG5, pin GIOG6, pin GIOG7 connect, described pin GIOH0, pin GIOH1, pin GIOH2, pipe
Foot GIOH3, pin GIOH4 are total with data/address bus A14, data/address bus A15, data/address bus A16, data/address bus A17, data respectively
Line A18 connects, and pin GIOH5 sky connects.
A kind of monitoring unit with chip select functionality the most according to claim 1, it is characterised in that: described CPU is provided with
Pin CAN1SRX and two pins of pin CAD1STX, they are for CAN communication interface, and they are respectively as receiving and transmitting terminal
It is connected with CAN communication module.
A kind of monitoring unit with chip select functionality the most according to claim 5, it is characterised in that: described CPU is provided with
Pin CAN2SRX and pin CAN2STX, as another set CAN communication interface.
A kind of monitoring unit with chip select functionality the most according to claim 1, it is characterised in that: described CPU is provided with
Pin SCI2TX, pin SCI2RX, pin SCI2CLK；Described pin SCI2TX, pin SCI2RX, pin SCI2CLK conduct
RS232 asynchronous serial port peripheral hardware pin, respectively as transmission, receives and clock port.
A kind of monitoring unit with chip select functionality the most according to claim 1, it is characterised in that: described CPU is provided with
Pin SPI1SIMO, pin SPI1SIMI, pin SPI1CLK, as RS232 synchronous serial interface peripheral hardware pin, respectively as output,
Input and clock port.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620562645.9U CN205880856U (en) | 2016-06-07 | 2016-06-07 | Control unit with chip selection function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620562645.9U CN205880856U (en) | 2016-06-07 | 2016-06-07 | Control unit with chip selection function |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205880856U true CN205880856U (en) | 2017-01-11 |
Family
ID=57690462
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620562645.9U Active CN205880856U (en) | 2016-06-07 | 2016-06-07 | Control unit with chip selection function |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205880856U (en) |
-
2016
- 2016-06-07 CN CN201620562645.9U patent/CN205880856U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101872996A (en) | Be used to consume and provide the efficient system and the method for power | |
| CN104380266A (en) | Processor device with reset condition trace capabilities | |
| CN103500154A (en) | Serial bus interface chip, serial bus transmission system and method | |
| JP2017532640A (en) | Electric quantity detection method and apparatus, terminal and storage medium | |
| CN107885998A (en) | A kind of server master board encryption system | |
| US20040054775A1 (en) | Medical data collection and deliver system | |
| CN206684533U (en) | Wechat remote control chip | |
| US20210027688A1 (en) | Bar Screen Control Circuitry, Bar Screen Display System and Method for Controlling a Bar Screen | |
| CN111766436A (en) | Intelligent wireless current clamp and electricity larceny prevention checking method thereof | |
| CN205845008U (en) | A kind of monitoring unit | |
| CN105549522B (en) | A kind of embedded actual time safety control runtimes of PLC based on SPARC frameworks CPU and its operation method | |
| CN205880856U (en) | Control unit with chip selection function | |
| CN108351680A (en) | Method and apparatus for using in-band signaling to provide power state information | |
| CN201569497U (en) | Control system for temperature measurement and alarm | |
| CN108491343A (en) | Terminal device, data transmission system and method | |
| CN205788163U (en) | A kind of monitoring unit with cpu monitor function | |
| CN203520299U (en) | Timer-power-on control circuit | |
| CN216134479U (en) | Communication sharing device based on RS485 | |
| CN209282342U (en) | A kind of battery system and mobile terminal detecting state in place | |
| CN206136147U (en) | Outdoor transformer video monitoring device | |
| CN209433276U (en) | A kind of plane data acquisition dilatation terminal | |
| CN107300400A (en) | Forest fire protection well based on GPRS and single-chip microcomputer remotely monitors transmitting device | |
| CN103412531B (en) | A kind of bus control method and device | |
| CN112467863A (en) | Dual-power switching communication device and method for glucometer | |
| CN102610074A (en) | Mineral wireless data acquisition terminal |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 518000 Yingzhan Industrial Park Area A, Longtian Community, Kengzi Street, Pingshan New District, Shenzhen City, Guangdong Province Patentee after: Huazhi Machinery Co., Ltd. Address before: 518000 Yingzhan Industrial Park Area A, Longtian Community, Kengzi Street, Pingshan New District, Shenzhen City, Guangdong Province Patentee before: SHENZHEN DONGZHOU NEW ENERGY TECHNOLOGY CO., LTD. |
|
| CP01 | Change in the name or title of a patent holder |