CN205792561U - The transmission system of data - Google Patents
The transmission system of data Download PDFInfo
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- CN205792561U CN205792561U CN201620218293.5U CN201620218293U CN205792561U CN 205792561 U CN205792561 U CN 205792561U CN 201620218293 U CN201620218293 U CN 201620218293U CN 205792561 U CN205792561 U CN 205792561U
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Abstract
The utility model discloses the transmission system of a kind of data.Wherein, this system includes: single-chip microcomputer, signaling conversion circuit, interface circuit, terminal impedance match circuit and the communications cable, wherein, single-chip microcomputer, electrically connect with signaling conversion circuit, for sending data to signaling conversion circuit；Signaling conversion circuit, electrically connects with interface circuit, for by data by preset the first form be converted to preset the second form data；Interface circuit, is connected with terminal impedance match circuit, for being converted to preset the data of the second form；Terminal impedance match circuit, is connected with the communications cable, for controlling the data presetting the second form reflection in transmitting procedure and echo；The communications cable, for transmitting the data of default second form to external transmission system.This utility model solves owing to correlation technique controls High-Speed RS 485 transceiver by FPGA, it is achieved the RS485 data transmission of more than 10Mbps, causes design complexity, the technical problem that cost is high.
Description
Technical field
This utility model relates to electrical applications technical field, in particular to the transmission system of a kind of data.
Background technology
Along with reaching its maturity of singlechip technology, singlechip technology is day by day widely used in commercial production and device fabrication
Industry, wherein, RS485 bus communication system is because having the advantages such as design is simple, long transmission distance, field wiring are few, in industry control
It is used widely in field processed.The maximum transmission distance of RS485 interface standard communication is 2000m, and traffic rate is limited in
93.75kbps；When communication distance is 100m, traffic rate is up to 20Mbps.General single chip the most all has built-in leading to
With asynchronous receiving-transmitting coffret (Universal Asynchronous Receiver/Transmitter, be called for short UART), but interior
The traffic rate putting UART interface is typically up to less than 10Mbps, and this causes general single chip to be not applied for the height of more than 10Mbps
In speed RS485 data transmission system.At present in industrial control field, the method that the general FPGA of employing controls RS485 transceiver,
Realizing the RS485 data transmission of more than 10Mbps, technical scheme is as it is shown in figure 1, Fig. 1 is to realize High-Speed RS 485 in correlation technique
The structural representation of data transmission system.Wherein, as it is shown in figure 1, field programmable gate array (Field-in each system
Programmable Gate Array, is called for short FPGA) device for the data sending function such as data encoding, parallel/serial conversion, with
And the Data Detection of serial input signals, serial/parallel conversion, data decode and CRC (Cyclic Redundancy
Check, is called for short CRC) the data receiver function such as verification.RS485 interface circuit is for the high speed of serial data under RS485 bus
Send and receive, and realize the protection merit of the impedance matching between FPGA device and RS485 transceiver and RS485 transceiver
Energy.Terminal impedance match circuit for suppressing reflection and the echo of signal when RS485 Long line transmission.Twisted-pair feeder is between system
Communication.
As it is shown in figure 1, system 1 and system 2 can send data and receive data, communication is two-way.Send with system 1
Data, system 2 receive data instance, and the basic functional principle of prior art is described.
Wherein, in Fig. 1, FPGA1 encodes data signal to be sent, and after parallel/serial conversion, output is to RS485 interface circuit 1,
RS485 interface driver drives Double-strand transmission data.After RS485 interface circuit 2 receives the data of system 1 by twisted-pair feeder
Output carries out serial/parallel conversion, decoding and CRC check to FPGA2, FPGA2 to the data received.
For above-mentioned owing to correlation technique is by FPGA control High-Speed RS 485 transceiver, it is achieved the RS485 of more than 10Mbps
Data are transmitted, and cause design complexity, the problem that cost is high, the most not yet propose effective solution.
Utility model content
This utility model embodiment provides the transmission system of a kind of data, at least to solve owing to correlation technique is passed through
FPGA controls High-Speed RS 485 transceiver, it is achieved the RS485 data transmission of more than 10Mbps, causes design complexity, the skill that cost is high
Art problem.
An aspect according to this utility model embodiment, it is provided that the transmission system of a kind of data, including: single-chip microcomputer,
Signaling conversion circuit, interface circuit, terminal impedance match circuit and the communications cable, wherein, single-chip microcomputer, with signaling conversion circuit electricity
Connect, for sending data to signaling conversion circuit；Signaling conversion circuit, electrically connects with interface circuit, is used for data by advance
If the first form is converted to preset the data of the second form；Interface circuit, is connected with terminal impedance match circuit, turns for forwarding
It is changed to preset the data of the second form；Terminal impedance match circuit, is connected with the communications cable, for controlling default second form
Data reflection in transmitting procedure and echo；The communications cable, for transmitting the data of default second form to external transmission system
System.
In this utility model embodiment, by single-chip microcomputer, electrically connect with signaling conversion circuit, for signal conversion electricity
Road sends data；Signaling conversion circuit, electrically connects with interface circuit, for being converted to preset the by presetting the first form by data
The data of two forms；Interface circuit, is connected with terminal impedance match circuit, for being converted to preset the number of the second form
According to；Terminal impedance match circuit, is connected with the communications cable, for controlling to preset anti-in transmitting procedure of data of the second form
Penetrate and echo；The communications cable, for transmitting the data extremely external transmission system of default second form, has reached reduction design difficulty
With the purpose of design cost, it is achieved thereby that realized the technique effect of the high-speed transfer of data by conventional electric elements, enter
And solving owing to correlation technique controls High-Speed RS 485 transceiver by FPGA, it is achieved the RS485 data of more than 10Mbps pass
Defeated, cause design complexity, the technical problem that cost is high.
Accompanying drawing explanation
Accompanying drawing described herein is used for providing being further appreciated by of the present utility model, constitutes the part of the application,
Schematic description and description of the present utility model is used for explaining this utility model, is not intended that of the present utility model improper
Limit.In the accompanying drawings:
Fig. 1 is the structural representation realizing High-Speed RS 485 data transmission system in correlation technique；
Fig. 2 is the structural representation of the transmission system of the data according to this utility model embodiment；
Fig. 3 is the structural representation of the transmission system of a kind of data according to this utility model embodiment.
Detailed description of the invention
In order to make those skilled in the art be more fully understood that this utility model scheme, real below in conjunction with this utility model
Execute the accompanying drawing in example, the technical scheme in this utility model embodiment is clearly and completely described, it is clear that described
Embodiment is only the embodiment of this utility model part rather than whole embodiments.Based on the reality in this utility model
Execute example, the every other embodiment that those of ordinary skill in the art are obtained under not making creative work premise, all answer
When the scope belonging to this utility model protection.
It should be noted that term " first " in specification and claims of the present utility model and above-mentioned accompanying drawing,
" second " etc. are for distinguishing similar object, without being used for describing specific order or precedence.Should be appreciated that so
The data used can be exchanged in the appropriate case, in order to embodiment of the present utility model described herein can be with except at this
In illustrate or describe those beyond order implement.Additionally, term " includes " and " having " and their any deformation, meaning
Figure is to cover non-exclusive comprising, and such as, contains series of steps or the process of unit, method, system, product or equipment
Be not necessarily limited to those steps or the unit clearly listed, but can include the most clearly listing or for these processes,
Other step that method, product or equipment are intrinsic or unit.
The technical term that the transmission system of the data that the embodiment of the present application provides relates to:
Serial Peripheral Interface (SPI): Serial Peripheral Interface, is called for short SPI；
Universal asynchronous receiving-transmitting transmits: Universal Asynchronous Receiver/Transmitter, is called for short
UART；
Field programmable gate array: Field-Programmable Gate Array, is called for short FPGA.
According to this utility model embodiment, it is provided that the system embodiment of the transmission system of a kind of data, Fig. 2 is according to this
The structural representation of the transmission system of the data of utility model embodiment, as in figure 2 it is shown, this system includes: single-chip microcomputer 21, signal
Change-over circuit 22, interface circuit 23, terminal impedance match circuit 24 and the communications cable 25, wherein,
Single-chip microcomputer 21, electrically connects with signaling conversion circuit 22, for sending data to signaling conversion circuit 22；
Signaling conversion circuit 22, electrically connects with interface circuit 23, for being converted to preset by presetting the first form by data
The data of the second form；
Interface circuit 23, electrically connects with terminal impedance match circuit 24, for being converted to preset the number of the second form
According to；
Terminal impedance match circuit 24, electrically connects with the communications cable 25, is passing for controlling the data presetting the second form
Reflection during defeated and echo；
The communications cable 25, for transmitting the data of default second form to external transmission system.
From the foregoing, it will be observed that the transmission system of the data of the embodiment of the present application offer goes between single-chip microcomputer and single-chip microcomputer
Carry out data communication at a high speed by RS485 bus communication system, it should be noted that the external transmission that the communications cable 25 connects
System is symmetrical structure with the transmission system of the data that the embodiment of the present application provides, i.e. also include in this external transmission system: single
Sheet machine 21, signaling conversion circuit 22, interface circuit 23, terminal impedance match circuit 24 and the communications cable 25.
Concrete, in the transmission system of the data that the embodiment of the present application provides, single-chip microcomputer 21 is by signaling conversion circuit 22
Send to interface circuit 23, this signaling conversion circuit 22 change the data after data type, and then mated by terminal impedance
Circuit 24 regulates these data and reflects and echo, outside finally being sent the data to by the communications cable 25 present in transmitting procedure
Connecing transmission system, wherein, data type, by electrically connecting with signaling conversion circuit 22, is to preset the first form by single-chip microcomputer 21
Data send to this signaling conversion circuit 22, then these data are converted to by presetting the first form by this signaling conversion circuit 22
Presetting the second form, interface circuit 23, by electrically connecting with signaling conversion circuit 22, is converted into presetting the data of the second form
Send to terminal impedance match circuit 24 at a high speed, then be to preset the second form by terminal impedance match circuit 24 by data type
Data are sent to external transmission system by the communications cable 25.
Here in the embodiment of the present application, the first form of presetting in data type can be Serial Peripheral Interface (SPI) form
(Serial Peripheral Interface is called for short SPI), presetting the second form can be universal asynchronous receiving-transmitting transformat
(Universal Asynchronous Receiver/Transmitter is called for short UART).The data that the embodiment of the present application provides
Transmission system by between single-chip microcomputer 21 and interface circuit 23 add signaling conversion circuit 22, evaded in correlation technique by
Traffic rate in the built-in UART interface of single-chip microcomputer 21 is typically up to less than 10Mbps, it is impossible to meet the high speed of more than 10Mbps
Problem in RS485 data transmission system, has abandoned the expensive design cost of FPGA, and the complexity of design, return by
Single-chip microcomputer 21 realizes the high-speed transfer of data in RS485 data transmission system.Wherein, the interface electricity that the embodiment of the present application provides
Road 23 is RS485 interface circuit.
In the transmission system of the data that the embodiment of the present application provides, by single-chip microcomputer, electrically connect with signaling conversion circuit, use
In sending data to signaling conversion circuit；Signaling conversion circuit, electrically connects with interface circuit, is used for data by presetting the first lattice
Formula is converted to preset the data of the second form；Interface circuit, is connected with terminal impedance match circuit, is converted to preset for forwarding
The data of the second form；Terminal impedance match circuit, is connected with the communications cable, is passing for controlling the data presetting the second form
Reflection during defeated and echo；The communications cable, for transmitting the data extremely external transmission system of default second form, reaches
Reduce design difficulty and the purpose of design cost, it is achieved thereby that realized the high-speed transfer of data by conventional electric elements
Technique effect, and then solve owing to correlation technique controls High-Speed RS 485 transceiver by FPGA, it is achieved more than 10Mbps's
RS485 data are transmitted, and cause design complexity, the technical problem that cost is high.
Concrete, Fig. 3 is the structural representation of the transmission system of a kind of data according to this utility model embodiment, such as figure
Shown in 3, the transmission system of the data that the embodiment of the present application provides is specific as follows:
Alternatively, single-chip microcomputer 21 includes: Serial Peripheral Interface (SPI) 211, wherein,
Serial Peripheral Interface (SPI) 211, electrically connects with signaling conversion circuit 22, is used for sending data to signaling conversion circuit 22.
Concrete, the single-chip microcomputer 21 in each system is the general single chip with SPI interface 211, and single-chip microcomputer 21 leads to
Cross SPI interface 211 to electrically connect with signaling conversion circuit 22, and single-chip microcomputer 21 passes through SPI interface 211 to signaling conversion circuit 22
Sending data, wherein, single-chip microcomputer 21 can be the single-chip microcomputer 1 in Fig. 3, and SPI interface 211 can be the SPI in Fig. 3.
During additionally, the single-chip microcomputer in external transmission system returns data, single-chip microcomputer 21 will be received by SPI interface 211
The data returned by signaling conversion circuit 22.
Optionally, include at default first form: Serial Peripheral Interface (SPI) form, and, preset the second form and include: be general
In the case of asynchronous receiving-transmitting transformat, signaling conversion circuit 22, including: matching module and sending module, wherein,
Matching module, electrically connects with single-chip microcomputer 21, for the data type of data being changed by Serial Peripheral Interface (SPI) form
For universal asynchronous receiving-transmitting transformat；
Sending module, electrically connects with interface circuit 23, is converted to universal asynchronous receiving-transmitting biography for sending to interface circuit 23
The data of transport format.
Concrete, from the foregoing, the single-chip microcomputer 21 in the embodiment of the present application is the single-chip microcomputer of SPI interface, the application is real
Execute the signal conversion electricity that the signaling conversion circuit 22 in example can be the data that the data of SIP form are converted to UART form
Road, single-chip microcomputer 21 exports the data of SPI form, and is UART by signaling conversion circuit 22 by the data type conversion of these data,
While ensureing data transmission, can evade in correlation technique due to the built-in UART interface message transmission rate of single-chip microcomputer 21
Low problem, and then ensured these data follow-up high-speed transfer in each circuit.Matching module leads in the embodiment of the present application
The SPI interface crossed in single-chip microcomputer 21 electrically connects with this single-chip microcomputer 21, receives the data that data type is SPI form, and by this number
According to the data being converted to UART form；And then the sending module electrically connected with interface circuit 23, it is converted into the number of UART form
According to sending to interface circuit 23.
Wherein, signaling conversion circuit 22 can turn UART circuitry 1 for the SPI shown in Fig. 3, and interface circuit 23 can be Fig. 3
Shown RS485 interface circuit 1.
Further, optionally, matching module, electrically connect with interface circuit 23, it is universal asynchronous for being used for data type
The data of transmitting-receiving transformat are converted to the data of Serial Peripheral Interface (SPI) form；
Sending module, electrically connects with single-chip microcomputer 21, for returning the data of Serial Peripheral Interface (SPI) form to single-chip microcomputer 21.
Concrete, when external transmission system returns data, matching module is by electrically connecting with interface circuit 23, by data
Type is the data that the data of UART form are converted to SPI form, then by sending module, the data being converted into SPI form are returned
Returning single-chip microcomputer 21, wherein, sending module electrically connects with single-chip microcomputer 21.
From the foregoing, the electric elements in the embodiment of the present application be can the element of two-way communication, with unidirectional biography
While transmission of data, can receive the data that opposite direction returns, the embodiment of the present application is only said with unidirectional transmission data instance
Bright, the transmission system of data provided to realize the embodiment of the present application is as the criterion, and does not limits.
Optionally, interface circuit 23 includes: data/address bus and data collector, wherein,
Data/address bus, electrically connects with signaling conversion circuit 22, is that universal asynchronous receiving-transmitting transmits lattice for wire data type
The data of formula；
Data collector, electrically connects with data/address bus, for forwarding the data of universal asynchronous receiving-transmitting transformat.
Concrete, interface circuit 23 can be RS485 interface circuit in the embodiment of the present application, this RS485 interface circuit
Include: RS485 bus and RS485 transceiver, i.e. the data/address bus in the embodiment of the present application and data collector, wherein,
RS485 bus electrically connects with signaling conversion circuit 22, for the data that data type is UART form are passed through RS485 transceiver
Sending to terminal impedance match circuit 24, RS485 interface circuit sends for the high speed of serial data under RS485 bus here
With reception and the protection of RS485 transceiver.
Further, optionally, data collector, electrically connect with terminal impedance match circuit 24, be used for receiving data class
Type is the data of universal asynchronous receiving-transmitting transformat；
Data/address bus, electrically connects with data collector and signaling conversion circuit 22 respectively, for being passed by universal asynchronous receiving-transmitting
The data of transport format are transmitted to signaling conversion circuit.
Concrete, when receiving the data that external transmission system returns, RS485 transceiver and terminal impedance match circuit 24
Electrical connection, receives the data that data type is UART form, upon receipt of the data, these data is returned via RS485 bus
It is back to signaling conversion circuit 22.Wherein, terminal impedance match circuit 24 can be the terminal impedance match circuit 1 in Fig. 3.
Optionally, the communications cable 25 includes: twisted-pair feeder.
To sum up, understand in conjunction with Fig. 3, in the transmission system of the data that the embodiment of the present application provides, the monolithic in each system
Machine is the general single chip with SPI interface, and single-chip microcomputer accesses SPI by SPI interface and turns UART circuitry, it is achieved connecing of data
Receive and send.SPI turns UART circuitry and realizes SPI formatted data and the bi-directional conversion of UART formatted data and transmission.RS485 interface
Circuit sends for the high speed of serial data under RS485 bus and receives and the protection of RS485 transceiver.Terminal impedance
Distribution road for suppressing reflection and the echo of signal when RS485 Long line transmission.Twisted-pair feeder communication between system.
Wherein, system 1 and system 2 can send data and receive data, and communication is two-way.With system 1 send data,
System 2 receives data instance, and the transmission system of the data that the embodiment of the present application provides is specific as follows:
Single-chip microcomputer 1 sends data to SPI by SPI and turns UART circuitry 1.SPI turns UART circuitry 1 and receives from single-chip microcomputer 1
SPI formatted data, the data being converted to UART form are sent to RS485 interface circuit 1.RS485 interface driver drives double
Twisted wire transmission data.RS485 interface circuit 2 receives the data of system 1 by twisted-pair feeder, and the data received with UART form
It is sent to SPI and turns UART circuitry 2.SPI turns the UART formatted data that UART circuitry 2 receives from RS485 interface circuit 2, conversion
Data for SPI form are sent to single-chip microcomputer 2.Single-chip microcomputer 2 carries out the calculation process such as CRC check to the data received.
Wherein, single-chip microcomputer 1 and single-chip microcomputer 2 in Fig. 3 are all general single chips, have the SPI interface of standard, and during SPI
Clock is more than 25MHz.SPI turns chip MAX3107, the MAX3107 high pass that the core parts of UART circuitry can be Maxim company
Letter speed is 24Mbps.RS485 transceiver selects driver and the receptor of full duplex, and traffic rate is more than 25Mbps.This
By using general single chip to control High-Speed RS 485 transceiver, (that is, in the embodiment of the present application, single-chip microcomputer 21 passes through application embodiment
Signaling conversion circuit 22, is sent the data after data type conversion by interface circuit 23), it is achieved thereby that more than 10Mbps
RS485 data are transmitted, and the transmission system design of the data of the embodiment of the present application offer is simple, low cost.
Above-mentioned this utility model embodiment sequence number, just to describing, does not represent the quality of embodiment.
It addition, each functional unit in each embodiment of this utility model can be integrated in a processing unit, also
Can be that unit is individually physically present, it is also possible to two or more unit are integrated in a unit.Above-mentioned integrated
Unit both can realize to use the form of hardware, it would however also be possible to employ the form of SFU software functional unit realizes.
If described integrated unit realizes and as independent production marketing or use using the form of SFU software functional unit
Time, can be stored in a computer read/write memory medium.Based on such understanding, the technical solution of the utility model is originally
The part that in other words prior art contributed in matter or this technical scheme completely or partially can be with software product
Form embodies, and this computer software product is stored in a storage medium, including some instructions with so that a meter
Calculate machine equipment (can be for personal computer, server or the network equipment etc.) and perform method described in each embodiment of this utility model
All or part of step.And aforesaid storage medium includes: USB flash disk, read only memory (ROM, Read-Only Memory), with
Machine access memorizer (RAM, Random Access Memory), portable hard drive, magnetic disc or CD etc. are various can store journey
The medium of sequence code.
The above is only preferred implementation of the present utility model, it is noted that for the common skill of the art
For art personnel, on the premise of without departing from this utility model principle, it is also possible to make some improvements and modifications, these improve and
Retouching also should be regarded as protection domain of the present utility model.
Claims (7)
1. the transmission system of data, it is characterised in that including: single-chip microcomputer, signaling conversion circuit, interface circuit, terminal hinder
Anti-match circuit and the communications cable, wherein,
Described single-chip microcomputer, electrically connects with described signaling conversion circuit, for sending data to described signaling conversion circuit；
Described signaling conversion circuit, electrically connects with described interface circuit, for described data being converted to by presetting the first form
Preset the data of the second form；
Described interface circuit, electrically connects with described terminal impedance match circuit, is converted to described default second form for forwarding
Described data；
Described terminal impedance match circuit, electrically connects with the described communications cable, for controlling the described of described default second form
Data reflection in transmitting procedure and echo；
The described communications cable, for transmitting the described described data of the second form of presetting to external transmission system.
System the most according to claim 1, it is characterised in that described single-chip microcomputer includes: Serial Peripheral Interface (SPI), wherein,
Described Serial Peripheral Interface (SPI), electrically connects with described signaling conversion circuit, is used for sending described data and changes to described signal
Circuit.
System the most according to claim 1, it is characterised in that described first form of presetting includes: Serial Peripheral Interface (SPI) lattice
Formula, and, described second form of presetting includes: in the case of universal asynchronous receiving-transmitting transformat, described signaling conversion circuit, bag
Include: matching module and sending module, wherein,
Described matching module, electrically connects with described single-chip microcomputer, for the data type of described data being connect by described serial peripheral
Mouth form is converted to described universal asynchronous receiving-transmitting transformat；
Described sending module, electrically connects with described interface circuit, for being converted to described general different to the transmission of described interface circuit
The described data of step transmitting-receiving transformat.
System the most according to claim 3, it is characterised in that
Described matching module, electrically connects with described interface circuit, and being used for data type is that described universal asynchronous receiving-transmitting transmits lattice
The data of formula are converted to the data of described Serial Peripheral Interface (SPI) form；
Described sending module, electrically connects with described single-chip microcomputer, for returning described Serial Peripheral Interface (SPI) form to described single-chip microcomputer
Data.
System the most according to claim 3, it is characterised in that described interface circuit includes: data/address bus and data transmit-receive
Device, wherein,
Described data/address bus, electrically connects with described signaling conversion circuit, is described universal asynchronous receiving-transmitting for wire data type
The described data of transformat；
Described data collector, electrically connects with described data/address bus, for forwarding the institute of described universal asynchronous receiving-transmitting transformat
State data.
System the most according to claim 5, it is characterised in that
Described data collector, electrically connects with described terminal impedance match circuit, and it is described general different for being used for receiving data type
The data of step transmitting-receiving transformat；
Described data/address bus, electrically connects with described data collector and described signaling conversion circuit respectively, for by described general
The data transmission of asynchronous receiving-transmitting transformat is to described signaling conversion circuit.
System the most according to claim 1, it is characterised in that the described communications cable includes: twisted-pair feeder.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105680900A (en) * | 2016-03-21 | 2016-06-15 | 北京龙鼎源科技股份有限公司 | Data transmission system and method |
| CN114422612A (en) * | 2022-01-25 | 2022-04-29 | 深圳新联胜光电科技有限公司 | Data transmission device |
-
2016
- 2016-03-21 CN CN201620218293.5U patent/CN205792561U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105680900A (en) * | 2016-03-21 | 2016-06-15 | 北京龙鼎源科技股份有限公司 | Data transmission system and method |
| CN114422612A (en) * | 2022-01-25 | 2022-04-29 | 深圳新联胜光电科技有限公司 | Data transmission device |
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