CN205787713U - A kind of core board of pure liquid crystal automobile instrument - Google Patents
A kind of core board of pure liquid crystal automobile instrument Download PDFInfo
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- CN205787713U CN205787713U CN201620407122.7U CN201620407122U CN205787713U CN 205787713 U CN205787713 U CN 205787713U CN 201620407122 U CN201620407122 U CN 201620407122U CN 205787713 U CN205787713 U CN 205787713U
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Abstract
The utility model discloses the core board of a kind of pure liquid crystal automobile instrument, all it is connected including CPU, PMIC electric power management circuit, DDR3 main memory circuit, NAND storage circuit, EMMC storage circuit, SPI Flash storage circuit, EEPROM storage circuit, adapter J1, adapter J2, CPU and PMIC electric power management circuit, DDR3 main memory circuit, NAND storage circuit, EMMC storage circuit, SPI Flash storage circuit, EEPROM storage circuit, adapter J1, adapter J2.Core board of the present utility model can support multiple automobile instrument liquid crystal display screen, as the liquid crystal display screen of rgb interface, the liquid crystal display screen of LVDS interface, the liquid crystal display screen of MIPI interface can be supported, consequently facilitating in product development process screen type selecting, improve its versatility, to reduce signaling conversion circuit, reduce hardware cost and development difficulty, shorten the construction cycle.
Description
Technical field
This utility model belongs to automobile instrument parts manufacturing technology field, relates to a kind of core board, especially a kind of based on
The core board of the pure liquid crystal automobile instrument of I.MX6.
Background technology
Along with the high speed development of automotive electronic technology, pure liquid crystal automobile instrument enters the sight line of consumer, and extensively receipts disappear
The favor of the person of expense.The information such as mileage, oil meter, rotating speed, signal lights instruction can only be shown simply, far due to traditional mechanical formula instrument
The display demand of increasing vehicle body information cannot be met.And liquid crystal automobile instrument can solve the problem that this problem, it can show
Content more in detail, abundant.
For the design of pure liquid crystal automobile instrument requires, it has the performance of high requirement to core board.At present
Pure liquid crystal automobile instrument core board design process, the development cost of its circuit part is high, development difficulty is big and the construction cycle is long.
Therefore, it is necessary to design a pure liquid crystal automobile instrument core board that can be general.
Summary of the invention
For solving the problems referred to above that prior art exists, the utility model discloses the core of a kind of pure liquid crystal automobile instrument
Plate, it has general-purpose type, can reduce development cost and reduce development difficulty, and can also shorten the construction cycle.
In order to realize above-mentioned technical purpose, this utility model adopts the following technical scheme that
A kind of core board of pure liquid crystal automobile instrument, including: CPU, PMIC electric power management circuit, DDR3 main memory circuit,
NAND storage circuit, EMMC storage circuit, SPI Flash storage circuit, EEPROM store circuit, adapter J1, adapter J2,
CPU Yu PMIC electric power management circuit, DDR3 main memory circuit, NAND storage circuit, EMMC storage circuit, SPI Flash store electricity
Road, EEPROM storage circuit, adapter J1, adapter J2 are connected.
Preferably, CPU selects i.MX6U processor.
Preferably, adapter J1 selects the FPC connector of 0.5mm spacing, comprises 20 pins, wherein,
First foot, crus secunda are connected to the GEN_3V3 interface of PMIC；
3rd foot connects EIM_A17 to the EIM_A24 interface of CPU respectively to the tenth foot；
11st foot connects the ECSPI2_SS0 interface of CPU；
12nd foot connects the EIM_WAIT interface of CPU；
13rd foot connects the EIM_LBA interface of CPU；
14th foot connects the EIM_EB0 interface of CPU；
15th foot connects the EIM_EB3 interface of CPU；
16th foot, the 17th foot connect the UART1 interface of CPU；
Tenth octal, the 19th foot, the 20th foot connect the GND of CPU.
Preferably, adapter J2 selects the 209 foot adapter J2 being provided with stamp hole, uses the stamp hole of 1.27mm spacing,
Comprise 209 pins, wherein,
First foot, the 4th foot, the 5th foot, the 11st foot connect the GPIO interface of CPU；
Crus secunda, the 3rd foot, the 6th foot, the 7th foot connect the CAN interface of CPU；
Octal, the 14th foot, the 21st foot, the 41st foot, the 40th octal, the 55th foot, the 71st
Foot, the 76th foot, the 85th foot, the 80th octal, the 93rd foot, the 109th foot, the 112nd foot,
115 feet, the 120th foot, the 130th octal, the 140th foot, the 142nd foot, the 107th
Ten feet, the 183rd foot, the 186th foot, the 187th foot, the 190th octal, the 209th foot
Connect the GND of CPU；
9th foot, the tenth foot, the 12nd foot, the 13rd foot, the 81st foot, the 82nd foot, the 83rd foot, the 8th
14 feet, the 89th foot, the 90th foot, the 91st foot, the 92nd foot connect the UART interface of CPU；
15th foot connects the audio interface of CPU to the 20th foot；
22nd foot connects the HDMI of CPU to the 34th foot；
35th foot connects the MIPI_DSI interface of CPU to the 40th foot；
42nd foot connects the MIPI_CSI interface of CPU to the 47th foot；
49th foot connects the PCIE interface of CPU to the 54th foot；
56th foot connects the MLB interface of CPU to the 65th foot；
66th foot connects the PMIC_5V interface of PMIC；
67th foot to the 70th foot, the 72nd foot connect the USB interface of CPU to the 75th foot；
77th to the 79th foot connects the SYS_4V2 interface of PMIC；
80th foot connects the RST interface of CPU；
86th foot, the 87th foot connect the PWM interface of CPU；
94th foot, the 101st foot connect the GEN_3V3 interface of PMIC；
95th foot connects the SD1 interface of CPU to the first centipede；
102nd foot connects the SD2 interface of CPU to the 107th foot；
100th octal, the 121st foot connect the EIM interface of CPU to the 137th foot；
110th foot, the 111st foot connect the I2C interface of CPU；
113rd foot, the 114th foot connect the EPIT_OUT interface of CPU；
116th foot connects the SPI interface of CPU to the 119th foot；
139th foot, the 141st foot, the 143rd foot connect CPU's to the 169th foot
RGB shows interface；
171st foot connects the RMII network interface of CPU to the 182nd foot；
183rd foot, the 184th foot connect the BOOT_MODE interface of CPU；
180th octal connects the LVDS1 interface of CPU to the 197th foot；
199th foot connects the LVDS2 interface of CPU to the 200th octal.
Preferably, DDR3 main memory circuit comprises four 16 DDR3 chips.
Preferably, the planar dimension of core board is rectangle, long a width of 85mm*55mm.
Core board of the present utility model can support multiple automobile instrument liquid crystal display screen, as can support rgb interface liquid crystal display screen,
The liquid crystal display screen of LVDS interface, the liquid crystal display screen of MIPI interface, consequently facilitating screen type selecting in product development process, improve it and lead to
By property, to reduce signaling conversion circuit, reduce hardware cost and development difficulty, shorten the construction cycle.Meanwhile, this practicality
The liquid crystal display screen that nucleus core can support resolution to be 1920*720.
Accompanying drawing explanation
Fig. 1 is principle and the external interface block diagram of this utility model core board.
Fig. 2 is the pin circuitry schematic diagram of adapter J1 in core board.
Fig. 3 is the pin circuitry schematic diagram of the 209 foot adapter J2 being provided with stamp hole in core board.
Detailed description of the invention
Below in conjunction with the accompanying drawings this utility model preferred embodiment is elaborated.
See Fig. 1-3, the core board of the present embodiment pure liquid crystal automobile instrument, comprise: CPU and being connected on CPU
PMIC electric power management circuit, DDR3 main memory circuit, NAND storage circuit, EMMC store circuit, SPI Flash stores circuit,
EEPROM stores circuit, adapter J1, adapter J2.
The CPU of the present embodiment uses i.MX6U processor.
The adapter J1 of the present embodiment uses the FPC connector of 0.5mm spacing, comprises 20 pins, wherein: the first foot,
Crus secunda is connected to the GEN_3V3 interface of PMIC；The EIM_A17 to EIM_A24 that 3rd foot connects CPU respectively to the tenth foot connects
Mouthful；11st foot connects the ECSPI2_SS0 interface of CPU；12nd foot connects the EIM_WAIT interface of CPU；13rd foot connects
The EIM_LBA interface of CPU；The EIM_EB0 interface of the connection CPU of the 14th foot CPU；15th foot connects the EIM_EB3 of CPU and connects
Mouthful；16th foot, the 17th foot connect the UART1 interface of CPU；Tenth octal, the 19th foot, the 20th foot connect CPU's
GND。
The 209 foot adapter J2 being provided with stamp hole of the present embodiment use the stamp hole of 1.27mm spacing, comprise 209 and draw
Foot, wherein: the first foot, the 4th foot, the 5th foot, the 11st foot connect the GPIO interface of CPU；Crus secunda, the 3rd foot, the 6th foot,
7th foot connects the CAN interface of CPU；Octal, the 14th foot, the 21st foot, the 41st foot, the 40th octal, the 5th
15 feet, the 71st foot, the 76th foot, the 85th foot, the 80th octal, the 93rd foot, the 109th foot,
112 feet, the 115th foot, the 120th foot, the 130th octal, the 140th foot, the 100th
42 feet, the 170th foot, the 183rd foot, the 186th foot, the 187th foot, the 190th
Octal, the 209th foot connect the GND of CPU；9th foot, the tenth foot, the 12nd foot, the 13rd foot, the 81st foot, the 8th
12 feet, the 83rd foot, the 84th foot, the 89th foot, the 90th foot, the 91st foot, the 92nd foot connect CPU
UART interface；15th foot connects the audio interface of CPU to the 20th foot；22nd foot connects CPU to the 34th foot
HDMI；35th foot connects the MIPI_DSI interface of CPU to the 40th foot；42nd foot to the 47th foot is even
Connect the MIPI_CSI interface of CPU；49th foot connects the PCIE interface of CPU to the 54th foot；56th foot is to the 6th
15 feet connect the MLB interface of CPU；66th foot connects the PMIC_5V interface of PMIC；67th foot to the 70th foot,
72nd foot connects the USB interface of CPU to the 75th foot；77th to the 79th foot connects the SYS_4V2 of PMIC
Interface；80th foot connects the RST interface of CPU；86th foot, the 87th foot connect the PWM interface of CPU；94th
Foot, the 101st foot connect the GEN_3V3 interface of PMIC；95th foot connects the SD1 interface of CPU to the first centipede；The
102 feet connect the SD2 interface of CPU to the 107th foot；100th octal, the 121st foot are to the 100th
37 feet connect the EIM interface of CPU；110th foot, the 111st foot connect the I2C interface of CPU；101st
13 feet, the 114th foot connect the EPIT_OUT interface of CPU；116th foot connects to the 119th foot
The SPI interface of CPU；139th foot, the 141st foot, the 143rd foot connect to the 169th foot
The RGB of CPU shows interface；171st foot connects the RMII network interface of CPU to the 182nd foot；108th
13 feet, the 184th foot connect the BOOT_MODE interface of CPU；180th octal to the 197th foot is even
Connect the LVDS1 interface of CPU；199th foot connects the LVDS2 interface of CPU to the 200th octal.
The DDR3 main memory circuit of the present embodiment comprises four 16 DDR3 chips.
The core board planar dimension of the present embodiment is rectangle, long a width of 85mm*55mm.
J1 interface pin definition in core board is as shown in table 1.
Table 1
In core board, the definition of J2 interface pin is as shown in table 2.
Table 2
This utility model is not limited to the example above, and those skilled in the art, at model of the present utility model
In enclosing, the change made, add or replace, all should belong to protection domain of the present utility model.
Claims (6)
1. a core board for pure liquid crystal automobile instrument, is characterized in that including: CPU, PMIC electric power management circuit, DDR3 internal memory electricity
Road, NAND storage circuit, EMMC storage circuit, SPI Flash storage circuit, EEPROM store circuit, adapter J1, adapter
J2, CPU and PMIC electric power management circuit, DDR3 main memory circuit, NAND storage circuit, EMMC storage circuit, SPI Flash storage
Circuit, EEPROM storage circuit, adapter J1, adapter J2 are connected.
The core board of pure liquid crystal automobile instrument the most as claimed in claim 1, is characterized in that: described CPU selects i.MX6U process
Device.
The core board of pure liquid crystal automobile instrument the most as claimed in claim 1, is characterized in that: comprise in described DDR3 main memory circuit
Four 16 DDR3 chips.
The core board of pure liquid crystal automobile instrument the most as claimed in claim 1, is characterized in that: described adapter J1 selects 0.5mm
The FPC connector of spacing, comprises 20 pins, and wherein, the first foot, crus secunda are connected to the GEN_3V3 interface of PMIC；3rd foot
EIM_A17 to the EIM_A24 interface of CPU is connected respectively to the tenth foot；11st foot connects the ECSPI2_SS0 interface of CPU；The
12 feet connect the EIM_WAIT interface of CPU；13rd foot connects the EIM_LBA interface of CPU；14th foot connects CPU's
EIM_EB0 interface；15th foot connects the EIM_EB3 interface of CPU；16th foot, the 17th foot connect the UART1 interface of CPU；
Tenth octal, the 19th foot, the 20th foot connect the GND of CPU.
The core board of pure liquid crystal automobile instrument the most as claimed in claim 1, is characterized in that: described adapter J2 selects and is provided with postal
The 209 foot adapters in ticket hole, use the stamp hole of 1.27mm spacing, comprise 209 pins, wherein, the first foot, the 4th foot, the
Five feet, the 11st foot connect the GPIO interface of CPU；Crus secunda, the 3rd foot, the 6th foot, the 7th foot connect the CAN interface of CPU；The
Octal, the 14th foot, the 21st foot, the 41st foot, the 40th octal, the 55th foot, the 71st foot, the 76th
Foot, the 85th foot, the 80th octal, the 93rd foot, the 109th foot, the 112nd foot, the 115th
Foot, the 120th foot, the 130th octal, the 140th foot, the 142nd foot, the 170th foot, first
183 feet, the 186th foot, the 187th foot, the 190th octal, the 209th foot connect CPU's
GND；9th foot, the tenth foot, the 12nd foot, the 13rd foot, the 81st foot, the 82nd foot, the 83rd foot, the 84th
Foot, the 89th foot, the 90th foot, the 91st foot, the 92nd foot connect the UART interface of CPU；15th foot is to second
Ten feet connect the audio interface of CPU；22nd foot connects the HDMI of CPU to the 34th foot；35th foot is to
40 feet connect the MIPI_DSI interface of CPU；42nd foot connects the MIPI_CSI interface of CPU to the 47th foot；4th
19 feet connect the PCIE interface of CPU to the 54th foot；56th foot connects the MLB interface of CPU to the 65th foot；The
66 feet connect the PMIC_5V interface of CPU；67th foot connects to the 70th foot, the 72nd foot to the 75th foot
The USB interface of CPU；77th to the 79th foot connects the SYS_4V2 interface of PMIC；80th foot connects the RST of CPU and connects
Mouthful；86th foot, the 87th foot connect the PWM interface of CPU；94th foot, the 101st foot connect PMIC's
GEN_3V3 interface；95th foot connects the SD1 interface of CPU to the first centipede；102nd foot to the 107th foot is even
Connect the SD2 interface of CPU；100th octal, the 121st foot connect the EIM interface of CPU to the 137th foot；The
110 feet, the 111st foot connect the I2C interface of CPU；113rd foot, the 114th foot connect
The EPIT_OUT interface of CPU；116th foot connects the SPI interface of CPU to the 119th foot；139th
Foot, the 141st foot, the 143rd foot to the 169th foot connects the RGB of CPU and shows interface；107th
11 feet connect the RMII network interface of CPU to the 182nd foot；183rd foot, the 184th foot connect
The BOOT_MODE interface of CPU；180th octal connects the LVDS1 interface of CPU to the 197th foot；109th
19 feet connect the LVDS2 interface of CPU to the 200th octal.
6. the core board of pure liquid crystal automobile instrument as described in any one of claim 1-5, is characterized in that: described core board plane
A size of rectangle, a length of 85mm, a width of 55mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620407122.7U CN205787713U (en) | 2016-05-06 | 2016-05-06 | A kind of core board of pure liquid crystal automobile instrument |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620407122.7U CN205787713U (en) | 2016-05-06 | 2016-05-06 | A kind of core board of pure liquid crystal automobile instrument |
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| CN205787713U true CN205787713U (en) | 2016-12-07 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106679806A (en) * | 2017-01-19 | 2017-05-17 | 深圳大学 | Spectrum detection system and method based on micro spectrometer |
| CN106679805A (en) * | 2017-01-19 | 2017-05-17 | 深圳大学 | Portable miniature spectrograph |
| CN106768334A (en) * | 2017-01-19 | 2017-05-31 | 深圳大学 | A kind of Portable two-dimensional is imaged micro spectrometer |
| CN107627847A (en) * | 2017-09-06 | 2018-01-26 | 沈阳中科唯电子技术有限公司 | A kind of configurable intelligence instrument of full liquid crystal |
-
2016
- 2016-05-06 CN CN201620407122.7U patent/CN205787713U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106679806A (en) * | 2017-01-19 | 2017-05-17 | 深圳大学 | Spectrum detection system and method based on micro spectrometer |
| CN106679805A (en) * | 2017-01-19 | 2017-05-17 | 深圳大学 | Portable miniature spectrograph |
| CN106768334A (en) * | 2017-01-19 | 2017-05-31 | 深圳大学 | A kind of Portable two-dimensional is imaged micro spectrometer |
| CN107627847A (en) * | 2017-09-06 | 2018-01-26 | 沈阳中科唯电子技术有限公司 | A kind of configurable intelligence instrument of full liquid crystal |
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