CN205596087U - PWM ripples signal generator based on FPGA - Google Patents
PWM ripples signal generator based on FPGA Download PDFInfo
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- CN205596087U CN205596087U CN201620302039.3U CN201620302039U CN205596087U CN 205596087 U CN205596087 U CN 205596087U CN 201620302039 U CN201620302039 U CN 201620302039U CN 205596087 U CN205596087 U CN 205596087U
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Abstract
The utility model provides a PWM ripples signal generator based on FPGA, it has carry out the FPGA circuit controlled to the circuit, the PWM ripples produces the output of circuit, the input termination FPGA circuit of this circuit, communication circuit, this circuit and FPGA circuit link to each other, and the device reasonable in design, the circuit is simple, the integrated level is high, the peripheral cell is few, repeatedly usable, have and multiplely be convenient for and peripheral equipment communication and configuration wave form to the external tapping, can be applied to laboratory PWM ripples signal generating device.
Description
Technical field
This utility model belongs to the direct or frequency converted equipment producing vibration or device technique field, is specifically related to
To PWM wave generator based on FPGA.
Background technology
FPGA is programmable logic array, and the development of modern production process makes the cost of FPGA more and more lower, and
FPGA has flexible configurable feature, very easy to use, gradually replaces application-specific integrated circuit ASIC, more
Get over and favored by designer.PWM is exactly pulse width modulation, namely the impulse waveform of variable duty ratio.
PWM waveform purposes is relatively wide, such as frequency conversion, speed governing, and Digital Signal Processing is medium.One frequency, amplitude, account for
The lifting of systematic function is had very important recast to use by the adjustable pwm signals such as empty ratio.For user,
Understand PWM principle completely, be used in flexibly in actual life, relatively difficulty.At present, PWM ripple signal produces
If raw main circuit is realized by single chip machine controlling circuit, and dsp processor control circuit realizes.These
Produce the circuit of PWM ripple signal, have the disadvantage that
1. device volume is relatively big, and cost is high；
2. circuit design is more complicated, and peripheral cell is many；
The most inconvenient to carry, debug dumb.
Summary of the invention
Technical problem to be solved in the utility model is to overcome the deficiency of above-mentioned PWM wave generator, provides
A kind of reasonable in design, circuit is simple, reliability is high, peripheral cell is few, reusable, have multiple to external
Mouth is easy to and peripheral communications and the PWM wave generator based on FPGA of configuration waveform.
Solve above-mentioned technical problem and the technical scheme is that it has: the FPGA circuitry that circuit is controlled；
PWM wave generation circuit, the outfan of the input termination FPGA circuitry of this circuit；Telecommunication circuit, this circuit and FPGA
Circuit is connected.
PWM wave generation circuit of the present utility model is: 13 feet of integrated circuit U3～28 feet, 9 feet, 12 feet～
10 feet connect successively 1 foot of integrated circuit U1～3 feet, 6 feet～8 feet, 10 feet, 11 feet, 13 feet, 28 feet,
30 feet, 31 feet, 33 feet, 34 feet, 38 feet, 39 feet, 43 feet, 44 feet, 46 feet, 49 feet, integrated electricity
6 feet of road U3 by resistance R1 ground connection and by resistance R2 and resistance R3 connect integrated circuit U3DE 4 foot, 3
2 feet of foot connecting connector J3,7 feet connect the positive pole of 15V power supply, 8 feet connect the negative pole of 15V power supply, 1 foot and 2
Foot ground connection, 3 feet of integrated circuit U4～1 foot connect 51 feet of integrated circuit U1～53 feet successively, 4 feet meet 5V
Power supply, 5 foot ground connection, 4 feet of 6 foot connecting connector J3,1 foot of adapter J3,3 feet, 5 foot ground connection；Collection
The model becoming circuit U 3 is DAC715UL, the model of integrated circuit U4 is DAC7311.
FPGA circuitry of the present utility model is: 24 feet of integrated circuit U1 connect 4 feet of crystal oscillator Y1, integrated circuit
126 feet of U1,125 feet, 121 feet, 120 feet, 58 feet～60 feet, 64 feet～68 feet, 70 feet, 71 feet,
73 feet, 74 feet connect telecommunication circuit, 15 feet of integrated circuit U1,20 feet, 16 feet, 18 feet, 94 feet, 96
14 feet of foot, 97 feet, 21 feet, 12 feet, 92 feet, 14 feet, 9 feet connecting connector J1 successively～3 feet, collection
Become 1 foot of circuit U 1～3 feet, 6 feet～8 feet, 10 feet, 11 feet, 13 feet, 28 feet, 30 feet, 31 feet,
33 feet, 34 feet, 38 feet, 39 feet, 43 feet, 44 feet, 46 feet, 49 feet, 51 feet～53 feet connect PWM ripple
Produce circuit, 5 feet of integrated circuit U1,29 feet, 45 feet, 61 feet, 78 feet, 102 feet, 116 feet, 134
Foot connects 1.2V power supply, 139 feet of integrated circuit U1,130 feet, 122 feet, 117 feet, 93 feet, 81 feet,
62 feet, 56 feet, 47 feet, 40 feet, 26 feet, 17 feet connect 3V power supply, 109 feet of integrated circuit U1,37
Foot connects A1.2V power supply, and 107 feet of integrated circuit U1,35 feet connect 2.5V power supply, 4 feet of integrated circuit U1,
19 feet, 22 feet, 27 feet, 41 feet, 48 feet, 57 feet, 63 feet, 140 feet, 131 feet, 123 feet, 118
Foot, 95 feet, 82 feet, 79 feet, 108 feet, 36 foot ground connection, 1 foot of crystal oscillator Y1 connects 3V power supply, 3 feet connect
Ground, the 1 foot ground connection of adapter J1；The model of integrated circuit U1 is EP4CE6E22C7, and the model of crystal oscillator Y1 is
JHY50M。
Owing to this utility model uses integrated circuit U1 to produce signal be input to as fpga chip, telecommunication circuit
FPGA circuitry, is produced parallel port Read-write Catrol logic by integrated circuit U1, the data received is processed, collection
Becoming circuit U 1 to create the control logic of 2 kinds of digital-to-analogue conversions, the data after processing are sent to PWM ripple and produce electricity
Road, this device is reasonable in design, circuit is simple, integrated level is high, peripheral cell is few, reusable, have multiple
External interface is easy to and peripheral communications and configuration waveform, can be applicable to laboratory PWM ripple signal generation apparatus.
Accompanying drawing explanation
Fig. 1 is this utility model electrical principle block diagram.
Fig. 2 is the electronic circuit schematic diagram of FPGA circuitry and telecommunication circuit in Fig. 1.
Fig. 3 is the electronic circuit schematic diagram of PWM wave generation circuit and telecommunication circuit in Fig. 1.
Detailed description of the invention
With embodiment, this utility model is described in further details below in conjunction with the accompanying drawings, but this utility model is not limited to
These embodiments.
Embodiment 1
In FIG, this utility model PWM based on FPGA wave generator is produced by FPGA circuitry, PWM ripple
Raw circuit, telecommunication circuit connect and compose, the input of the output termination PWM wave generation circuit of FPGA circuitry, FPGA
Circuit is connected with telecommunication circuit.
In fig. 2, the FPGA circuitry of the present embodiment is connected structure by integrated circuit U1, crystal oscillator Y1, adapter J1
Becoming, the model of integrated circuit U1 is EP4CE6E22C7, and the model of crystal oscillator Y1 is JHY50M.Integrated circuit U1
24 feet connect 4 feet of crystal oscillator Y1,126 feet of integrated circuit U1,125 feet, 121 feet, 120 feet, 58 feet～
60 feet, 64 feet～68 feet, 70 feet, 71 feet, 73 feet, 74 feet connect telecommunication circuit, the 15 of integrated circuit U1
Foot, 20 feet, 16 feet, 18 feet, 94 feet, 96 feet, 97 feet, 21 feet, 12 feet, 92 feet, 14 feet, 9
14 feet of foot connecting connector J1 successively～3 feet, 1 foot of integrated circuit U1～3 feet, 6 feet～8 feet, 10 feet,
11 feet, 13 feet, 28 feet, 30 feet, 31 feet, 33 feet, 34 feet, 38 feet, 39 feet, 43 feet, 44 feet,
46 feet, 49 feet, 51 feet～53 feet connect PWM wave generation circuit, 5 feet of integrated circuit U1,29 feet, 45 feet,
61 feet, 78 feet, 102 feet, 116 feet, 134 feet connect 1.2V power supply, 139 feet of integrated circuit U1,130
Foot, 122 feet, 117 feet, 93 feet, 81 feet, 62 feet, 56 feet, 47 feet, 40 feet, 26 feet, 17 feet connect
3V power supply, 109 feet of integrated circuit U1,37 feet connect A1.2V power supply, 107 feet of integrated circuit U1,35
Foot connects 2.5V power supply, 4 feet of integrated circuit U1,19 feet, 22 feet, 27 feet, 41 feet, 48 feet, 57 feet,
63 feet, 140 feet, 131 feet, 123 feet, 118 feet, 95 feet, 82 feet, 79 feet, 108 feet, 36 foot ground connection,
1 foot of crystal oscillator Y1 connects 3V power supply, 3 foot ground connection, the 1 foot ground connection of adapter J1.
In figure 3, the PWM wave generation circuit of the present embodiment by integrated circuit U3, integrated circuit U4, resistance R1～
Resistance R3, adapter J3 connect and compose, and the model of integrated circuit U3 is DAC715UL, the type of integrated circuit U4
Number it is DAC7311.13 feet of integrated circuit U3～28 feet, 9 feet, 12 feet～10 feet connect integrated circuit successively
1 foot of U1～3 feet, 6 feet～8 feet, 10 feet, 11 feet, 13 feet, 28 feet, 30 feet, 31 feet, 33 feet,
34 feet, 38 feet, 39 feet, 43 feet, 44 feet, 46 feet, 49 feet, 6 feet of integrated circuit U3 pass through resistance
R1 ground connection and by resistance R2 and resistance R3 connect integrated circuit U3DE 4 foot, 2 feet of 3 foot connecting connector J3,
7 feet connect the positive pole of 15V power supply, 8 feet connect the negative pole of 15V power supply, 1 foot and 2 foot ground connection, integrated circuit U4's
3 feet～1 foot connect 51 feet of integrated circuit U1～53 feet successively, 4 feet connect 5V power supply, 5 foot ground connection, 6 feet connect
4 feet of adapter J3,1 foot of adapter J3,3 feet, 5 foot ground connection.
At Fig. 2, in 3, the telecommunication circuit of the present embodiment is by integrated circuit U2, integrated circuit U5, resistance 4～electricity
Resistance R7, electric capacity C1, electric capacity C2, adapter J1, adapter J4 connect and compose, and the model of integrated circuit U2 is
MAX481, the model of integrated circuit U5 are ET245RL.4 feet～1 foot of integrated circuit U2 connect integrated electricity successively
126 feet of road U1,125 feet, 121 feet, 120 feet, 6 feet of integrated circuit U2 and 7 feet connecting connector successively
2 feet of J2 and 1 foot, 5 foot ground connection, 8 feet connect 5V power supply, and 12 feet of integrated circuit U5 are connect by resistance 4
1 foot of 5V power supply splice connection device J4,16 feet pass through electricity by 2 feet of resistance R5 connecting connector J4,15 feet
Resistance 3 feet of R6 connecting connector J4,19 feet connect one end of 5V power supply shunt-wound capacitance C1,17 feet by resistance R7
Connect one end of electric capacity C2,1 foot of integrated circuit U5,5 feet, 3 feet, 11 feet, 2 feet, 9 feet, 10 feet, 6
Foot, 23 feet, 22 feet, 13 feet, 14 feet connect successively 58 feet of integrated circuit U1～60 feet, 64 feet～68 feet,
70 feet, 71 feet, 73 feet, 74 feet, 20 feet of integrated circuit U5 connect 5V power supply, 4 feet connect 3V power supply, 25
Foot, 7 feet, 18 feet, 21 feet, 26 foot ground connection, the other end ground connection of electric capacity C1 and electric capacity C2, adapter J4
4 feet, 5 feet, 6 foot ground connection.
Operation principle of the present utility model is as follows:
System electrification, integrated circuit U1 starts to initialize, when having signal from 2 feet of adapter J4,3 foot outputs,
Being input to 15 feet of integrated circuit U5,16 feet through resistance R5, R6, control signal is from integrated circuit U5's
22 feet, 23 feet, 13 feet, 14 feet output, be input to 70 feet of integrated circuit U1,71 feet, 73 feet, 74
Foot；Data signal is from 1 foot of integrated circuit U5,5 feet, 3 feet, 11 feet, 2 feet, 9 feet, 10 feet, 6 feet
Output, is input to 58 feet～60 feet, 64 feet～68 feet of integrated circuit U1.Produce owing to integrated circuit U1 is internal
Having given birth to the control logic of parallel port read-write, integrated circuit U1 starts to receive the data of parallel port, and data is processed.
Meanwhile, integrated circuit U1 creates the control logic of 2 kinds of digital-to-analogue conversions.Wherein, a kind of conversion logic,
Control signal, from 43 feet of integrated circuit U1,44 feet, 46 feet, 49 foot outputs, is input to integrated circuit U3
9 feet, 12 feet, 11 feet, 10 feet；Data signal from 1 foot of integrated circuit U1～3 feet, 6 feet～8 feet,
10 feet～11 feet, 13 feet, 28 feet, 30 feet～31 feet, 33 feet～34 feet, 38 feet～the output of 9 feet, input
To 13 feet～28 feet of integrated circuit U3, from the 3 foot outputs of integrated circuit U3, it is input to adapter J3；Separately
A kind of conversion logic, control signal, from 52 feet of integrated circuit U1,53 foot outputs, is input to integrated circuit U4
2 feet, 1 foot；Data signal, from the 51 foot outputs of integrated circuit U1, is input to 3 feet of integrated circuit U4,
From the 6 foot outputs of integrated circuit U4, it is input to adapter J3.
Claims (3)
1. a PWM wave generator based on FPGA, it is characterised in that it has:
The FPGA circuitry that circuit is controlled；
PWM wave generation circuit, the outfan of the input termination FPGA circuitry of this circuit；
Telecommunication circuit, this circuit is connected with FPGA circuitry.
PWM wave generator based on FPGA the most according to claim 1, it is characterised in that described
PWM wave generation circuit is: 13 feet of integrated circuit U3～28 feet, 9 feet, 12 feet～10 feet connect integrated electricity successively
1 foot of road U1～3 feet, 6 feet～8 feet, 10 feet, 11 feet, 13 feet, 28 feet, 30 feet, 31 feet, 33
Foot, 34 feet, 38 feet, 39 feet, 43 feet, 44 feet, 46 feet, 49 feet, 6 feet of integrated circuit U3 are by electricity
Resistance R1 ground connection and by resistance R2 and resistance R3 connect integrated circuit U3DE 4 foot, the 2 of 3 foot connecting connector J3
Foot, 7 feet connect the positive pole of 15V power supply, 8 feet connect the negative pole of 15V power supply, 1 foot and 2 foot ground connection, integrated circuit
3 feet of U4～1 foot connect 51 feet of integrated circuit U1～53 feet successively, 4 feet connect 5V power supply, 5 foot ground connection, 6
4 feet of foot connecting connector J3,1 foot of adapter J3,3 feet, 5 foot ground connection；The model of integrated circuit U3 is
DAC715UL, the model of integrated circuit U4 are DAC7311.
PWM wave generator based on FPGA the most according to claim 1, it is characterised in that described
FPGA circuitry is: 24 feet of integrated circuit U1 connect 4 feet of crystal oscillator Y1,126 feet of integrated circuit U1,125
Foot, 121 feet, 120 feet, 58 feet～60 feet, 64 feet～68 feet, 70 feet, 71 feet, 73 feet, 74 feet connect
Telecommunication circuit, 15 feet of integrated circuit U1,20 feet, 16 feet, 18 feet, 94 feet, 96 feet, 97 feet, 21
14 feet of foot, 12 feet, 92 feet, 14 feet, 9 feet connecting connector J1 successively～3 feet, the 1 of integrated circuit U1
Foot～3 feet, 6 feet～8 feet, 10 feet, 11 feet, 13 feet, 28 feet, 30 feet, 31 feet, 33 feet, 34 feet,
38 feet, 39 feet, 43 feet, 44 feet, 46 feet, 49 feet, 51 feet～53 feet connect PWM wave generation circuit, integrated
5 feet of circuit U 1,29 feet, 45 feet, 61 feet, 78 feet, 102 feet, 116 feet, 134 feet connect 1.2V power supply,
139 feet of integrated circuit U1,130 feet, 122 feet, 117 feet, 93 feet, 81 feet, 62 feet, 56 feet, 47
Foot, 40 feet, 26 feet, 17 feet connect 3V power supply, and 109 feet of integrated circuit U1,37 feet connect A1.2V power supply,
107 feet of integrated circuit U1,35 feet connect 2.5V power supply, 4 feet of integrated circuit U1,19 feet, 22 feet, 27
Foot, 41 feet, 48 feet, 57 feet, 63 feet, 140 feet, 131 feet, 123 feet, 118 feet, 95 feet, 82 feet,
79 feet, 108 feet, 36 foot ground connection, 1 foot of crystal oscillator Y1 connects 3V power supply, 3 foot ground connection, the 1 of adapter J1
Foot ground connection；The model of integrated circuit U1 is EP4CE6E22C7, and the model of crystal oscillator Y1 is JHY50M.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620302039.3U CN205596087U (en) | 2016-04-12 | 2016-04-12 | PWM ripples signal generator based on FPGA |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620302039.3U CN205596087U (en) | 2016-04-12 | 2016-04-12 | PWM ripples signal generator based on FPGA |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205596087U true CN205596087U (en) | 2016-09-21 |
Family
ID=56923104
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620302039.3U Expired - Fee Related CN205596087U (en) | 2016-04-12 | 2016-04-12 | PWM ripples signal generator based on FPGA |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205596087U (en) |
-
2016
- 2016-04-12 CN CN201620302039.3U patent/CN205596087U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160921 Termination date: 20170412 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |