CN205545627U - Video mosaicing processing ware of tailorable signal source - Google Patents
Video mosaicing processing ware of tailorable signal source Download PDFInfo
- Publication number
- CN205545627U CN205545627U CN201620247928.4U CN201620247928U CN205545627U CN 205545627 U CN205545627 U CN 205545627U CN 201620247928 U CN201620247928 U CN 201620247928U CN 205545627 U CN205545627 U CN 205545627U
- Authority
- CN
- China
- Prior art keywords
- card
- video
- fpga
- signal source
- serial bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000012545 processing Methods 0.000 title abstract description 7
- 230000003321 amplification Effects 0.000 claims description 5
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 5
- 238000009966 trimming Methods 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 230000019771 cognition Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
Landscapes
- Studio Circuits (AREA)
Abstract
The utility model relates to a video mosaicing processing ware of tailorable signal source, including host computer, singlechip, serial bus, FPGA control board, multiple entry capture card and multichannel output card, the host computer carries out communication connection through serial bus with the singlechip, and the singlechip carries out communication connection through serial bus with the FPGA control board, and multiple entry capture card and multichannel output card all link to each other with the FPGA control board. Be equipped with consecutive video image input module, image sanction shear die piece on the FPGA control board, enlarge module and video image output module. This video mosaicing processing utensil is equipped with trimming and cutting edge function to all high resolution video signal of input to thoroughly overcome the black surround problem that the front end signal produced, through tailor the fractionated gain function that also can realize the image to video image, so as to helps user's high efficiency and swiftly looks over the important regional information in the display screen concatenation image, makes the large screen splice video wall efficient operation more.
Description
Technical field
This utility model relates to a kind of video image splicing device, particularly relate to a kind of based on FPGA can be with the video-splicing processor of cutting video signal source.
Background technology
Now with the development of video-splicing Display Technique, large-screen splicing video wall effect true to nature with its fine definition, color and big picture is widely used in the industries such as education and scientific research, government notice, Information publishing, administration, military commanding, display and demonstration, safety monitoring, household appliance sale.Video-splicing processor is the nucleus equipment of giant-screen video wall, generally use embedded hardware framework, there is multiple concatenation unit, each concatenation unit has independent video processing module, and video signal source is input to unit, and each carries out Video processing, it is partitioned into the part needing display, and after this partial video signal is amplified, drive through hardware circuit and show video signal, thus realize the purpose that large-screen splicing shows.Existing video image occurs after completing splicing that the image border of splicing exists overlapping and occurs image information to lose the most within display screen so that the edge of image cannot effectively be observed by user；Additionally, often due to the front end signal that video-splicing processor receives can affect experience and the impression of user's viewing with black surround after splicing.
Summary of the invention
The purpose of this utility model be to provide a kind of can be with the video-splicing processor of cutting video signal source, this processor entirety is the pure hardware structure with FPGA as core, use modularized design, have complete after the video signal that front end inputs by image cropping module carries out free cutting seamless spliced, perfect can solve the problem of black borders that front end signal produces, also improve the accuracy of splicing.
To achieve these goals, the technical solution adopted in the utility model is, a kind of can the video-splicing processor of cutting signal source, card, multichannel input capture card and multiple-channel output card is controlled including host computer, universal serial bus, FPGA, described host computer controls card by universal serial bus with FPGA and is communicatively coupled, and described multichannel input capture card all controls card with FPGA with multiple-channel output card and is connected；Described FPGA controls card and is provided with video image input module, image cropping module, amplification module and the video image output module being sequentially connected.
As a kind of improvement of the present utility model, also including that single-chip microcomputer, described host computer are communicatively coupled with single-chip microcomputer by universal serial bus, described single-chip microcomputer controls card by universal serial bus with FPGA and is communicatively coupled.
As a kind of improvement of the present utility model, the universal serial bus that described host computer and single-chip microcomputer are communicatively coupled uses RS232 bus, described single-chip microcomputer and FPGA to control the universal serial bus employing I2C bus that card is communicatively coupled.
As a kind of improvement of the present utility model, described multichannel input capture card and multiple-channel output fasten and are arranged on base plate, described base plate is provided with intersection switching circuit, described intersection switching circuit controls card with FPGA and is connected, multichannel input capture card and multiple-channel output card all with intersect switching circuit and be connected, multichannel input capture card and multiple-channel output card switch over the corresponding relation of input and output, so any one input by intersection switching circuit can be video signal transmission to output.
As a kind of improvement of the present utility model, described intersection switching circuit uses CrossPoint numeral multibus data route switching chip to be designed.
As a kind of improvement of the present utility model, described host computer uses PC.
The coordinate position needing the video signal source of cutting is first sent to single-chip microcomputer by RS232 bus by host computer, then single-chip microcomputer sends FPGA control card by I2C bus to coordinate position, after the video signal source that input capture card collects is sent to image cropping module by video image input module, needs cutting part is stored in internal memory, video image through cutting is entered into after amplification module carries out merging processing and amplifying and is exported to intersecting switching circuit by video image output module, is delivered in display screen show through intersecting after switching circuit switches.
Relative to prior art, this utility model carries out signal by the image cropping module that FPGA controls to arrange in card to video signal source and removes black surround and carry out picture partial enlargement process by amplification module, video-splicing processor is made to possess the trimming of all high definition video signals to input and cutting edge function, thus thoroughly overcome the problem of black borders that front end signal produces, also the partial enlargement function of image can be realized by video image being carried out cutting, it is thus possible to assist user's efficient quick to check the important area information in display screen stitching image, make large-screen splicing video wall more Efficient Operation.
Accompanying drawing explanation
Fig. 1 is structural representation of the present utility model.
Fig. 2 is that in this utility model, video signal source controls, through FPGA, the schematic flow sheet that card processes.
Detailed description of the invention
In order to deepen understanding and cognition of the present utility model, below in conjunction with the accompanying drawings this utility model it is further described and introduce.
As illustrated in fig. 1 and 2, a kind of can the video-splicing processor of cutting signal source, card, multichannel input capture card and multiple-channel output card is controlled including host computer, single-chip microcomputer, RS232 bus, I2C bus, FPGA, described host computer is communicatively coupled with single-chip microcomputer by RS232 bus, and described single-chip microcomputer controls card by I2C bus with FPGA and is communicatively coupled.Described multichannel input capture card all controls card with FPGA with multiple-channel output card and is connected；Described FPGA controls card and is provided with video image input module, image cropping module, amplification module and the video image output module being sequentially connected.Described multichannel input capture card and multiple-channel output fasten and are arranged on base plate, described base plate is provided with intersection switching circuit, multichannel input capture card and multiple-channel output card switch over the corresponding relation of input and output by intersection switching circuit, described intersection switching circuit controls card with FPGA and is connected, and so any one input can give output video signal transmission.Wherein, described intersection switching circuit uses CrossPoint numeral multibus data route switching chip to be designed.
The particular advantages that the aspects such as single-chip microcomputer is little with its volume, multiple functional, cheap, reliability is high are had, is widely used for a long time in each field；And FPGA is a kind of emerging PLD, there is higher density, faster operating rate and powerful flexible in programming.
High density based on FPGA, at high speed, the ability of powerful field-programmable and the powerful data processing function of single-chip microcomputer, it is achieved the signal source cutting of video-splicing processor processes function, programs simple and direct and controls reliable, with low cost.Host computer uses PC, the coordinate position needing the video signal source of cutting is sent to single-chip microcomputer by RS232 universal serial bus by the upper computer software in PC, this coordinate position is sent to FPGA by I2C universal serial bus and controls card by single-chip microcomputer again, FPGA controls the image cropping module of card and carries out cutting edge process according to the control instruction video image to receiving, remove the black surround garbage carried in signal source, not only increase the appreciation effect of video image, also achieve the partial enlargement function of video image simultaneously, user's efficient quick can be assisted to check the important area information in display screen stitching image.
It should be noted that above-described embodiment, be not used for limiting protection domain of the present utility model, equivalents done on the basis of technique scheme or replacement each fall within this utility model scope of the claimed protection.
Claims (6)
1. one kind can the video-splicing processor of cutting signal source, it is characterized in that: include that host computer, universal serial bus, FPGA control card, multichannel input capture card and multiple-channel output card, described host computer controls card by universal serial bus with FPGA and is communicatively coupled, and described multichannel input capture card all controls card with FPGA with multiple-channel output card and is connected；Described FPGA controls card and is provided with video image input module, image cropping module, amplification module and the video image output module being sequentially connected.
A kind of can the video-splicing processor of cutting signal source, it is characterized in that, also including that single-chip microcomputer, described host computer are communicatively coupled with single-chip microcomputer by universal serial bus, described single-chip microcomputer controls card by universal serial bus with FPGA and is communicatively coupled.
A kind of can the video-splicing processor of cutting signal source, it is characterized in that, the universal serial bus that described host computer and single-chip microcomputer are communicatively coupled uses RS232 bus, described single-chip microcomputer and FPGA to control the universal serial bus employing I2C bus that card is communicatively coupled.
A kind of can the video-splicing processor of cutting signal source, it is characterized in that, described multichannel input capture card and multiple-channel output fasten and are arranged on base plate, described base plate is provided with intersection switching circuit, described intersection switching circuit and FPGA control card and are connected, multichannel input capture card and multiple-channel output card all with intersect switching circuit and be connected.
A kind of can the video-splicing processor of cutting signal source, it is characterised in that described intersection switching circuit uses CrossPoint numeral multibus data route switching chip to be designed.
6. a kind of as described in claim 3 or 5 can the video-splicing processor of cutting signal source, it is characterised in that described host computer uses PC.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620247928.4U CN205545627U (en) | 2016-03-29 | 2016-03-29 | Video mosaicing processing ware of tailorable signal source |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620247928.4U CN205545627U (en) | 2016-03-29 | 2016-03-29 | Video mosaicing processing ware of tailorable signal source |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205545627U true CN205545627U (en) | 2016-08-31 |
Family
ID=56786299
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620247928.4U Expired - Fee Related CN205545627U (en) | 2016-03-29 | 2016-03-29 | Video mosaicing processing ware of tailorable signal source |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205545627U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106506987A (en) * | 2016-11-17 | 2017-03-15 | 西安诺瓦电子科技有限公司 | LED display control methods, image mosaic Method of Edge Optimizing and processing meanss |
| CN106708459A (en) * | 2017-03-17 | 2017-05-24 | 深圳市东明炬创电子有限公司 | Large screen splicing controller |
| CN108597384A (en) * | 2018-06-25 | 2018-09-28 | 南京达斯琪数字科技有限公司 | Display system and method |
| CN111312071A (en) * | 2019-12-07 | 2020-06-19 | 杨涛 | Splicing method of novel multi-screen advertisement player |
-
2016
- 2016-03-29 CN CN201620247928.4U patent/CN205545627U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106506987A (en) * | 2016-11-17 | 2017-03-15 | 西安诺瓦电子科技有限公司 | LED display control methods, image mosaic Method of Edge Optimizing and processing meanss |
| CN106506987B (en) * | 2016-11-17 | 2019-12-24 | 西安诺瓦星云科技股份有限公司 | LED display control method, image splicing edge optimization method and processing device |
| CN106708459A (en) * | 2017-03-17 | 2017-05-24 | 深圳市东明炬创电子有限公司 | Large screen splicing controller |
| CN108597384A (en) * | 2018-06-25 | 2018-09-28 | 南京达斯琪数字科技有限公司 | Display system and method |
| CN108597384B (en) * | 2018-06-25 | 2024-03-08 | 南京达斯琪数字科技有限公司 | Display system and method |
| CN111312071A (en) * | 2019-12-07 | 2020-06-19 | 杨涛 | Splicing method of novel multi-screen advertisement player |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN205545627U (en) | Video mosaicing processing ware of tailorable signal source | |
| CN106598342A (en) | Design method for simultaneously using touch frame by multiple systems of intelligent whiteboard television | |
| CN103235658B (en) | All-in-one machine and method for realizing quick touch of all channels in all-in-one machine | |
| WO2020034893A1 (en) | Intelligent interaction system, writing track display method and device, tablet and medium | |
| CN103197801B (en) | All-in-one and realize the method that external unit and built-in system touch simultaneously | |
| CN104156187A (en) | Multi-screen display equipment | |
| CN110413173B (en) | Man-machine interaction device of infrared imaging tracking system | |
| CN202677370U (en) | Multi-screen display system with sub-screen multiplexed as touch tablet | |
| CN209029087U (en) | A kind of display driving plate with TYPE C | |
| CN208521269U (en) | A kind of interactive intelligent tablet computer | |
| CN202422700U (en) | Multi-mode supporting type LED (Light Emitting Diode) screen splicing device | |
| CN202736442U (en) | Class information screen | |
| CN103677712B (en) | Touch all-in-one machine | |
| CN202677369U (en) | Multi-screen display system with sub-screens serving as keyboard | |
| CN205265804U (en) | Visual mixing matrix | |
| CN208924359U (en) | A kind of dual system video conference all-in-one machine | |
| CN205005183U (en) | Visual monitor platform of information operation | |
| CN203150084U (en) | Display control system of stage dialogue prompting screen | |
| CN209447142U (en) | A kind of multiple point touching laryngoscope display terminal control panel | |
| CN209881933U (en) | Liquid crystal splicing device | |
| CN203038642U (en) | Double-sided display device | |
| CN207718323U (en) | A kind of lamp switch based on gesture identification | |
| CN102819284A (en) | Motherboard-shared display system | |
| CN209606736U (en) | A kind of liquid crystal-spliced system based on information realtime interactive | |
| CN209913942U (en) | High-definition matrix switching device for DVI or HDVI signal display |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20170731 Address after: 210000 Jiangsu Province, Nanjing city Yuhuatai district road 18, building 3, Phoenix Patentee after: JIANGSU OUDI ELECTRONIC TECHNOLOGY Co.,Ltd. Address before: 210008, No. 3 Tan Avenue, Gaochun Economic Development Zone, Nanjing, Jiangsu Patentee before: NANJING ODIN TECHNOLOGY Co.,Ltd. |
|
| TR01 | Transfer of patent right | ||
| CP02 | Change in the address of a patent holder | ||
| CP02 | Change in the address of a patent holder |
Address after: No. 12-9 Fengji road in Yuhuatai District of Nanjing City, Jiangsu province 210039 Patentee after: JIANGSU OUDI ELECTRONIC TECHNOLOGY Co.,Ltd. Address before: 210000 Jiangsu Province, Nanjing city Yuhuatai district road 18, building 3, Phoenix Patentee before: JIANGSU OUDI ELECTRONIC TECHNOLOGY Co.,Ltd. |
|
| PE01 | Entry into force of the registration of the contract for pledge of patent right | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of utility model: Video mosaicing processing ware of tailorable signal source Effective date of registration: 20180509 Granted publication date: 20160831 Pledgee: Bank of Beijing Limited by Share Ltd. Nanjing branch Pledgor: JIANGSU OUDI ELECTRONIC TECHNOLOGY Co.,Ltd. Registration number: 2018320000062 |
|
| PC01 | Cancellation of the registration of the contract for pledge of patent right | ||
| PC01 | Cancellation of the registration of the contract for pledge of patent right |
Date of cancellation: 20190509 Granted publication date: 20160831 Pledgee: Bank of Beijing Limited by Share Ltd. Nanjing branch Pledgor: JIANGSU OUDI ELECTRONIC TECHNOLOGY Co.,Ltd. Registration number: 2018320000062 |
|
| PE01 | Entry into force of the registration of the contract for pledge of patent right | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of utility model: Video mosaicing processing ware of tailorable signal source Effective date of registration: 20190605 Granted publication date: 20160831 Pledgee: Bank of Beijing Limited by Share Ltd. Nanjing branch Pledgor: JIANGSU OUDI ELECTRONIC TECHNOLOGY Co.,Ltd. Registration number: 2019320000262 |
|
| PC01 | Cancellation of the registration of the contract for pledge of patent right | ||
| PC01 | Cancellation of the registration of the contract for pledge of patent right |
Date of cancellation: 20210406 Granted publication date: 20160831 Pledgee: Bank of Beijing Limited by Share Ltd. Nanjing branch Pledgor: JIANGSU OUDI ELECTRONIC TECHNOLOGY Co.,Ltd. Registration number: 2019320000262 |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160831 |