CN106506987B - LED display control method, image splicing edge optimization method and processing device - Google Patents
LED display control method, image splicing edge optimization method and processing device Download PDFInfo
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- CN106506987B CN106506987B CN201611013296.6A CN201611013296A CN106506987B CN 106506987 B CN106506987 B CN 106506987B CN 201611013296 A CN201611013296 A CN 201611013296A CN 106506987 B CN106506987 B CN 106506987B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/2628—Alteration of picture size, shape, position or orientation, e.g. zooming, rotation, rolling, perspective, translation
Abstract
The invention provides an LED display control method, an image splicing edge optimization method and an image splicing processing device. Specifically, a boundary extension mode is adopted, boundary extension is carried out on an image intercepting range, so that image data intercepted from input image data comprises image data on the other side of an image splicing edge, corresponding boundary extension is carried out on a screen mapping window, so that the image scaling ratio is kept unchanged, and then the whole image optimization processing is carried out on the intercepted image data by combining with an original image optimization algorithm of a video processing chip, so that the video processing chip can optimize the image data outside a display screen loading area of the video processing chip, the color distortion condition of the splicing edge is solved, and the image quality of the splicing edge is improved after processing.
Description
Technical Field
The invention relates to the technical field of display control, in particular to an LED display control method, an image splicing edge optimization method and an image splicing processing device.
Background
In a large-resolution LED display screen display control field, because the number of display screen pixels exceeds the carrying capacity of a single sending card, the display is often completed by using the picture splicing function of a video splicer or a video processor. If the image signal at the joint edge has large color difference or excessive color transition, color distortion of the joint edge in vision sometimes occurs.
Fig. 1 is a schematic diagram of a control system architecture of an LED display screen using a video splicer in the prior art. The video splicer performs image segmentation operation (or image capture operation) on a complete input video image and divides the complete input video image into four display areas which are respectively used for the loaded LED display screen division. Of course, the video splicer in fig. 1 may also be replaced by four cascaded video processors, as shown in fig. 2; the four video processors have a video input interface and a video loop-out interface so that the input video images received by each video processor are consistent; moreover, each video processor intercepts image blocks with corresponding sizes from the received input video image according to the resolution of the display area carried by the video processor.
However, an ordinary video splicer or video processor does not have an edge optimization function when realizing picture splicing, and the display effect at the spliced edge can be reduced under certain situations, so that the overall effect is influenced, and the display experience is poor.
Disclosure of Invention
Therefore, the present invention provides an LED display control method, an image stitching edge optimization method, and an image stitching processing apparatus, aiming at the defects and shortcomings in the prior art.
Specifically, an LED display control method provided in an embodiment of the present invention includes: (i) after splicing is started, detecting the image splicing edge of a loading area of the display screen; (ii) for each image splicing edge, determining an image interception boundary extension value and a screen mapping window boundary extension value according to the size of an initially set display screen loading area and an image scaling state on the premise of keeping an image scaling ratio unchanged, and performing image interception boundary extension and screen mapping window boundary extension on the position of the image splicing edge according to the determined image interception boundary extension value and the determined screen mapping window boundary extension value, wherein the display screen loading area is a local display area of a target LED display screen; (iii) after the image interception boundary extension and the screen mapping window boundary extension are finished, carrying out optimization processing on image data obtained by carrying out image interception on input image data to obtain optimized image data; (iv) and outputting the image data corresponding to the display screen loading area in the optimized image data to the target LED display screen, wherein the image data except the image data corresponding to the display screen loading area in the optimized image data is not output to the target LED display screen.
In one embodiment of the present invention, step (ii) comprises: when the image scaling state is not scaling, setting the image interception boundary extension value and the screen mapping window boundary extension value to be equal values; and when the image scaling state is scaling, setting the screen mapping window boundary extension value and the image truncation boundary extension value to be equal to an image scaling ratio in a ratio of the two.
In addition, the image stitching edge optimization method provided by the embodiment of the invention is suitable for a video splicer or a video processor; the image stitching edge optimization method comprises the following steps: (a) detecting an image splicing edge of a loading area of a display screen; (b) performing image capture range boundary extension in the direction of each image stitching edge so that image data captured from the input image data contains image data on the other side of the image stitching edge, and performing corresponding boundary extension on the screen mapping window so as to keep the image scaling ratio unchanged; (c) performing image optimization processing on image data intercepted from input image data to obtain optimized image data; (d) and outputting the image data corresponding to the loading area of the display screen in the optimized image data.
In an embodiment of the present invention, the image stitching edge optimization method further includes, before the step (a), the steps of: and responding to a splicing command generated by triggering splicing operation by a user to start the splicing function.
In one embodiment of the present invention, step (b) comprises: under the point-to-point output mode, in the position of the image splicing edge, the number of pixel points extending from the boundary of the image capturing range is equal to the number of pixel points extending from the boundary of the screen mapping window; and under a non-point-to-point output mode, in the direction of the image splicing edge, the ratio of the number of pixels extending from the boundary of the screen mapping window to the number of pixels extending from the boundary of the image capturing range is equal to the image scaling ratio.
Furthermore, the image stitching processing apparatus provided by the embodiment of the present invention includes a microcontroller, a video processing chip, and a sending card logic, where the microcontroller and the sending card logic are respectively electrically connected to the video processing chip. The video processing chip is used for: after splicing is started, detecting the image splicing edge of a loading area of the display screen; performing image capture range boundary extension in the direction of each image stitching edge so that image data captured from the input image data contains image data on the other side of the image stitching edge, and performing corresponding boundary extension on the screen mapping window so as to keep the image scaling ratio unchanged; and performing image optimization processing on the image data intercepted from the input image data to obtain optimized image data. The send card logic to: and cutting out image data corresponding to the loading area of the display screen from the optimized image data for outputting.
In one embodiment of the invention, the microcontroller is configured to generate a stitching command to the video processing chip to start stitching in response to a user triggering a stitching operation.
In an embodiment of the present invention, the video processing chip is specifically configured to: under the point-to-point output mode, in the direction of the image splicing edge, the number of pixel points extending from the boundary of the image capturing range is equal to the number of pixel points extending from the boundary of the screen mapping window; and under a non-point-to-point output mode, in the position of the image splicing edge, the ratio of the number of pixels extending from the boundary of the screen mapping window to the number of pixels extending from the boundary of the image capturing range is equal to the image scaling ratio.
In one embodiment of the invention, the image stitching processing means is a video processor configured with one of the sending card logic or a video stitcher configured with a plurality of the sending card logic.
In addition, an image stitching processing apparatus provided in another embodiment of the present invention includes a microcontroller, a video processing chip, and a sending card logic, where the microcontroller and the sending card logic are electrically connected to the video processing chip, respectively. The video processing chip is used for: after splicing is started, detecting the image splicing edge of a loading area of the display screen; for each image splicing edge, determining an image interception boundary extension value and a screen mapping window boundary extension value according to the size of an initially set display screen loading area and an image scaling state on the premise of keeping an image scaling ratio unchanged, and performing image interception boundary extension and screen mapping window boundary extension on the position of the image splicing edge according to the determined image interception boundary extension value and the determined screen mapping window boundary extension value, wherein the display screen loading area is a local display area of a target LED display screen; and after the image interception boundary extension and the screen mapping window boundary extension are finished, carrying out optimization processing on image data obtained by image interception of the input image data to obtain optimized image data. The send card logic to: and outputting the image data corresponding to the display screen loading area in the optimized image data without outputting the image data except the image data corresponding to the display screen loading area in the optimized image data.
As can be seen from the above, the embodiments of the present invention can achieve one or more of the following advantages: (1) due to the adoption of a boundary extension mode and the combination of an original image optimization algorithm of a video processing chip such as an STDP8028 series chip, the video processing chip can optimize image data outside a loading area of a display screen of the video processing chip, so that the color distortion condition of a spliced edge is solved, and the image quality of the spliced edge after processing is improved; (2) hardware cost is not added, and the method can be realized by adopting pure software design; and (3) the scaling ratio of the original image is not influenced, and the method is beneficial and harmless.
Other aspects and features of the present invention will become apparent from the following detailed description, which proceeds with reference to the accompanying drawings. It is to be understood, however, that the drawings are designed solely for purposes of illustration and not as a definition of the limits of the invention. It should be further understood that the drawings are not necessarily drawn to scale and that, unless otherwise indicated, they are merely intended to conceptually illustrate the structures and procedures described herein.
Drawings
The following detailed description of embodiments of the invention will be made with reference to the accompanying drawings.
Fig. 1 is a schematic diagram of a control system architecture of an LED display screen using a video splicer in the prior art.
FIG. 2 is a diagram of a prior art LED display control system architecture using multiple video processors.
Fig. 3A, 3B and 3C are schematic diagrams of a principle process of implementing the splice edge optimization according to the embodiment of the present invention.
Fig. 4 is a schematic diagram of a hardware structure of a video processor for implementing the mosaic edge optimization according to an embodiment of the present invention.
Fig. 5 is a schematic overall flow chart of implementing the splice edge optimization according to the embodiment of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
The following embodiments of the present invention provide a technical solution for optimizing image stitching edges, and the technical solution can solve the problem of local display distortion at the stitching edges of a video splicer or a video processor due to image color difference, thereby improving the stitching effect and the stitching quality.
Specifically, the technical scheme adopts a 'boundary extension' mode, expands the original image boundary by utilizing a screen mapping window and image interception, and can enable a video processing chip in a video processor or a video splicer, such as an STDP8028 series chip, to acquire image information on the other side of the splicing edge of the actual carrying area of the video processor or the video splicer, so that the image information containing the splicing edge is optimized by utilizing image optimization processing. For ease of understanding, the stitching function of the video processor is used here as an example. It is worth mentioning here that a screen-mapped window is typically a window area on the operating system runtime desktop that is mappable to a display on a display screen (e.g., an LED display screen).
The following is a schematic description of a splicing scheme of two video processors in left and right directions and in a point-to-point manner (i.e., without scaling), and the practical application is not limited to this, and the splicing scheme can be optimized in the up, down, left and right directions.
As shown in fig. 3A, for video processor 1 and video processor 2 before the stitching edge optimization, it is assumed that the screen mapping window values in the horizontal direction are both X (typically equal to the width of the display screen loading area of video processor 1 and video processor 2); because of the point-to-point method, the image capture value in the horizontal direction is X, which is also equal to the width of the display screen loading area of each of the video processor 1 and the video processor 2; or, X and X are a screen mapping window value and an image capture value, respectively, which are initially set (in the horizontal direction) for enabling the video processor 1 and the video processor 2 to carry respective screen areas, where the initially set screen mapping window value and image capture value are represented by, for example, a screen carrying area size and an image zoom state.
As shown in fig. 3B, to realize the image stitching edge optimization, the following changes are first made: the image interception value of the video processor 1 is increased from x to (x + y) to the right, and the image interception value of the video processor 2 is increased from x to (x + y) to the left; in short, the image capture size of the video processor 1 and the video processor 2 is increased to include the image information on the other side of the stitching edge of the loading area of the respective display screens.
As shown in fig. 3C, then, on the basis of the increase of the image truncation value to (X + Y), the screen mapping window value of the video processor 1 is increased from X to (X + Y), the screen mapping window value of the video processor 2 is increased from X to (X + Y), where Y is Y, and the purpose of increasing the screen mapping window value is to keep the image scaling ratio before and after the optimization unchanged, that is, (X + Y)/(X + Y) is X/X is Y/Y.
After the image capture value and the screen mapping window value are added, the boundary of the image to be processed of the video processor 1 and the video processor 2 has already changed to (X + Y), that is, the image boundary extension is performed, so that the video processing chip in the video processor 1 can obtain the image information on the right side of the original image boundary X, similarly, the video processing chip in the video processor 2 can obtain the image information on the left side of the original image boundary X, and further, the image optimization processing is performed by using an image optimization algorithm (for example, an image optimization algorithm carried by STDP8028 series chip hardware) in the video processing chip. After the image optimization processing is completed, when the video processor 1 and the video processor 2 actually output the image to the display screen (for example, output the image to the LED display screen through the sending card logic), the optimized image can be obtained by outputting according to the size of X (that is, the display screen loading area of each video processor), and the original image scaling ratio is not affected. It should be noted that the sizes of the display screen loading areas of the video processor 1 and the video processor 2 are not limited to the above-mentioned equal condition, and may be different from each other.
In order to more clearly understand the technical scheme, specific examples are given below for detailed description:
taking the example of horizontal direction X being 960 and X being 960 in a point-to-point manner, in a normal case, video processor 1 and video processor 2 both carry 960 pixels in the horizontal direction, for example, and the two video processors are spliced to complete the carrying of 1920 pixels in the horizontal direction. Taking the video processor 1 as an example, the following steps are performed:
firstly, changing the image interception value from 960 to 964 during splicing, and increasing the image interception of 4 pixel points; at this time, the screen mapping window value in the horizontal direction is 960, and the image capture value is 964;
secondly, opening the screen mapping window by 4 points, changing 960 into 964, wherein the screen mapping window value in the horizontal direction is 964, and the image interception value is 964; the reason why the scaling of the image before and after optimization is ensured to be unchanged is that the scaling of the image before and after optimization is ensured to be unchanged, and as for what to take the '4' pixel points, the maximum negative deviation (-16) point of the STDP8028 series chip is at present, 16 points are also taken for ensuring the symmetry and uniformity in the positive expansion, namely under the condition of point to point, the method is feasible as long as the image interception value and the screen mapping window value expanded in the horizontal direction are not more than 16 points; that is, the extended value here depends on the performance of the video processing chip;
and thirdly, after the video processing chip performs optimization processing on the image, outputting the optimized image to a programmable logic device of a sending card logic, such as an FPGA (field programmable gate array) rear upper screen, wherein although the final screen mapping window value in the horizontal direction is 964, because the sending card logic bands of the video processors 1 and 2 are 960 points in the horizontal direction, the final output display is only 960 points in the horizontal direction, and the image interception amount is only 960 (due to a point-to-point mode) naturally, so that the display content before and after optimization can be ensured to be unchanged. The card logic is here a component of the video processor that is electrically connected to the output of the video processing chip and typically includes a programmable logic device, a network port, and a network transport module electrically connected between the programmable logic device and the network port to implement the card function.
Fourthly, as can be seen from the above, the content of 960 size in the horizontal direction displayed by the front video processor is optimized to be the most original content, and the content of 960 size in the horizontal direction displayed by the optimized video processor is also output and optimized, but in reality, 964 content is taken over and subjected to image optimization processing and then cut into 960 for output and display, because a video processing chip such as an STDP8028 series chip has an image optimization algorithm in the normal non-optimized state, but can only manage image data in a display screen loading area of the video processing chip, and cannot manage image data in the display screen loading area of the video processing chip, and color distortion can be generated at the splicing edge in some cases. After the optimization processing, because each video processor has already carried out the image optimization processing on the image (namely the image data on the other side of the splicing edge) exceeding the loading area of the display screen, the image color at the splicing joint of the images carried by the video processors can not generate distortion.
It should be noted that, in the process of implementing the mosaic edge optimization processing in the present technical solution, if the video processor is not in a point-to-point output mode, the image capture value and the screen mapping window value (i.e., the image capture added value and the screen mapping window added value) of the boundary extension are different, and how much of each depends on the current image scaling ratio. For example, assume that the screen mapping window value X is 1000 points, and the image capture value X is 500 points, that is, it is an image in a 2-fold magnification state, and then a set of suitable Y (screen mapping window increment value or screen mapping window boundary extension value) and Y (image capture increment value or image capture boundary extension value) is found by using the image capture value as a reference and 16 points as a constraint condition. The specific calculation method may be: a) calculating the least common multiple of X and X, wherein the least common multiple is 1000 and is marked as m by example calculation; and b) dividing m by X to obtain an image interception boundary extension value (or called image interception increase value), and dividing m by X to obtain a screen mapping window boundary extension value (or called screen mapping window increase value); calculating the boundary extension value Y of the image capture by example to be 1000 divided by 1000 to obtain 1, and the boundary extension value Y of the screen mapping window is 1000 divided by 500 to be 2; namely, the boundary extension value Y of the final image is 1, and the boundary extension value Y of the screen mapping window is 2; y and Y are not more than 16, and the constraint condition is met, so that the method can be used. In addition, if the constraint condition is not satisfied in the actual application, the edge optimization is not performed. In addition, it is worth mentioning that, in practical application, the algorithm (least common multiple algorithm) can be used to select a group of minimum combinations of the screen mapping window boundary extension value and the image capturing boundary extension value which satisfy the image scaling ratio in the constraint condition, so that the operation speed can be increased, and the result can be obtained at the fastest speed.
Referring to fig. 4 and fig. 5, fig. 4 is a schematic diagram of a hardware structure of a video processor for implementing the stitching edge optimization according to the embodiment of the present invention, and fig. 5 is a schematic diagram of an overall flow for implementing the stitching edge optimization according to the embodiment of the present invention.
Step S501: starting splicing; specifically, the microcontroller 401, for example, the MCU, detects that the user triggers the splicing operation, and then sends the splicing command to the video processing chip 403, for example, the STDP8028 series chip, and the video processing chip 403 starts the splicing function.
Step S502: detecting a splicing edge; specifically, the video processing chip 403 may obtain the position of the splicing edge to be optimized according to the relationship between the position of the display screen loading area of the video processor and the total resolution of the LED display screen 407; for example, if the total resolution of the LED display 407 is 1920 × 1080, the size of the display screen loading area of the video processor is 960 × 540, and the starting position coordinate is (0, 0), i.e. at the upper left corner, the optimal stitching edges are the right side and the lower side.
Step S503: judging whether the image is zoomed; specifically, the judgment may be performed according to the comparison between the image capture value initially set by the video processing chip 403 and the screen mapping window value, where the correspondence between the image capture value and the screen mapping window value indicates a point-to-point manner (i.e., the image is not zoomed), otherwise, if the correspondence between the image capture value and the screen mapping window value is not consistent, the image is in a zoomed state.
Step S504: if the judgment result is that the image is not zoomed, the image is in a point-to-point mode; due to the point-to-point mode, the screen mapping window value Y and the image capture value Y which need to be extended at each splicing edge at the moment are equal, and the value range meets the constraint condition (for example, is less than 16); after the boundary extension is completed according to the obtained image capturing boundary extension value Y and the screen mapping window boundary extension value Y, the image optimization algorithm in the video processing chip 403 is used to perform image optimization processing on the captured image data as a whole to realize the splicing edge optimization.
Step S505: if the image is in a zoom state as a result of the determination, a set of image capture boundary extension value Y and screen mapping window boundary extension value Y satisfying the constraint condition and the image zoom ratio may be calculated for each of the stitching edges according to the least common multiple algorithm, and after the boundary extension is completed according to the calculated image capture boundary extension value Y and screen mapping window boundary extension value Y, image optimization processing is performed on captured image data by using an image optimization algorithm in the video processing chip 403 to achieve stitching edge optimization.
Step S506: after the image optimization is completed, the video processing chip 403 sends the optimized image data to the sending card logic 405.
Step S507: and the logic of the sending card outputs images to the LED display screen according to the size of the loading area of the display screen. Wherein, a processing unit, such as FPGA, in the transmitting card logic 405 outputs the optimized image data to the LED display screen 407 according to the size of the display screen loading area, thereby completing the whole process. It should be noted here that since the resolution of the optimized image data input from the video processing chip 403 to the sending card logic 405 (due to the boundary extension) is larger than the size of the display screen loading area of the sending card logic 405, the sending card logic 405 discards the image data (i.e. performs image cropping) in the process of outputting the image data to the LED display screen 407 instead of outputting the image data to the LED display screen 407, so as to ensure that the display content before and after optimization is not changed. In other words, the image data corresponding to the display screen loading area in the optimized image data is output to the LED display screen 407, and the image data other than the image data corresponding to the display screen loading area in the optimized image data is not output to the LED display screen 407.
In summary, the foregoing embodiments of the present invention can achieve one or more of the following advantages: (1) due to the adoption of a boundary extension mode and the combination of an original image optimization algorithm of a video processing chip such as an STDP8028 series chip, the video processing chip can optimize image data outside a loading area of a display screen of the video processing chip, so that the color distortion condition of a spliced edge is solved, and the image quality of the spliced edge after processing is improved; (2) hardware cost is not added, and the method can be realized by adopting pure software design; and (3) the scaling ratio of the original image is not influenced, and the method is beneficial and harmless. Finally, it should be noted that for ease of description, a video splicer, typically configured with a plurality of transport card logic and one or more video processing chips electrically connected thereto, and a video processor, typically configured with one transport card logic and one video processing chip, and a video processor system and the like may be referred to as an image stitching processing apparatus.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (7)
1. An LED display control method, characterized by comprising the steps of:
(i) after splicing is started, detecting the image splicing edge of a loading area of the display screen;
(ii) for each image splicing edge, determining an image interception boundary extension value and a screen mapping window boundary extension value according to the size of an initially set display screen loading area and an image scaling state on the premise of keeping an image scaling ratio unchanged, and performing image interception boundary extension and screen mapping window boundary extension on the position of the image splicing edge according to the determined image interception boundary extension value and the determined screen mapping window boundary extension value, wherein the display screen loading area is a local display area of a target LED display screen;
(iii) after the image interception boundary extension and the screen mapping window boundary extension are finished, carrying out optimization processing on image data obtained by carrying out image interception on input image data to obtain optimized image data; wherein the image data obtained by the image interception comprises image data on the other side of the image splicing edge;
(iv) outputting image data corresponding to the display screen loading area in the optimized image data to the target LED display screen, wherein the image data except the image data corresponding to the display screen loading area in the optimized image data is not output to the target LED display screen;
wherein step (ii) comprises:
when the image scaling state is not scaling, setting the image interception boundary extension value and the screen mapping window boundary extension value to be equal values; and
when the image scaling state is scaling, setting the screen mapping window boundary extension value and the image truncation boundary extension value to be equal to an image scaling ratio in a ratio of the two.
2. An image stitching edge optimization method is suitable for a video splicer or a video processor; the image splicing edge optimization method is characterized by comprising the following steps of:
(a) detecting an image splicing edge of a loading area of a display screen;
(b) performing image capture range boundary extension in the direction of each image stitching edge so that image data captured from the input image data contains image data on the other side of the image stitching edge, and performing corresponding boundary extension on the screen mapping window so as to keep the image scaling ratio unchanged;
(c) performing image optimization processing on image data intercepted from input image data to obtain optimized image data;
(d) outputting image data corresponding to the loading area of the display screen in the optimized image data;
wherein step (b) comprises:
under the point-to-point output mode, in the position of the image splicing edge, the number of pixel points extending from the boundary of the image capturing range is equal to the number of pixel points extending from the boundary of the screen mapping window; and
under a non-point-to-point output mode, in the direction of the image splicing edge, the ratio of the number of pixels extending from the boundary of the screen mapping window to the number of pixels extending from the boundary of the image intercepting range is equal to the image scaling ratio.
3. The image stitching edge optimization method of claim 2, further comprising, before step (a), the steps of:
and responding to a splicing command generated by triggering splicing operation by a user to start the splicing function.
4. An image splicing processing device comprises a microcontroller, a video processing chip and a sending card logic, wherein the microcontroller and the sending card logic are respectively and electrically connected with the video processing chip; it is characterized in that the preparation method is characterized in that,
the video processing chip is used for: after splicing is started, detecting the image splicing edge of a loading area of the display screen; performing image capture range boundary extension in the direction of each image stitching edge so that image data captured from the input image data contains image data on the other side of the image stitching edge, and performing corresponding boundary extension on the screen mapping window so as to keep the image scaling ratio unchanged; performing image optimization processing on image data intercepted from the input image data to obtain optimized image data;
the send card logic to: cutting out image data corresponding to the loading area of the display screen from the optimized image data for outputting;
wherein the video processing chip is specifically configured to:
under the point-to-point output mode, in the direction of the image splicing edge, the number of pixel points extending from the boundary of the image capturing range is equal to the number of pixel points extending from the boundary of the screen mapping window; and
and under a non-point-to-point output mode, in the position of the image splicing edge, the ratio of the number of pixels extending from the boundary of the screen mapping window to the number of pixels extending from the boundary of the image intercepting range is equal to the image scaling ratio.
5. The image stitching processing apparatus of claim 4, wherein the microcontroller is configured to generate a stitching command to the video processing chip to initiate stitching in response to a user triggering a stitching operation.
6. The image stitching processing apparatus of claim 4, wherein the image stitching processing apparatus is a video processor configured with one of the sending card logic or a video splicer configured with a plurality of the sending card logic.
7. An image splicing processing device comprises a microcontroller, a video processing chip and a sending card logic, wherein the microcontroller and the sending card logic are respectively and electrically connected with the video processing chip; it is characterized in that the preparation method is characterized in that,
the video processing chip is used for: after splicing is started, detecting the image splicing edge of a loading area of the display screen; for each image splicing edge, determining an image interception boundary extension value and a screen mapping window boundary extension value according to the size of an initially set display screen loading area and an image scaling state on the premise of keeping an image scaling ratio unchanged, and performing image interception boundary extension and screen mapping window boundary extension on the position of the image splicing edge according to the determined image interception boundary extension value and the determined screen mapping window boundary extension value, wherein the display screen loading area is a local display area of a target LED display screen; after the image interception boundary extension and the screen mapping window boundary extension are finished, carrying out optimization processing on image data obtained by image interception on the input image data to obtain optimized image data; wherein the image data obtained by the image interception comprises image data on the other side of the image splicing edge; wherein, the determining the image capturing boundary extension value and the screen mapping window boundary extension value according to the size of the display screen loading area and the image scaling state which are initially set on the premise of keeping the image scaling ratio unchanged comprises: when the image scaling state is not scaling, setting the image interception boundary extension value and the screen mapping window boundary extension value to be equal values; and when the image scaling state is scaling, setting the screen mapping window boundary extension value and the image interception boundary extension value to be equal to an image scaling ratio;
the send card logic to: and outputting the image data corresponding to the display screen loading area in the optimized image data without outputting the image data except the image data corresponding to the display screen loading area in the optimized image data.
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| CN111260654B (en) * | 2018-11-30 | 2024-03-19 | 西安诺瓦星云科技股份有限公司 | Video image processing method and video processor |
| CN111767014B (en) * | 2020-06-19 | 2023-04-07 | 深圳市灰度科技有限公司 | Multi-display screen cooperative display system and method |
| CN111784577B (en) * | 2020-06-24 | 2023-08-25 | 杭州海康威视数字技术股份有限公司 | Video stitching method and device, electronic equipment and readable storage medium |
| CN114237472B (en) * | 2022-02-24 | 2022-05-17 | 深圳市鱼儿科技有限公司 | Display method and device suitable for different LED display screens and LED display screen |
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