CN205539353U - A silicon chip passivating device for testing few sub - life -span of crystalline silica body - Google Patents
A silicon chip passivating device for testing few sub - life -span of crystalline silica body Download PDFInfo
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- CN205539353U CN205539353U CN201620250571.5U CN201620250571U CN205539353U CN 205539353 U CN205539353 U CN 205539353U CN 201620250571 U CN201620250571 U CN 201620250571U CN 205539353 U CN205539353 U CN 205539353U
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Abstract
The utility model discloses a silicon chip passivating device for testing few sub - life -span of crystalline silica body, including the plastic bag structure, the plastic bag structure is including being used for at its inside plastic bag that has a resistance to corrosion of placing the silicon chip, pack into or take out for being used for in the top of plastic bag the open end of silicon chip, the open end be provided with can with the open end is sealed seals the limit, the bottom of plastic bag is provided with the intercommunication the pipe is annotated to the taking out of inside of plastic bag, it is provided with the sealing plug to take out the bottom of annotating the pipe, this silicon chip passivating device can solve that chemical passivation method among the prior art produces seek the limit difficulty, easily harm the instrument, have pollution, inconvenient, the long -pending problem of out -of -control passivation liquid of test aftertreatment.
Description
Technical field
This utility model relates to field of photovoltaic technology, particularly relates to a kind of for testing crystalline silicon body few sub-longevity
The silicon chip passivating device of life.
Background technology
Minority carrier lifetime (abbreviation minority carrier life time) is an important parameter of semiconductor crystal silicon materials,
It has important impact to the photoelectric transformation efficiency of performance of semiconductor device, crystal silicon solar energy battery.
When carrier continuously generates, in solar cells, the life-span determines the stabilizing amount in electronics and hole,
These quantity determine the voltage that device produces, it is therefore desirable to the few son of the crystalline silicon body of the silicon materials used
Life-span should be the highest.
The method of existing test crystalline silicon body minority carrier life time mainly has chemical passivation method, its concrete side of test
Method is as follows: 1) by the silicon chip after PI layer processes at normal temperatures with the fluorination of deionized water dilution
Hydrogen solution rinse, remove surface natural oxidizing layer, 2) will rinsing after silicon chip put into transparent plastics
In Dai, 3) pour appropriate 30～50ml iodine tincture (or a kind of jade hydrogen a kind of jade solution, hydrogen fluoride solution) into plastics
In Dai, at this moment the passivating solution of plastic bag is smeared uniformly on silicon chip, and drives away the bubble being attached on silicon chip,
With plastic sealing machine by plastic bag sealing, 4) last, it is placed on WT-2000 (or WT-120) and surveys
Examination.
This method is possible not only to reach passivation effect uniform to silicon chip surface, and surface can be made multiple
Sum velocity is reduced to below 100cm/s, low cost, easily operates, and is particularly suited for solar energy production and grinds
Study carefully unit detection raw-material for silicon chip and analysis.
But, there is a lot of shortcoming in above-mentioned chemical passivation method, such as:
1) limit difficulty is sought: owing to adding again the liquid of test around silicon chip except transparent plastic bag, make
Becoming to find limit extremely difficult, even if seeking the phenomenon that Ye Youxun limit, limit is inaccurate, the sample even having all is sought not
To limit, the probe thus resulting in test cannot accurately be tested；
2) easily damage instrument, have pollution: owing to passivation liquid has slight corrosivity and pollution more
Property, cause in test process, plastic bag is easy to be corroded and breaks down, and then damages the spy in test instrunment
Head, Contamination measurement platform；Too increase air pollution simultaneously, the health of tester is caused damage；
3) test post processing inconvenience: after test completes, have a certain amount of liquid, and liquid in plastic bag
Body has mild toxicity, causes can not being directly placed between waste product, and tester is easy to by liquid when processing
Injury, especially when a large amount of test body minority carrier life time；
4) uncontrollable passivating solution volume: silicon chip passivation is all laboratory technician's operating experience with oneself every time
Add passivation liquid, cause the volume of the liquid of passivation between silicon chip and silicon chip all cannot realize concordance,
Thus affect test result.
Therefore, a kind of silicon chip passivating device that can preferably test crystalline silicon body minority carrier life time is needed badly.
Utility model content
It is blunt that the purpose of this utility model is to propose a kind of silicon chip for testing crystalline silicon body minority carrier life time
Gasifying device, it is possible to solve chemical passivation method of the prior art produce seek limit difficulty, easily damage instrument,
There are pollution, the problem of test post processing passivating solution volume inconvenient, uncontrollable.
For reaching this purpose, this utility model by the following technical solutions:
A kind of silicon chip passivating device for testing crystalline silicon body minority carrier life time, including plastic bag structure, institute
State plastic bag structure and include the plastic bag with anticorrosive property for placing silicon chip therein, described in mould
The top of pocket is the opening for loading or take out described silicon chip, described opening be provided with by
The sealing limit that described opening seals, the bottom of described plastic bag is provided with the inside connecting described plastic bag
Pumping pipe, the bottom of described pumping pipe is provided with sealing-plug.
Wherein, the inner side of described plastic bag is coated with the anti-corrosion protective film with anticorrosive property.
Wherein, the inner side of described plastic bag is coated with the anti-emi protection with anti-electromagnetic disturbance
Film.
Wherein, described anti-electromagnetic interference protecting film is arranged at inner side and the described anticorrosion guarantor of described plastic bag
Between cuticula.
Wherein, described anti-corrosion protective film is the protecting film formed after anticorrosive coating coats, described anti-electric
Magnetic disturbance protecting film is the protecting film formed after EMI shielding coating coats.
Wherein, when described silicon chip is rectangle, the length of described plastic bag is more than the length of described silicon chip,
The width of described plastic bag is more than the width of described silicon chip, and the length of described plastic bag is than described silicon chip
Length big 1～2cm, the width big 1～2cm of silicon chip described in the width ratio of described plastic bag.
Wherein, when described silicon chip is square, the length and width of described plastic bag is all higher than described silicon chip
The length of side, and the length of described plastic bag, width all big than the length of side of described silicon chip 1～2cm.
Wherein, when described silicon chip is circular, the length and width of described plastic bag is all higher than described silicon chip
Diameter, and the length of described plastic bag, width all big than the diameter of described silicon chip 1～2cm.
Wherein, also include for described plastic bag structure with the use of syringe, described syringe bag
Include syringe, the injection head being arranged at the bottom of described syringe, the injection that is sheathed in described syringe
Piston, described syringe is provided with graduation mark, and during use, described injection head inserts described pumping Guan Zhongyu
Described pumping pipe coordinates, with by passivating solution quantitatively injecting the inside of described plastic bag or from described plastic bag
Inside extract out.
The beneficial effects of the utility model are:
Silicon chip passivating device for testing crystalline silicon body minority carrier life time of the present utility model, it is using
Time, load silicon chip by opening, pumping pipe sealed by sealing-plug, then by passivating solution by quantitative from
Opening pours the inside of plastic bag into, is sealed by sealing limit by opening afterwards, so that passivating solution
With the inside that silicon chip is present in plastic bag, after being set level, slight beating makes passivating solution be present in silicon chip
Each orientation, thus realize the passivation of silicon chip, after passivation completes, the sealing sealing limit can be kept
Constant, sealing-plug is opened, by pumping pipe, the passivating solution of the inside of plastic bag is extruded, extrusion blunt
The amount changing liquid can carry out fixing quantity by holding the container of passivating solution, and after extrusion completes, again leads to
Cross sealing-plug and seal pumping pipe；After being operated by this plastic bag structure, the passivating solution of the inside of plastic bag is relatively
Few, thus it is advantageously in the edge of searching silicon chip, facilitates the probe of test equipment to test；And
And when operating, the final volume of the passivating solution in each plastic bag determines that, thus permissible every time
Preferably control passivating solution volume, the final environment concordance ensureing the silicon chip of test every time, it is ensured that test
The accuracy of result；Further, owing to plastic bag has a corrosion proof function, thus its internal passivation
Liquid will not corrosion and damage plastic bag, the most just passivating solution can be avoided to spill and damage instrument, pollute
Problem；Owing to passivating solution being extruded after passivation completes by plastic bag, thus the plastic bag after having tested
In there is not substantial amounts of passivating solution, also allow for subsequent treatment convenient, it is to avoid injury operator.
Accompanying drawing explanation
Fig. 1 is the main TV structure schematic diagram of the plastic bag device of silicon chip passivating device of the present utility model.
Fig. 2 is the main TV structure schematic diagram of the syringe of silicon chip passivating device of the present utility model.
In figure: 1-plastic bag；2-seals limit；3-pumping pipe；4-sealing-plug；5-syringe；6-injects and lives
Plug；7-injection head；8-graduation mark.
Detailed description of the invention
Further illustrate technical side of the present utility model below in conjunction with the accompanying drawings and by detailed description of the invention
Case.
As it is shown in figure 1, a kind of silicon chip passivating device for testing crystalline silicon body minority carrier life time, including moulding
Pocket structure, described plastic bag structure includes having moulding of anticorrosive property for place silicon chip therein
Pocket 1, the top of described plastic bag 1 is the opening for loading or take out described silicon chip, described in open
Mouth end is provided with the sealing limit 2 sealed by described opening, and the bottom of described plastic bag 1 is provided with
Connecting the pumping pipe 3 of the inside of described plastic bag 1, the bottom of described pumping pipe 3 is provided with sealing-plug 4.
In use, load silicon chip by opening, pumping pipe is sealed by sealing-plug, then will passivation
Opening, by the quantitative inside pouring plastic bag from opening into, is sealed by liquid afterwards by sealing limit, thus
Making passivating solution and silicon chip be present in the inside of plastic bag, after being set level, slight beating makes passivating solution
It is present in each orientation of silicon chip, thus realizes the passivation of silicon chip, after passivation completes, envelope can be kept
The sealing on mouth limit is constant, is opened by sealing-plug, is extruded by the passivating solution of the inside of plastic bag by pumping pipe,
The amount of the passivating solution of extrusion can carry out fixing quantity by holding the container of passivating solution, and completes in extrusion
After, seal pumping pipe again by sealing-plug；After being operated by this plastic bag structure, the inside of plastic bag
Passivating solution less, thus its advantageously in find silicon chip edge, facilitate the probe of test equipment to enter
Row test；And when operating, the final volume of the passivating solution in each plastic bag determines that every time,
Thus can preferably control passivating solution volume, the final environment concordance ensureing the silicon chip of test every time,
Ensure the accuracy of test result；Further, owing to plastic bag has corrosion proof function, thus in it
The passivating solution in portion will not corrosion and damage plastic bag, the most just passivating solution can be avoided to spill and damage instrument, make
Become the problem polluted；Owing to passivating solution being extruded after passivation completes by plastic bag, thus after having tested
Plastic bag in there is not substantial amounts of passivating solution, also allow for subsequent treatment convenient, it is to avoid injury operator
Member.
As a kind of preferred implementation in the present embodiment, as in figure 2 it is shown, this silicon chip passivating device is also
Including for described plastic bag structure with the use of syringe, described syringe include syringe 5,
The injection head 7 being arranged at the bottom of described syringe 5, the injection ram being sheathed in described syringe 5
6, described syringe 5 is provided with graduation mark 8, and during use, described injection head 7 inserts described pumping pipe 3
In coordinate with described pumping pipe 3, with by quantitatively passivating solution being injected the inside of described plastic bag 1 or from institute
The inside stating plastic bag 1 is extracted out.Herein, realized injection or the extraction of passivating solution by syringe, by
Syringe in syringe is provided with graduation mark, thus can directly inject by himself controlling every time or
The amount of the passivating solution extracted out, thus measure without the extra container holding passivating solution to blunt
Change the control of amount of liquid more directly in time.
Preferably, in the present embodiment, the inner side of described plastic bag 1 is coated with and has the anti-of anticorrosive property
Corrosion protection film.It is further preferred that the inner side of described plastic bag 1 is coated with and has anti-electromagnetic disturbance
Anti-electromagnetic interference protecting film.Wherein, described anti-electromagnetic interference protecting film is arranged at described plastic bag 1
Between inner side and described anti-corrosion protective film.Passivating solution can be avoided to corrode plastics by anti-corrosion protective film
Bag 1, the outer signals impact on test when can avoid testing by anti-electromagnetic interference protecting film.Silicon chip
When loading in plastic bag, silicon chip is positioned at the inner side of anti-electromagnetic interference protecting film.
Wherein, described anti-corrosion protective film is the protecting film formed after anticorrosive coating coats, described anti-electric
Magnetic disturbance protecting film is the protecting film formed after EMI shielding coating coats.
Preferably, in this utility model, anticorrosive coating can select epoxy anticorrosion coating, polychlorostyrene
One or more in ethylene, polyethylene, ABS plastic.
Preferably, electromagnetic shielding is primarily used to prevent the impact of electromagnetic field of high frequency, thus efficiently controls
Electromagnetic wave carries out radiation propagation from a certain region to another region, and its ultimate principle is: use low-resistance
Conductor material, and utilize the electromagnetic wave reflection on shielded conductor surface and the absorption at conductor and biography
The loss of defeated process and produce shielding action.In this application, electromagnetic screen coating, is a kind of at chemistry
Mixing conductive particle in solvent, and can be used for being sprayed at plastics, shield electromagnetic wave is functional
Coating.Described EMI shielding coating is by resin, diluent, additive and conductive filler materials
Deng composition, wherein, resin can be epoxy resin, polyurethane, phenolic aldehyde, polyimides, acrylic acid etc.
One or more in resin；Diluent and additive, in order to reduce the viscosity of resin, infiltrate implant,
Conventional by methyl cellosolve, pine oil, butyl glycol ether acetic acid etc., diluent does not the most use solvent
Type, to avoid gassing to reduce electric conductivity and bonding agent.Additive is used for improving the property of conducting resinl
Can, as dispersant can make conductive filler fully dispersed, reinforcing agent can increase adhesive force etc..Electroconductive stuffing
It is usually the non-metal powder such as white carbon black or graphite.
In this utility model, the size of plastic bag 1 needs the size more than silicon chip, and this size is usually
Refer to length and width size, be used for ensureing that silicon chip can be put into wherein.
As a kind of optimal way, when described silicon chip is rectangle, the length of described plastic bag 1 is more than institute
Stating the length of silicon chip, the width of described plastic bag 1 is more than the width of described silicon chip, and described plastic bag 1
Length bigger than the length of described silicon chip 1～2cm, the width of silicon chip described in the width ratio of described plastic bag 1
Spend big 1～2cm.
As another kind of optimal way, when described silicon chip is square, the length of described plastic bag 1 and width
Degree is all higher than the length of side of described silicon chip, and the length of described plastic bag 1, width are all than the limit of described silicon chip
Grow up 1～2cm.
As another optimal way, when described silicon chip is circular, the length and width of described plastic bag 1
It is all higher than the diameter of described silicon chip, and the length of described plastic bag 1, width are all than the diameter of described silicon chip
Big 1～2cm.
Silicon chip passivating device of the present utility model, for crystalline silicon body minority carrier lifetime, it is by anti-
The protecting film of corrosion and anti-electromagnetic interference realizes the anticorrosion to plastic bag and does anti-electromagnetism during test
Disturbing, it is ensured that test process is safe and reliable, test result accuracy is high；Putting of silicon chip is realized by opening
Enter and take out, also realizing pouring into of passivating solution simultaneously, and can be at opening by unnecessary air extrusion；Logical
Cross sealing limit and realize the sealing of plastic bag, thus when preventing test, passivating solution spills；It addition, also by taking out
Note pipe realizes extraction and the injection of the passivating solution after sealing limit seals, and the discharge of air, is formed double
Heavily management and control；Therefore, unnecessary passivating solution is all pumped, it is to avoid the probe of test equipment seeks limit difficulty,
Prevent again fluid leakage, it is to avoid damage the probe of test equipment, reduce and pollute；And process simpler soon
Victory, contaminative is preferably minimized, and can control the volume of passivating solution, it is achieved precisely test.
Know-why of the present utility model is described above in association with specific embodiment.These descriptions are intended merely to
Explain principle of the present utility model, and can not be construed to by any way this utility model protection domain
Limit.Based on explanation herein, those skilled in the art need not pay performing creative labour and can join
Expecting other detailed description of the invention of the present utility model, these modes fall within protection of the present utility model
Within the scope of.
Claims (9)
1. the silicon chip passivating device being used for testing crystalline silicon body minority carrier life time, it is characterized in that, including plastic bag structure, described plastic bag structure includes the plastic bag (1) with anticorrosive property for placing silicon chip therein, the top of described plastic bag (1) is the opening for loading or take out described silicon chip, described opening is provided with the sealing limit (2) sealed by described opening, the bottom of described plastic bag (1) is provided with the pumping pipe (3) of the inside connecting described plastic bag (1), the bottom of described pumping pipe (3) is provided with sealing-plug (4).
Silicon chip passivating device the most according to claim 1, it is characterised in that the inner side of described plastic bag (1) is coated with the anti-corrosion protective film with anticorrosive property.
Silicon chip passivating device the most according to claim 2, it is characterised in that the inner side of described plastic bag (1) is coated with the anti-electromagnetic interference protecting film with anti-electromagnetic disturbance.
Silicon chip passivating device the most according to claim 3, it is characterised in that described anti-electromagnetic interference protecting film is arranged between inner side and the described anti-corrosion protective film of described plastic bag (1).
Silicon chip passivating device the most according to claim 4, it is characterised in that described anti-corrosion protective film is the protecting film formed after anticorrosive coating coats, described anti-electromagnetic interference protecting film is the protecting film formed after EMI shielding coating coats.
Silicon chip passivating device the most according to claim 1, it is characterized in that, when described silicon chip is rectangle, the length of described plastic bag (1) is more than the length of described silicon chip, the width of described plastic bag (1) is more than the width of described silicon chip, and the length bigger than the length of described silicon chip 1～2cm of described plastic bag (1), the width big 1～2cm of silicon chip described in the width ratio of described plastic bag (1).
Silicon chip passivating device the most according to claim 1, it is characterized in that, when described silicon chip is square, the length and width of described plastic bag (1) is all higher than the length of side of described silicon chip, and the length of described plastic bag (1), width all big than the length of side of described silicon chip 1～2cm.
Silicon chip passivating device the most according to claim 1, it is characterized in that, when described silicon chip is circular, the length and width of described plastic bag (1) is all higher than the diameter of described silicon chip, and the length of described plastic bag (1), width all big than the diameter of described silicon chip 1～2cm.
Silicon chip passivating device the most according to claim 1, it is characterized in that, also include for described plastic bag structure with the use of syringe, described syringe includes syringe (5), it is arranged at the injection head (7) of the bottom of described syringe (5), the injection ram (6) being sheathed in described syringe (5), described syringe (5) is provided with graduation mark (8), during use, described injection head (7) inserts in described pumping pipe (3) and coordinates with described pumping pipe (3), with by quantitatively passivating solution being injected the inside of described plastic bag (1) or extracting out from the inside of described plastic bag (1).
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620250571.5U CN205539353U (en) | 2016-03-29 | 2016-03-29 | A silicon chip passivating device for testing few sub - life -span of crystalline silica body |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620250571.5U CN205539353U (en) | 2016-03-29 | 2016-03-29 | A silicon chip passivating device for testing few sub - life -span of crystalline silica body |
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| CN205539353U true CN205539353U (en) | 2016-08-31 |
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| CN201620250571.5U Expired - Fee Related CN205539353U (en) | 2016-03-29 | 2016-03-29 | A silicon chip passivating device for testing few sub - life -span of crystalline silica body |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109541422A (en) * | 2017-09-21 | 2019-03-29 | 上海新昇半导体科技有限公司 | A kind of test device of silicon chip minority carrier life |
| CN111092035A (en) * | 2019-12-25 | 2020-05-01 | 西安奕斯伟硅片技术有限公司 | System for be used for chemical passivation |
-
2016
- 2016-03-29 CN CN201620250571.5U patent/CN205539353U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109541422A (en) * | 2017-09-21 | 2019-03-29 | 上海新昇半导体科技有限公司 | A kind of test device of silicon chip minority carrier life |
| CN111092035A (en) * | 2019-12-25 | 2020-05-01 | 西安奕斯伟硅片技术有限公司 | System for be used for chemical passivation |
| CN111092035B (en) * | 2019-12-25 | 2022-05-24 | 西安奕斯伟材料科技有限公司 | System for be used for chemical passivation |
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