CN205405495U - Data record appearance based on SATA agreement - Google Patents

Abstract

The utility model discloses a data record appearance based on SATA agreement, this record appearance includes power module, VPX connector, FMC connector, FPGA chip, solid state hard drives, VPX connector and FMC connector all with the FPGA chip is connected, the FPGA chip joins externally two 256MB DDR2 SDRAM, the FPGA chip includes that data acquisition module, data reading and writing control module, SATA agree and realize module and rear end interface module, and SATA agreement module is passed through the VPX connector and is connected solid state hard drives. The utility model discloses based on FMC standard, sub - board ruler through providing the standard for FPGA on the support plate cun, connector and module interface realize IO interface and FPGA separation, simplify the IO interface module design, and the maximize improves a reuse rate who carries the card.

Description

A kind of data logger based on SATA protocol

Technical field

This utility model belongs to area information storage, especially a kind of small-sized data logger based on SATA protocol.

Background technology

Along with developing rapidly of integrated circuit, computer processing technology and software engineering, the data handling system platform of field of aerospace presents following development trend: communication bandwidth is more and more wider, transfer rate is more and more higher, the performance of processing platform is also had higher requirement by real-time process performance.Accordingly, it would be desirable to data processing platform (DPP) has higher bus transfer bandwidth, higher operational capability and more flexible data exchange capability.And existing data storage device storage speed is slow, being unfavorable for memory expanding, vibrations index and temperature index are extremely difficult to military project requirement.

Utility model content

This utility model pin is for prior art Problems existing, a kind of quick storage monitor based on SATA bus, both can meet the demand of two-forty, high band wide data process, the problem that the design of board design flexibility can be solved again, and different functions can have been realized in conjunction with various function daughter boards.

This utility model adopts the following technical scheme that:

A kind of data logger based on SATA protocol, it is characterized in that, this monitor described includes power module, VPX adapter, FMC adapter, fpga chip, solid state hard disc, described VPX adapter and FMC adapter are all connected with described fpga chip, the plug-in two panels 256MBDDR2SDRAM of described fpga chip；Described fpga chip includes data acquisition module, data read-write control module, SATA protocol realize module and back end interface module, and described SATA protocol module connects described solid state hard disc by VPX adapter.

According to above-mentioned data logger, it is characterised in that described fpga chip is XC5VLX110T-1FFG1136I chip.

The beneficial effects of the utility model: this utility model is based on FMC standard, by providing the daughter board size of standard, adapter and module interface for FPGA on support plate, realize I/O interface to separate with FPGA, simplify I/O Design of Interface Module, maximize the recycling rate of waterused improving load card.

Accompanying drawing explanation

Fig. 1 is structural representation of the present utility model.

Detailed description of the invention

Referring to Fig. 1, a kind of logging recorder system theory diagram based on SATA bus.Wherein, fpga chip selects XC5VLX110T-1FFG1136I, the highest can provide up to 11.2Gbps bandwidth up to 16 GTP serial transceivers；Plug-in two panels 256MBDDR2SDRAM, the 32bit bit wide of FPGA, the highest support 533MT/s；Can support 1 road gigabit Ethernet or 2 road PCIeX4 with VPX adapter (model 1410140-1) standard P1 interface, wherein PCIe interface can be revised and change sRIO into；Adapter with function daughter board adopts FMC structure, completes the data in each function daughter board and transmits, and supports the signal transmission rate of up to 10Gb/s, and between daughter board and support plate, potential total bandwidth reaches 40Gb/s；Board provides 5V and 3.3V to power by the P1 interface of VPX.Wherein 3.3V is main power supply.

Fpga chip by data acquisition module, data read-write control module, SATA protocol realizes module and back end interface module forms.Data acquisition module mainly completes from FMC interface according to sequential reading data or signal；Data read-write control module mainly completes the DDR2 buffer memory to front end data, and reads the buffer memory integration of data from solid-state disk；SATA protocol realizes the realization that module major function has been SATA protocol；The communication of back end interface module primary responsibility PCIe interface and Auro bus, the agreement that reception Auro bus customizes carries out depositor recovery and data buffer storage.

This utility model, based on FMC standard, by providing the daughter board size of standard, adapter and module interface for FPGA on support plate, it is achieved I/O interface separates with FPGA, simplifies I/O Design of Interface Module, maximizes the recycling rate of waterused improving load card.

Claims (2)

1. the data logger based on SATA protocol, it is characterized in that, this monitor described includes power module, VPX adapter, FMC adapter, fpga chip, solid state hard disc, described VPX adapter and FMC adapter are all connected with described fpga chip, the plug-in two panels 256MBDDR2SDRAM of described fpga chip；Described fpga chip includes data acquisition module, data read-write control module, SATA protocol realize module and back end interface module, and described SATA protocol module connects described solid state hard disc by VPX adapter.

2. data logger according to claim 1, it is characterised in that described fpga chip is XC5VLX110T-1FFG1136I chip.