CN205389178U - Stable form power inverter - Google Patents
Stable form power inverter Download PDFInfo
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- CN205389178U CN205389178U CN201620153856.7U CN201620153856U CN205389178U CN 205389178 U CN205389178 U CN 205389178U CN 201620153856 U CN201620153856 U CN 201620153856U CN 205389178 U CN205389178 U CN 205389178U
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Abstract
The utility model discloses a stable form power inverter, include the pulse width modulation circuit, switch circuit and connection the boost circuit on switch circuit of connection on pulse width modulation circuit that constitute by chip CW3525A and peripheral circuit, boost circuit's output and pulse width modulation circuit between be connected with sample feedback circuit, its stability is good.
Description
Technical field
This utility model relates to inverter field, in particular it relates to a kind of stable type power inverter.
Background technology
At present, conventional the having of inverter of the prior art: monofocal inverter, semi-bridge type inverter, push-pull dc-to-ac, full-bridge inverter etc..Wherein: the good reliability of monofocal inverter, but efficiency is low, is generally only used for low power electric appliance；The efficiency of push-pull type and bridge-type inverter is high, but poor reliability, there is the shortcomings such as easy straight-through, shutoff voltage stress height, magnetic bias.
Although the kind of existing power inverter is a lot, but, its ubiquity stability is not strong.
Utility model content
This utility model provides a kind of power inverter, its good stability to solve above-mentioned technical problem.
The technical scheme in the invention for solving the above technical problem is:
A kind of stable type power inverter, including the pulse-width modulation circuit being made up of chip CW3525A and peripheral circuit thereof, the on-off circuit being connected on pulse-width modulation circuit and the booster circuit that is connected on on-off circuit, between outfan and the pulse-width modulation circuit of described booster circuit, it is connected to sampling feedback circuit.
Of the present utility model chip CW3525A and peripheral circuit thereof is utilized to constitute pulse-width modulation circuit, it has been internally integrated reference power supply, agitator, error amplifier, pwm comparator, trigger, latch etc., there is the driving force of 200mA, can the performance of intensifier circuit.Sampling feedback circuit is connected between the outfan and pulse-width modulation circuit of booster circuit, the sampling value of sampling feedback circuit sends into the error amplifier within chip CW3525A and pwm comparator processes, and then be adjusted controlling to the pulsewidth of output, to reach the purpose of regulated output voltage.Adopt chip CW3525A and peripheral circuit thereof to constitute pulse-width modulation circuit, can further simplify circuit structure, reduce cost.
As preferably, 1st pin of the chip CW3525A of described pulse-width modulation circuit, the 2nd pin, the 6th pin are connected to earth resistance respectively, 5th pin, the 16th pin are connected to ground capacity respectively, it is connected to the 3rd resistance between 2nd pin of described chip CW3525A, the 16th pin, it is connected to the 5th resistance between 5th pin of described chip CW3525A, the 7th pin, the 12nd pin ground connection of described chip CW3525A, the 15th pin and the 13rd pin of described chip CW3525A are connected with power supply each through electric fuse.
Further, described on-off circuit includes the first field effect transistor and the second field effect transistor, the grid of the first described field effect transistor is connected with the 11st pin of chip CW3525A by the 6th resistance, the grid of the second described field effect transistor is connected with the 14th pin of chip CW3525A by the 7th resistance, the equal ground connection of drain electrode of the first described field effect transistor and the second field effect transistor, the source electrode of the first described field effect transistor and the source electrode of the second field effect transistor are both connected on booster circuit.
Further, the 6th described resistance and the resistance of the 7th resistance are equal.
Further, described booster circuit includes transformator, and the two ends on the former limit of described transformator are connected with the source electrode of the source electrode of the first field effect transistor and the second field effect transistor respectively.
Further, the former limit of described transformator is connected on electric fuse.
As preferably, described sampling feedback circuit includes bridge rectifier, and the input of described bridge rectifier is connected on the outfan of booster circuit, and outfan is connected on the 1st pin of chip CW3525A and is connected to the 4th electric capacity of ground connection on outfan.
To sum up, the beneficial effects of the utility model are:
1, this utility model is connecting sampling feedback circuit between the outfan and pulse-width modulation circuit of booster circuit, the sampling value of sampling feedback circuit sends into the error amplifier within chip CW3525A and pwm comparator processes, and then be adjusted controlling to the pulsewidth of output, its good stability.
2, this utility model adopts chip CW3525A and peripheral circuit thereof to constitute pulse-width modulation circuit, can further simplify circuit structure, reduce cost.
Accompanying drawing explanation
Fig. 1 is circuit theory diagrams of the present utility model.
Detailed description of the invention
Below in conjunction with embodiment and accompanying drawing, the technical scheme in this utility model embodiment is clearly and completely described, it is clear that described embodiment is only a part of embodiment of this utility model, rather than whole embodiments.Based on the embodiment in this utility model, the every other embodiment that those of ordinary skill in the art obtain under not making creative work premise, broadly fall into the scope of this utility model protection.
Embodiment 1:
A kind of stable type power inverter, including the pulse-width modulation circuit being made up of chip CW3525A and peripheral circuit thereof, the on-off circuit being connected on pulse-width modulation circuit and the booster circuit that is connected on on-off circuit, between outfan and the pulse-width modulation circuit of described booster circuit, it is connected to sampling feedback circuit.
Embodiment 2:
As it is shown in figure 1, the present embodiment is based on the basis of above-described embodiment, open one is preferred embodiment.1st pin of the chip CW3525A of pulse-width modulation circuit, the 2nd pin, the 6th pin are connected to earth resistance respectively, 5th pin, the 16th pin are connected to ground capacity respectively, it is connected to the 3rd resistance between 2nd pin of described chip CW3525A, the 16th pin, it is connected to the 5th resistance between 5th pin of described chip CW3525A, the 7th pin, the 12nd pin ground connection of described chip CW3525A, the 15th pin and the 13rd pin of described chip CW3525A are connected with power supply each through electric fuse.1st pin of chip CW3525A is to the 16th pin respectively IN-、IN+、SYNC、OUTOSC、Cr、Rr、DIS、SS、COMP、SD、OUTA、GND、VC、OUTB、Vi、VREF.It is the connection status that chip normally uses in this pin annexation not being mentioned to.
Described on-off circuit includes the first field effect transistor and the second field effect transistor, the grid of the first described field effect transistor is connected with the 11st pin of chip CW3525A by the 6th resistance, the grid of the second described field effect transistor is connected with the 14th pin of chip CW3525A by the 7th resistance, the equal ground connection of drain electrode of the first described field effect transistor and the second field effect transistor, the source electrode of the first described field effect transistor and the source electrode of the second field effect transistor are both connected on booster circuit.
The 6th described resistance and the resistance of the 7th resistance are equal.
Described booster circuit includes transformator, and the two ends on the former limit of described transformator are connected with the source electrode of the source electrode of the first field effect transistor and the second field effect transistor respectively.
The former limit of described transformator is connected on electric fuse.
Described sampling feedback circuit includes bridge rectifier, and the input of described bridge rectifier is connected on the outfan of booster circuit, and outfan is connected on the 1st pin of chip CW3525A and is connected to the 4th electric capacity of ground connection on outfan.
Its operation principle is: the operating frequency of chip CW3525A internal oscillator is determined by its 5th pin, the 6th pin external timing resistance and timing capacitor, after being distributed by internal trigger and gate circuit, export driving pulse in turn from its 11st pin and the 14th pin, control the first field effect transistor, the second field effect transistor turns in turn.When the first field effect transistor conducting, now the second field effect transistor cut-off, power supply passes through transformer primary side the first half (through the first field effect transistor to ground.When the second field effect transistor conducting, now the first field effect transistor cut-off, power supply is by transformer primary side the latter half the second field effect transistor to ground.By the synthesis of transformator and boosting, the secondary at transformator can obtain alternating voltage.Due to the transformer coil obstruction to radio-frequency component, secondary waveform has not been square wave, can be seen as quasi-sine-wave.Adopt the quasi sine waveform of upper frequency, be conducive to improving efficiency and getting rid of Industrial Frequency Transformer, also can make most of electrical equipment normal operation.Between 5th pin and the 7th pin of chip CW3525A, institute's connecting resistance is in order to regulate Dead Time.Dead Time is set and can ensure that the first field effect transistor, the second field effect transistor do not have situation about simultaneously turning on, improve the safety and reliability of circuit.Bridge rectifier and the 4th electric capacity composition sampling feedback circuit.The alternating voltage of outfan is after bridge rectifier, the 4th capacitor filtering, send into chip CW3525A internal error amplifier from the 1st pin and comparator processes, and then automatically control the output pulse width of the 11st pin and the 14th pin, reach the purpose of regulated output voltage.
As it has been described above, this utility model can be realized preferably.
Claims (7)
1. a stable type power inverter, it is characterized in that: include the pulse-width modulation circuit being made up of chip CW3525A and peripheral circuit thereof, the on-off circuit being connected on pulse-width modulation circuit and the booster circuit being connected on on-off circuit, between outfan and the pulse-width modulation circuit of described booster circuit, be connected to sampling feedback circuit.
2. a kind of stable type power inverter according to claim 1, it is characterized in that: the 1st pin of the chip CW3525A of described pulse-width modulation circuit, 2nd pin, 6th pin is connected to earth resistance respectively, 5th pin, 16th pin is connected to ground capacity respectively, 2nd pin of described chip CW3525A, it is connected to the 3rd resistance between 16th pin, 5th pin of described chip CW3525A, it is connected to the 5th resistance between 7th pin, the 12nd pin ground connection of described chip CW3525A, 15th pin and the 13rd pin of described chip CW3525A are connected with power supply each through electric fuse.
3. a kind of stable type power inverter according to claim 2, it is characterized in that: described on-off circuit includes the first field effect transistor and the second field effect transistor, the grid of the first described field effect transistor is connected with the 11st pin of chip CW3525A by the 6th resistance, the grid of the second described field effect transistor is connected with the 14th pin of chip CW3525A by the 7th resistance, the equal ground connection of drain electrode of the first described field effect transistor and the second field effect transistor, the source electrode of the first described field effect transistor and the source electrode of the second field effect transistor are both connected on booster circuit.
4. a kind of stable type power inverter according to claim 3, it is characterised in that: the 6th described resistance and the resistance of the 7th resistance are equal.
5. a kind of stable type power inverter according to claim 3, it is characterised in that: described booster circuit includes transformator, and the two ends on the former limit of described transformator are connected with the source electrode of the source electrode of the first field effect transistor and the second field effect transistor respectively.
6. a kind of stable type power inverter according to claim 5, it is characterised in that: the former limit of described transformator is connected on electric fuse.
7. a kind of stable type power inverter according to claim 2, it is characterized in that: described sampling feedback circuit includes bridge rectifier, the input of described bridge rectifier is connected on the outfan of booster circuit, and the outfan of bridge rectifier is connected on the 1st pin of chip CW3525A and is connected to the 4th electric capacity of ground connection on outfan.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620153856.7U CN205389178U (en) | 2016-03-01 | 2016-03-01 | Stable form power inverter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620153856.7U CN205389178U (en) | 2016-03-01 | 2016-03-01 | Stable form power inverter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205389178U true CN205389178U (en) | 2016-07-20 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620153856.7U Expired - Fee Related CN205389178U (en) | 2016-03-01 | 2016-03-01 | Stable form power inverter |
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| CN (1) | CN205389178U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106100400A (en) * | 2016-03-01 | 2016-11-09 | 四川行之智汇知识产权运营有限公司 | Stable type power inverter |
-
2016
- 2016-03-01 CN CN201620153856.7U patent/CN205389178U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106100400A (en) * | 2016-03-01 | 2016-11-09 | 四川行之智汇知识产权运营有限公司 | Stable type power inverter |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160720 Termination date: 20170301 |
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| CF01 | Termination of patent right due to non-payment of annual fee |