CN205353188U - Measurement device for power current - Google Patents

Abstract

The utility model relates to a measurement device for power current, the secondary current who adopts measuring current transformer converts to through resistance, and the processing such as filtering harmonic interference through the electronic circuit, its wave form amplitude is surveyed sinusoidal current wave form signal with the primary current proportional sinusoidal waveform signal promptly, the time data application module of time count initiating pulse and time intercepting and capturing pulse pair who generates during with the comparative voltage that arrives a plurality of settings when making this sinusoidal waveform signal zero passage through the circuit controls, acquire the sampling time t value when reacing the comparative voltage after this sinusoidal waveform signal zero passage, regard as with this sampling time t value again that the data of storage realize the measurement to being surveyed the electric current among the memory cell of the corresponding address of memory that memory address direct read is connected with time data application module. The utility model discloses can also be applied to the measurement to power frequency voltage.

Description

A kind of measurement apparatus of power current

Technical field

This utility model relates to the measurement apparatus of a kind of power current.

Background technology

The current magnitude measuring each cycle accurately and timely in maximum scope is the top priority of electric power measuring device.The existing instrument and meter being applied to electric measurement field is substantially A/D converter adopting successive approximation, ramp type, biproduct typing and voltage to frequency conversion type V/F etc., also can be divided into direct A/D converter and indirect A/D converter according to transfer principle transducer.These transducers constitute numerous measuring instrument instruments and meters as basic device, but range is narrow, conversion speed is slow shortcoming that these instrument and meters all exist, some instrument and meter is measured the conversion of gear and is also needed to shift gears manually, has been not suitable with the technology requirement in current generation.

Summary of the invention

The purpose of this utility model is in that to overcome the deficiencies in the prior art, it is provided that the measurement apparatus of a kind of power current.

The technical solution adopted in the utility model is:

A kind of measurement apparatus of power current, the secondary current that input signal is Verification of Measuring Current Transformer of this measurement apparatus through resistance convert to and filter, through electronic circuit, the sine wave-shaped signal that harmonic wave interference etc. processes, its waveforms amplitude is proportional to primary current, also referred to as tested sinusoidal current waveform signal, this measurement apparatus includes a preposition voltage follower；The time producing time counting starting impulse during one sine wave-shaped signal zero passage starts module, its output time starting impulse；One sine wave-shaped signal arrives comparing voltage value I_bjTime produce the time intercept and capture pulse time interception module, its output time intercept and capture pulse；And one by time starting impulse and time intercept and capture pulse controlled, be used for sampling time t value when arriving comparing voltage value after obtaining tested sinusoidal current waveform signal zero passage and this sampling time t value directly read the time data application module of the storage data in this memorizer appropriate address as the address of the memorizer being connected with this module；

Wherein, preposition voltage follower is made up of an amplifier, and the tested sinusoidal current waveform signal of its output is divided into six tunnels, is respectively outputted to the in-phase input end of first, fourth, five, six, seven, eight circuit units；

Time starts module and includes first, second and third circuit unit；

First circuit unit is to be made up of the voltage comparator circuit with open-loop gain an amplifier and be followed by Transistor-Transistor Logic level conversion interface circuit again the circuit unit of the square wave differential of high level and output, it has two outfans, the outfan of second NAND gate having Schmidt trigger in this circuit unit is first outfan, the time counting starting impulse of its output is the Square wave pulses of high level, itself and the 20th, 21 circuit unitsEnd is connected；The outfan of last diode in this circuit unit is second outfan, is connected with the in-phase input end of amplifier in third circuit unit after the square wave differential of its high level；

Second circuit unit is that a zero-point voltage adjusts circuit unit, and the outfan of the voltage follower in this circuit is as circuit unit outfan, and it is connected with the inverting input of amplifier in the first circuit unit；

Third circuit unit is the circuit that second outfan of the first circuit unit, the signal that namely exported by diode are adjusted, are exported, this circuit unit outfan is the outfan of a phase inverter, output signal is low level spike, and it exports four in first four S-R latch of the 24th circuit unitIn end and second four S-R latch oneEnd；

Time interception module includes fourth, fifth, six, seven, eight, nine, ten, 11,12,13,14,15,16 circuit units；

4th, five, six, seven, eight circuit units are circuit structures, the components and parts model used, duplicate five the voltage comparator circuit unit of parameter, it is made up of the voltage comparator circuit with open-loop gain respectively amplifier and is followed by Transistor-Transistor Logic level conversion interface circuit again the circuit unit of the square wave differential of high level and output, and each circuit unit of five circuit units has two outfans, first outfan of circuit unit is the outfan of first NAND gate having Schmidt trigger in the circuit unit of place respectively, the low level Square wave pulses of its output is divided into two-way, one road is used as to determine the signal of scaling position, it is connected respectively to corresponding five in two four S-R latch in the 24th circuit unitEnd, another road is connected to two inputs of next NAND gate；Second outfan of circuit unit is the outfan of last diode in the circuit unit of place respectively, and its output is time of high level to intercept and capture spike, and is all connected with the in-phase input end of amplifier in the 16th circuit unit；

Nine, the ten, 11,12, ten three-circuit unit are the output circuit of the comparison voltage being made up of divider resistance and voltage follower respectively, and they export first, second, third and fourth, five respectively and compare voltage to the inverting input of amplifier in fourth, fifth, six, seven, eight circuit units；

14th circuit unit is a voltage reference integrated circuit, and the voltage of its output is divided into two-way, is input in the three, the 16 circuit units the inverting input of amplifier respectively through voltage follower；

15th circuit unit is an accurate voltage reference integrated circuit, and its stable 10v reference voltage of output is to the nine, the ten, 11,12, ten three-circuit unit；

16th circuit unit is the circuit that the signal of second outfan output of fourth, fifth, six, seven, eight circuit units is adjusted, is exported, what this circuit unit exported is more acute, the narrow time intercepting and capturing pulse of high level, and the outfan of this circuit unit and the CP end of the 21st circuit unit are connected；

Time data application module, it arrives sampling time t value when comparing voltage after being intercepted and captured Pulse Width Control by time starting impulse and time, be used for obtaining tested sinusoidal current waveform signal zero passage and as storage address, the storage data directly read in the memorizer appropriate address being connected with this application module display, participate in the calculating of related electric amount, transmission etc. and apply using this sampling time t value, it includes the 17th, 18,19,20,21,22,23,24,25 circuit units；

17th circuit unit is the first maintenance impulse circuit, constituted with door by one, the 11st in 16 bits of one input and the output of the 20th circuit unit is connected, the 13rd in another input and 16 bits is connected, its outfan produces when time counting circuit starts the 5120us after counting and exports the first maintenance pulse, its output is divided into two-way, one tunnel is input to the CP end of the 22nd circuit unit, and another road is input to an input of the 18th circuit unit；

18th circuit unit is the second maintenance impulse circuit, constituted with door by one, the outfan of one input and the 17th circuit unit is connected, the 8th in 16 bits of another input and the output of the 20th circuit unit is connected, its outfan produces when time counting circuit starts the 5248us after counting and exports the second maintenance pulse, the CP end of two 4 bidirectional shift registers that the second maintenance pulse is input in the 24th circuit unit；

19th circuit unit is 10MHZ pulses generation and very frequency circuit, and the 1MHZ pulse of its output is input to the CP end of the 20th four enumerators of circuit unit；

20th circuit unit is the time pulse counting circuit that four tetrad coincidence counters are in turn connected into, its four enumeratorsFirst outfan holding the first circuit unit starting module with the time is connected, 16 data input pin one_to_one corresponding of its four enumerators totally 16 data output ends and the 21st circuit unit are connected, its output by zero s, 16 bits of each incremental 1us；

21st circuit unit be four being incorporated to-and go out the time data buffering circuit that 4 bidirectional shift registers that mode works are in turn connected into, four depositorsFirst outfan holding the first circuit unit starting module with the time is connected, the CP end of four depositors is connected with the outfan of the 16th circuit unit of time interception module, and 16 data input pin one_to_one corresponding of four depositors totally 16 data output ends and the 22nd circuit units are connected；

22nd circuit unit be four being incorporated to-and go out the time data holding circuit that 4 bidirectional shift registers that mode works are in turn connected into, four depositorsHolding and connect+5V power supply by resistance, the CP end of four depositors and the outfan of the 17th circuit unit are connected, and first 13 in 16 data output ends of four depositors are sequentially connected with 13 articles of address line end foot one_to_one corresponding of the 20th three-circuit unit；

20th three-circuit unit is arranged to two electrically erasable programmable ROM EEPROM in parallel of read-only working method, the address wire of two memorizeies is in parallel and is connected with 13 data output end sequentially one_to_one corresponding of the 22nd circuit unit, has been stored in H I in conversion table in Memory Storage Unit_mValue；

24th circuit unit is arithmetic point automatic switching circuit unit, including (1) time data decision circuitry, its 22nd circuit unit, i.e. time data holding circuit export and the time data that keeps more than or equal to 319us time output low level；(2) scaling position determines circuit；(3) 8 line-3 line priority encoding output circuits；(4) 3 line-8 line decoding output circuits；(5) arithmetic point keeps and output driving circuit；

The concrete wiring of the 24th circuit unit is: (1) time data decision circuitry, its the 22nd circuit unit, i.e. time data holding circuit export and the time data that keeps more than or equal to 319us time output low level, its circuit is by first 42 input or door integrated circuit U₅₂, first 42 input and door integrated circuit U₆₇, second 42 input and door integrated circuit U₆₈, second 42 input or door integrated circuit U₆₉With a phase inverter U₇₀Constitute, first depositor U of the 22nd circuit unit₅₃15,14,13,12 feet, namely corresponding to the address end foot A of memorizer₀、A₁、A₂、A₃Successively with first 42 input and door integrated circuit U₆₇1,2,4,5 feet be connected, second depositor U₅₄15,14,13,12 feet, namely corresponding to the address end foot A of memorizer₄、A₅、A₆、A₇Successively with first 42 input and door integrated circuit U₆₇12,13 feet and first 42 input or door integrated circuit U₅₂1,2 feet be connected, the 3rd depositor U₅₅15,14,13,12 feet, namely corresponding to the address end foot A of memorizer₈、A₉、A₁₀、A₁₁Successively with second 42 input and door integrated circuit U₆₈1 foot, first 42 input or door integrated circuit U₅₂4,5,12 feet be connected, the 4th depositor U₅₆15 feet, namely corresponding to the address end foot A of memorizer₁₂And U₅₆14 feet successively with first 42 input or door integrated circuit U₅₂13 feet, second 42 input or door integrated circuit U₆₉10 feet be connected, first 42 input or door integrated circuit U₅₂3 feet and second 42 input or door integrated circuit U₆₉1 foot be connected, first 42 input or door integrated circuit U₅₂6 feet and 9 feet be connected, 10 feet and 11 feet are connected, first 42 input or door integrated circuit U₅₂8 feet and second 42 input or door integrated circuit U₆₉5 feet be connected, first 42 input with door integrated circuit U₆₇3 feet and 10 feet be connected, 6 feet and 9 feet are connected, first 42 input with door integrated circuit U₆₇8,11 feet successively with second 42 input with door integrated circuit U₆₈5,4 feet be connected, second 42 input with door integrated circuit U₆₈2,3,6 feet successively with second 42 input or door integrated circuit U₆₉3,4,2 feet be connected, second 42 input or door integrated circuit U₆₉6 feet and 9 feet be connected, second 42 input or door integrated circuit U₆₉8 feet and phase inverter U₇₀Input be connected, phase inverter U₇₀Outfan as time data decision circuitry outfan respectively with first in scaling position decision circuitry and door U₃₇, second and door U₃₈, the 3rd with door U₃₉With the 4th and door U₉₀An input be connected, phase inverter U₇₀Outfan the data output end of time data holding circuit unit export and the time data that keeps more than or equal to 319us time output low level, or in other words, the phase inverter U when time data is less than 319us₇₀Outfan output high level；Constitute this time data decision circuitry two input with door and two input or door can with three input, four input with door and three input, four input or door replace flexibly；

(2) scaling position determines that circuit is by the first phase inverter U₃₀, the second phase inverter U₃₁, the 3rd phase inverter U₃₂, the 4th phase inverter U₃₃, the 5th phase inverter U₉₁, first or door U₃₄, second or door U₃₅, the 3rd or door U₃₆, the 4th or door U₉₂, first and door U₃₇, second and door U₃₈, the 3rd with door U₃₉, the 4th with door U₉₀With first four S-R latch U₄₀With second four S-R latch U₉₃Constituting, the concrete connection of its circuit is, U₂₂Outfan and U₄₀2,3 feet be connected, U₂₀Outfan and U₄₀6 feet be connected, U₁₈Outfan and U₄₀15 feet be connected, U₁₆Outfan and U₄₀11,12 feet be connected, U₁₀₂Outfan and U₉₃2,3 feet be connected, phase inverter U₂₇Outfan and U₄₀1,5,10,14 foot and U₉₃1 foot be connected, U₇₀Outfan respectively with first with door U₃₇, second and door U₃₈, the 3rd with door U₃₉With the 4th and door U₉₀An input be connected, U₄₀4 feet and U₃₀Input and U₃₇Another input be connected, U₃₀Outfan and U₇₁11 feet be connected, U₃₇Outfan and U₃₄An input be connected, U₄₀7 feet and U₃₄Another input and U₃₈Another input be connected, U₃₄Outfan and U₃₁Input be connected, U₃₁Outfan and U₇₁12 feet be connected, U₃₈Outfan and U₃₅An input be connected, U₄₀13 feet and U₃₅Another input and U₃₉Another input be connected, U₃₅Outfan and U₃₂Input be connected, U₃₂Outfan and U₇₁13 feet be connected, U₃₉Outfan and U₃₆An input be connected, U₄₀9 feet and U₃₆Another input and U₉₀Another input be connected, U₃₆Outfan and U₃₃Input be connected, U₃₃Outfan and U₇₁1 foot be connected, U₉₀Outfan and U₉₂An input be connected, U₉₃4 feet and U₉₂Another input be connected, U₉₂Outfan and U₉₁Input be connected, U₉₁Outfan and U₇₁2 feet be connected；

(3) 8 line-3 line priority encoding output circuits are by 74LS148 priority encoder U₇₁, phase inverter U₇₂、U₇₃And U₇₄Constituting, its connection is, U₇₁11,12,13,1,2 feet successively with U₃₀、U₃₁、U₃₂、U₃₃、U₉₁Outfan be connected, 5,10 feet connect digitally, and 6,7,9 feet are sequentially connected with U₇₂、U₇₃And U₇₄Input, U₇₂、U₇₃And U₇₄Outfan be sequentially connected with U₇₅3,2,1 foot；

(4) 3 line-8 line decoding output circuits are by 74LS138 decoder U₇₅Constituting, its connection is, 5,4 feet connect digitally, and 6 feet pass through resistance R₅₇Connecting+5V power supply, 14,13,12,11 feet connect U respectively₇₆3,4,5,6 feet, its 10 foot connect U₉₅3 feet；

(5) arithmetic point maintenance and output driving circuit are by two 4 bidirectional shift register 74LS194, i.e. U₇₆、U₉₅And 74LS07 buffering/driving gate circuit U₇₇、U₇₈、U₇₉、U₈₀And U₉₄Constituting, its connection is, U₇₆、U₉₅1,9,10 feet by resistance R₅₇Connect+5V power supply, U₇₆、U₉₅11 feet and U₅₁6 feet be connected, U₇₆15,14,13,12 feet respectively corresponding to buffering/driving gate circuit U₇₉、U₈₀、U₇₈、U₇₇Input be connected, U₇₉、U₈₀、U₇₈、U₇₇Outfan respectively through resistance R₆₅、R₄₇、R₄₈、R₄₉Represent successively, ten, hundred, arithmetic point display position dp in the LED seven-segment display of kilobit be connected, U₉₅15 feet and buffering/driving gate circuit U₉₄Input be connected, U₉₄Outfan by resistance R₅₀D with display myriabit arithmetic point₁₆It is connected, D₁₆It it is LED；U₅₁6 feet time counting circuit start counting after the 5248th us time can export a pulse, the rising edge of this pulse can through U₇₁、U₇₅The unique arithmetic point signal obtained after process sends display.

25th circuit unit is digital-scroll technique circuit, and for the value of the tested electric current of instant playback, it includes seven sections of decoding/driver 74LS47 of four BCD-, current-limiting resistance and four LED seven-segment numeric indicators and a LED light emitting diode；The data port line I/O of its memorizer in parallel with two address wires of the 20th three-circuit unit is attached.

Described 25th circuit unit adopts LED seven-segment numeric indicator or liquid crystal display.Below in an example, display U₆₃、U₆₄、U₆₅、U₆₆Being adopt LED seven-segment numeric indicator, the arithmetic point display position dp in display is used for representing position, ten, hundred, the arithmetic point of kilobit, i.e. U successively₆₃In dp represent position arithmetic point, U₆₄In dp represent ten arithmetic point, U₆₅In dp represent hundred arithmetic point, U₆₆In dp represent kilobit arithmetic point, light emitting diode D₁₆It is used for representing myriabit arithmetic point；Dp and D in four LED seven-segment numeric indicators and display₁₆The digital-scroll technique circuit collectively constituted can be used to the large-scale tested current value of instant playback.

This measurement apparatus relates to the measuring method of a kind of power current, it is applied to described measurement apparatus, and the secondary current that input signal is Verification of Measuring Current Transformer of this measurement apparatus through resistance convert to and filter, through electronic circuit, the sine wave-shaped signal that harmonic wave interference etc. processes, its waveforms amplitude is proportional to primary current, also referred to as tested sinusoidal current waveform signal, described measuring method includes a current measurement formula, obtains data and the application process to these data by the calculating of this formula, and it comprises the following steps:

(1) it is derived by a measure equation by the mathematic(al) representation of sinusoidal current:

In formula, I_mIt is tested sinusoidal current waveform signal amplitude, I_bjBeing comparing voltage value, t arrives after tested sinusoidal current waveform signal zero passage to compare voltage I_bjTime time value, its unit is us, f is the rated frequency of power system；According to this formula, only it is to be understood that power system frequency f, comparing voltage value I_bjAnd voltage I is compared in arrival after obtaining tested sinusoidal current waveform signal zero passage_bjTime time value, namely obtain sampling time t value time, tested electric current I can be tried to achieve_mValue；

(2) the sinusoidal current waveform signal of rated frequency arrives the time needed for its amplitude in a half-wave by zero crossing is Hus,Wherein H takes positive integer, and f is the rated frequency of power system, and sets I_bj=1mv, time t value by 1us, by being incremented by 1us every time, until till Hus, the t substituted into one by one in measure equation calculates and obtains H I respectively_mValue, the I obtained_mValue Data becomes form, i.e. subordinate list according to the ascending sequential organization of time t value, is called " time t value and sinusoidal wave form amplitude I_mValue conversion table ", it is called for short " conversion table "；

(3) till the time t value represented with 16 bits being played Hus from 1us, successively as the address of memorizer and correspondingly H I in conversion table_mValue adopt four binary-decimal binary-coded decimals be stored in the memory element of memorizer, memorizer adopts electrically erasable programmable ROM EEPROM, storage address capacity should be greater than 5K, each memory element of one memorizer is a byte, 2 four binary coded decimal binary-coded decimals namely 2 decimal numbers can be deposited, the memory element of two bytes deposits 4 decimal numbers, namely with two 8K × 8 memorizeies, in order, the front two in decimal scale 4 figure place deposited by first memorizer, latter two in decimal scale 4 figure place deposited by second memorizer.

This utility model adopts above technical scheme, the secondary current utilizing Verification of Measuring Current Transformer converts to through resistance, and process through the harmonic wave interference etc. of filtering of electronic circuit, the sine wave-shaped signal that its waveforms amplitude is proportional to primary current, also referred to as tested sinusoidal current waveform signal, when making tested sinusoidal current waveform signal zero passage by circuit and arrive the time counting starting impulse produced when comparing voltage and the time intercepts and captures pulse and one time data application module is controlled, obtain this sinusoidal current waveform signal after zero crossing, sampling time t value when some that this sinusoidal current waveform signal amplitude can arrive in Hus compares voltage the data in directly read the appropriate address memory element of the memorizer connected in time data application module using this sampling time t value as storage address are to obtain the measured value of tested each cycle of electric current, can realize measuring the automatic conversion with arithmetic point continuously, signal from 1mv to 10000mv and in range above all can be measured, it it is a novel form, principle is simple, measure quickly, range is broad, the novel electric power measurement apparatus that degree of accuracy is high, different demand can be flexibly applied to, different occasions, the digital quantity signal of its device output can show as value, may participate in power calculation or electric energy metrical, other equipment needing to apply this digitized value can be sent to, it is alternatively arranged as the electric current back-up protection of a kind of simplicity, this method can also be applied to the measurement to power-frequency voltage simultaneously.This utility model has obvious technical advantage and significant social economic effect.

Accompanying drawing explanation

Below in conjunction with the drawings and specific embodiments, this utility model is described in further details；

Fig. 1 this utility model time t and sine-shaped amplitude I_mRelation schematic diagram；

The circuit block diagram of the measurement apparatus of a kind of power current of Fig. 2 this utility model；

One of circuit connection schematic diagram of measurement apparatus of a kind of power current of Fig. 3 this utility model；

The two of the circuit connection schematic diagram of the measurement apparatus of a kind of power current of Fig. 4 this utility model；

The three of the circuit connection schematic diagram of the measurement apparatus of a kind of power current of Fig. 5 this utility model；

The four of the circuit connection schematic diagram of the measurement apparatus of a kind of power current of Fig. 6 this utility model；

The five of the circuit connection schematic diagram of the measurement apparatus of a kind of power current of Fig. 7 this utility model；

The six of the circuit connection schematic diagram of the measurement apparatus of a kind of power current of Fig. 8 this utility model；

The seven of the circuit connection schematic diagram of the measurement apparatus of a kind of power current of Fig. 9 this utility model.

Detailed description of the invention

As shown in one of Fig. 1 to 9, measurement apparatus of the present utility model applies a kind of power current measuring method, it is applied to measurement apparatus, and the secondary current that input signal is Verification of Measuring Current Transformer of this measurement apparatus converts to through resistance, and process through the harmonic wave interference etc. of filtering of electronic circuit, the sine wave-shaped signal that its waveforms amplitude is proportional to primary current, also referred to as tested sinusoidal current waveform signal, described current measuring method includes a current measurement formula, calculated by this formula and obtain data and these data organizations are become conversion table, the method being stored in memorizer.The current measuring device of its application the method includes a preposition voltage follower；The time producing time counting starting impulse during one sinusoidal current waveform zero passage starts module；One sinusoidal current waveform arrives the time interception module producing time intercepting and capturing pulse when comparing voltage；Intercepted and captured pulse controlled time data application module by time starting impulse and time, and this time data application module is connected to the memorizer being stored in conversion table data for one.In order to sharpen understanding, it is further described in detail below in conjunction with the example that power system frequency is 50HZ.

The measuring method of a kind of power current includes a current measurement formula, is obtained data by the calculating of this formula and these data organizations become conversion table, is stored in the method for memorizer；Its step:

(1) mathematic(al) representation according to sinusoidal current, when the initial value of sinusoidal current waveform be zero its initial phase is zero in other words time, its mathematic(al) representation is: i=I_mSin ω t, in formula, i represents the instantaneous value of sinusoidal current；I_mRepresent that in sinusoidal current instantaneous value, maximum value is called amplitude；ω=2 π f, power system frequency in the present embodiment is 50HZ per second, and 2 π are represented with 360 °；Time per second being changed into and represents with microsecond, t arrives the time of this current instantaneous value i also represent the sinusoidal current waveform zero passage of 50HZ with microsecond after；Further, I_mIt is expressed as the amplitude of a tested sinusoidal current, i is expressed as instantaneous value an instantaneous value set or perhaps a fiducial value I in other words conj.or perhaps of tested sinusoidal current_bj, t arrives after representing tested sinusoidal current waveform signal zero passage and compares voltage I_bjTime time value, then, above-mentioned mathematic(al) representation develops into the power current measure equation of a 50HZ:

According to this current measurement formula, if known I_bjValue and arrive after obtaining tested sinusoidal current waveform signal zero passage and compare voltage I_bjTime time t value, sampling time t value, it is possible to learn tested sinusoidal current waveform amplitude I_m, thus completing the measurement to a tested electric current.As it is shown in figure 1, in figure, along with tested sinusoidal current waveform signal with compare voltage I_bjThe change of the intersection point of generation, i.e. sampling time t, sine wave-shaped signal amplitude is also with corresponding change.

(2) rated frequency f is the time of sinusoidal current waveform one the cycle of 50HZ is 20ms, and the time needed for its amplitude that arrives by zero crossing in a half-wave is Hus, is the time of 1/4 T, i.e. 5000us.In actual current measurement application, current measurement, metering are measured once just enough and can meet metering requirements when the degree of accuracy related to is more than 2/1000ths in each cycle, so the specification of variables of positive comparing voltage value and time t is only set in this utility model device at sinusoidal current waveform signal by when bearing positive zero passage in scope to 5000us, and each I in form_mValue takes four decimal numbers just can meet instructions for use.Set I_bj=1mv, using time t as a variable, and by 1us, by being incremented by 1us every time, until till 5000us, calculating according to order ascending for the time t t substituted into one by one in current measurement formula respectively and obtain 5000 I_mValue, I_mValue be the decimal number of more than 7；According to the ascending order of time t value 5000 I_mValue be compiled into form (with reference to subordinate list), this form is called " time t value and sinusoidal wave form amplitude I_mValue conversion table ", it is called for short " conversion table ".Each time t value in form is represented using 16 bits, according to the ascending order of time t value successively as the address of memorizer I corresponding with time t in form_mFront 4 decimal numbers of numerical value adopt four binary coded decimal binary-coded decimals to represent that a decimal numeral form is stored in the memory element of memorizer, all need not consider the position of arithmetic point when being stored in 4 metric numerical value；One byte storage unit can deposit two four binary coded decimal binary-coded decimals namely 2 decimal numbers, only needs the memory element of two bytes can be stored in 4 decimal numbers, therefore uses the memorizer of two 8K × 8.Wherein, (1st) individual memorizer U₅₇One storage address memory cell put 4 decimal number I_mThe numeral of the front two of numerical value, the front nibble of memory element deposits the binary-coded decimal of the first bit digital in these 4 decimal number front twos and the I/O of memorizer₀、I/O₁、I/O₂、I/O₃It is sequentially connected with BCD-seven-segment decoder/driver U₅₉7,1,2,6 feet, the rear nibble of memory element deposits the binary-coded decimal of the second-order digit in these 4 decimal number front twos and the I/O of memorizer₄、I/O₅、I/O₆、I/O₇It is sequentially connected with BCD-seven-segment decoder/driver U₆₀7,1,2,6 feet；(2nd) individual memorizer U₅₈One storage address memory cell put 4 decimal number I_mThe numeral of latter two of numerical value, the front nibble of memory element deposits the binary-coded decimal of the first bit digital after these 4 decimal numbers in two and the I/O of memorizer₀、I/O₁、I/O₂、I/O₃It is sequentially connected with BCD-seven-segment decoder/driver U₆₁7,1,2,6 feet, the rear nibble of memory element deposits the binary-coded decimal of the second-order digit after these 4 decimal numbers in two and the I/O of memorizer₄、I/O₅、I/O₆、I/O₇It is sequentially connected with BCD-seven-segment decoder/driver U₆₂7,1,2,6 feet；

From Fig. 1 and subordinate list it can be seen that when time t, value was more than 318us, the I of each adjacent 7 and more than 7_mValue between value all differs less, its resolution and all gradually raises, when time t, value was less than 318us, and the I of each adjacent 7 and more than 7_mValue between value all differs more, its resolution and all gradually reduces, and its waveforms amplitude is approximately equal to 10.0264 times of comparing voltage value when sampling time t, value was 318us, and therefore 318us is a significant separation；The degree of accuracy of measurement will be affected when sampling time t is less than 318us, make, within the scope of the measurement that this form can be used only in 1～10 times of comparing voltage value 1mv, to exceed this scope then error and incrementally increase；When being 318us according to sampling time t, its waveforms amplitude is approximately equal to this feature of comparing voltage value 10 times, compares more than voltage 1mv first and arranges the second of a 10mv again and compare voltage, as tested sinusoidal current waveform signal amplitude I_mDuring more than more than 10mv, its sine wave-shaped signal and second compares the intersection point of voltage 10mv and is namely in the position that the vicinity of its amplitude, i.e. time t value are significantly greater than 318us and are slightly less than 5000us significantly, so that the I obtained_mValue still can keep high-resolution and pinpoint accuracy.Assume that first compares voltage I_bj1For 1mv, corresponding tested sinusoidal current waveform signal amplitude I_m1Represent；Second compares voltage I_bj2For 10mv, corresponding tested sinusoidal current waveform signal amplitude I_m2Represent；Then:

When the t in above formula (1), (2) is numerical value at the same time, by formula (2) divided by formula (1), obtain:

I_m2=10 × I_m1——(3)

From (1), (2), (3) formula is it can be seen that compare voltage I when second_bj2It is first compare voltage I_bj110 times and when identical time t, amplitude I_m2Equal to amplitude I_m110 times, i.e. amplitude I_m1With amplitude I_m2Significant digits identical, as long as amplitude I_m1Arithmetic point move right one be exactly amplitude I_m2Value.Same reason, it is possible to arrange again and the 3rd compare voltage 100mv, the 4th compare voltage 1v and the five and compare voltage 10v, when the amplitude of tested sinusoidal current waveform signal is more than 100mv, 1v, 10v, the amplitude of its corresponding sine wave-shaped signal and amplitude I_m1Also being the relation of 100,1000,10000 times, its significant digits are identical, amplitude I_m1Arithmetic point according to its corresponding multiple proportion move right successively two, three, four just passable.This shows, with I_bj1By time t value as computed " time t value and the sinusoidal wave form amplitude I out of variable during=1mv_mValue conversion table " measurement application when being also fully applicable for tested sinusoidal current waveform amplitude more than 10mv, 100mv, 1v, 10v.Comparing arranging of voltage in the power-supply system of ± 15v can only be at most five, and that minimum is 1mv, and that the highest is 10v, is 1mv, 10mv, 100mv, 1000mv and 1v, 10000mv and 10v respectively, and latter value is 10 times of previous value.

As shown in Figure 2, the measurement apparatus of one application this utility model method, it includes a preposition voltage follower, the time producing time counting starting impulse during one sine wave-shaped signal zero passage starts module, the time that produces when one sine wave-shaped signal arrives the comparison voltage of multiple setting successively intercept and capture the time interception module of pulse and one intercepted and captured pulse controlled by time starting impulse and time, it is used for sampling time t value when arriving comparing voltage value after obtaining tested sinusoidal current waveform signal zero passage and this sampling time t value is directly read the time data application module of the storage data in this memorizer appropriate address as the address of the memorizer being connected with this module；

As shown in one of Fig. 3 to 9, wherein, forward voltage follower U₁It is made up of an amplifier OP-07, one by the secondary current of Verification of Measuring Current Transformer through resistance convert to and through filtering harmonic wave interference etc. processes, its waveforms amplitude is proportional to primary current sine wave-shaped signal, also referred to as tested sinusoidal current waveform signal, be input to U₁In-phase input end V_IN, U₁Inverting input and its outfan V₁It is connected, its outfan V₁The signal of output is divided into six tunnels, is respectively outputted to the amplifier U in first, fourth, five, six, seven, eight circuit units₉、U₁₃、U₁₂、U₁₁、U₁₀、U₁₀₁In-phase input end；

Time starts module and includes first, second and third circuit unit；

First circuit unit is to be made up of the voltage comparator circuit with open-loop gain an amplifier OP-37 and be followed by Transistor-Transistor Logic level conversion interface circuit again the circuit unit of the square wave differential of high level and output, and OP-37 is as voltage comparator U₉, its connection is, voltage follower U₁Outfan V₁With resistance R₁₂One end be connected, resistance R₁₂The other end and U₉In-phase input end be connected, resistance R₁₃The other end and U₉Inverting input be connected, U₉Outfan and resistance R₂₃One end be connected, R₂₃The other end and R₂₄One end be connected, R₂₄The other end connect simulation ground, electric capacity C₁And R₂₄Parallel connection, C₁And R₂₄The filter capacity accessing use energy intensifier circuit in parallel, R₂₃The other end also and have the NAND gate U of Schmidt trigger₁₄Two inputs be connected, diode D₁Input and U₁₄Two inputs be connected, its outfan connection+5v, diode D₂Outfan connect D₁Input, D₂Input connect digitally, U₁₄Outfan and NAND gate U₁₅Two inputs be connected, the first circuit unit has two outfans, U₁₅Outfan V₁₅Being first outfan of the first circuit unit, the Square wave pulses of the high level of its output is divided into two-way, and a road exports be sequentially connected with four enumerators in the 20th circuit unit as time starting impulseBe sequentially connected with four depositors in end and the 21st circuit unitEnd, another road exports electric capacity C₇One end, C₇The other end and resistance R₃₄One end be connected, R₃₄The other end connect digitally, C₇The other end also with diode D₁₁Input be connected, D₁₁Outfan V₂₅It is second outfan of the first circuit unit, its high level Square wave pulses differential, D₁₁Outfan V₂₅With U in third circuit unit₂₅In-phase input end be connected；Third circuit unit output is the reset pulse that resets of the position for arithmetic point；

Second circuit unit is that a zero-point voltage adjusts circuit unit, and amplifier OP-07 is as the voltage follower U in this circuit₂, U₂Outfan V₂Outfan as circuit unit；Its connection is, adjustable resistance R₁One end connection+15v, other end connection-15v, adjustable end connect resistance R₂One end, R₂The other end connect resistance R₃One end, R₃The other end connect simulation ground, R₂The other end also and U₂In-phase input end be connected, its inverting input and outfan V₂It is connected, its outfan V₂With resistance R₁₃One end be connected；

Third circuit unit is second outfan of the first circuit unit, i.e. diode D₁₁The reset pulse passing through differential of output is again and U₂₅Inverting input on adjustment voltage compare, thus at U₂₅Outfan obtain high level more acute, narrow pulse, this pulse is through the outfan of third circuit unit, i.e. phase inverter U₂₇Anti-phase output after become low level point, reset pulse that the narrow position for arithmetic point resets, its connection is, D₁₁Outfan V₂₅With resistance R₃₅One end be connected, R₃₅The other end connect digitally, electric capacity C₈And R₃₅Parallel connection, C₈And R₃₅The filter capacity accessing use energy intensifier circuit in parallel, D₁₁Outfan V₂₅Also and U₂₅In-phase input end be connected, U₂₅It is an amplifier OP-37, voltage reference integrated circuit U₇The adjustment voltage for adjusting pulse width of output is by voltage follower U₂₄And resistance R₃₃And U₂₅Inverting input be connected, U₂₅Outfan and electric capacity C₁₄One end be connected, C₁₄The other end and resistance R₄₁One end be connected, R₄₁The other end connect digitally, C₁₄The other end also with phase inverter U₂₇Input be connected, U₂₇Outfan V₂₇As first four S-R latch U in the outfan of third circuit unit and the 24th circuit unit₄₀FourEnd, i.e. 1,5,10,14 feet and second four S-R latch U₉₃OneEnd, i.e. 1 foot are connected；

Time interception module includes fourth, fifth, six, seven, eight, nine, ten, 11,12,13,14,15,16 circuit units；

4th, five, six, seven, eight circuit units are circuit structures, the components and parts model used, duplicate five the voltage comparator circuit unit of parameter, it is made up of the voltage comparator circuit with open-loop gain respectively amplifier OP-37 and is followed by Transistor-Transistor Logic level conversion interface circuit again the circuit unit of the square wave differential of high level and output, and each circuit unit of five circuit units has two outfans, first outfan of circuit unit is the outfan of first NAND gate having Schmidt trigger in the circuit unit of place respectively, the low level Square wave pulses of its output is divided into two-way, one road is used as to determine the signal of scaling position, it is connected respectively to two 7,4LS,279 tetra-S-R latch U in the 24th circuit unit₄₀And U₉₃In corresponding fiveEnd, i.e. set end, another road is connected to two inputs of next NAND gate；Second outfan of circuit unit is the outfan of last diode in the circuit unit of place respectively, and its output is time of high level to intercept and capture spike, and is all connected with the in-phase input end of amplifier in the 16th circuit unit；The NAND gate having Schmidt trigger in circuit is 74LS132, and it includes U₁₄、U₁₅、U₁₆、U₁₇、U₁₈、U₁₉、U₂₀、U₂₁、U₂₂、U₂₃、U₁₀₂、U₁₀₃.The connection of the 4th circuit unit is, voltage follower U₁Outfan V₁With resistance R₂₀One end be connected, resistance R₂₀The other end and U₁₃In-phase input end be connected, resistance R₂₁The other end and U₁₃Inverting input be connected, U₁₃Outfan and resistance R₃₁One end be connected, R₃₁The other end and R₃₂One end be connected, R₃₂The other end connect simulation ground, electric capacity C₅And R₃₂Parallel connection, C₅And R₃₂In parallel access use can the filter capacity of intensifier circuit, similar electric capacity and resistance be connected in parallel on the five, the six, seven, eight circuit units also have, act on identical, no longer illustrate, R₃₁The other end also and U₂₂Two inputs be connected, diode D₉Input and U₂₂Two inputs be connected, its outfan connect+5v power supply, diode D₁₀Outfan connect D₉Input, D₁₀Input connect digitally, U₂₂Outfan V₂₂Being first outfan of the 4th circuit unit, the low level Square wave pulses of its output is divided into two-way, and a road, as the signal determining scaling position, is connected to U₄₀In 2,3 feet, another road is connected to U₂₃Two inputs；U₂₃Outfan and electric capacity C₁₃One end be connected, C₁₃The other end and resistance R₄₀One end be connected, R₄₀The other end connect digitally, C₁₃The other end also with diode D₁₅Input be connected, D₁₅Outfan V₂₆Being second outfan of the 4th circuit unit, its output is time of high level to intercept and capture spike, U in itself and the 16th circuit unit₂₆In-phase input end be connected；The connection of the 5th circuit unit is, voltage follower U₁Outfan V₁With resistance R₁₈One end be connected, resistance R₁₈The other end and U₁₂In-phase input end be connected, resistance R₁₉The other end and U₁₂Inverting input be connected, U₁₂Outfan and resistance R₂₉One end be connected, R₂₉The other end and R₃₀One end be connected, R₃₀The other end connect simulation ground, electric capacity C₄And R₃₀Parallel connection, R₂₉The other end also and U₂₀Two inputs be connected, diode D₇Input and U₂₀Two inputs be connected, its outfan connect+5v power supply, diode D₈Outfan connect D₇Input, D₈Input connect digitally, U₂₀Outfan V₂₀Being first outfan of the 5th circuit unit, the low level Square wave pulses of its output is divided into two-way, and a road, as the signal determining scaling position, is connected to U₄₀In 6 feet, another road is connected to U₂₁Two inputs；U₂₁Outfan and electric capacity C₁₂One end be connected, C₁₂The other end and resistance R₃₉One end be connected, R₃₉The other end connect digitally, C₁₂The other end also with diode D₁₄Input be connected, D₁₄Outfan V₂₆Being second outfan of the 5th circuit unit, its output is time of high level to intercept and capture spike, U in itself and the 16th circuit unit₂₆In-phase input end be connected；The connection of the 6th circuit unit is, voltage follower U₁Outfan V₁With resistance R₁₆One end be connected, resistance R₁₆The other end and U₁₁In-phase input end be connected, resistance R₁₇The other end and U₁₁Inverting input be connected, U₁₁Outfan and resistance R₂₇One end be connected, R₂₇The other end and R₂₈One end be connected, R₂₈The other end connect simulation ground, electric capacity C₃And R₂₈Parallel connection, R₂₇The other end also and U₁₈Two inputs be connected, diode D₅Input and U₁₈Two inputs be connected, its outfan connect+5v power supply, diode D₆Outfan connect D₅Input, D₆Input connect digitally, U₁₈Outfan V₁₈Being first outfan of the 6th circuit unit, the low level Square wave pulses of its output is divided into two-way, and a road, as the signal determining scaling position, is connected to U₄₀In 15 feet, another road is connected to U₁₉Two inputs；U₁₉Outfan and electric capacity C₁₁One end be connected, C₁₁The other end and resistance R₃₈One end be connected, R₃₈The other end connect digitally, C₁₁The other end also with diode D₁₃Input be connected, D₁₃Outfan V₂₆Being second outfan of the 6th circuit unit, its output is time of high level to intercept and capture spike, U in itself and the 16th circuit unit₂₆In-phase input end be connected；The connection of the 7th circuit unit is, voltage follower U₁Outfan V₁With resistance R₁₄One end be connected, resistance R₁₄The other end and U₁₀In-phase input end be connected, resistance R₁₅The other end and U₁₀Inverting input be connected, U₁₀Outfan and resistance R₂₅One end be connected, R₂₅The other end and R₂₆One end be connected, R₂₆The other end connect simulation ground, electric capacity C₂And R₂₆Parallel connection, R₂₅The other end also and U₁₆Two inputs be connected, diode D₃Input and U₁₆Two inputs be connected, its outfan connect+5v power supply, diode D₄Outfan connect D₃Input, D₄Input connect digitally, U₁₆Outfan V₁₆Being first outfan of the 7th circuit unit, the low level Square wave pulses of its output is divided into two-way, and a road, as the signal determining scaling position, is connected to U₄₀In 11,12 feet, another road is connected to U₁₇Two inputs；U₁₇Outfan and electric capacity C₉One end be connected, C₉The other end and resistance R₃₆One end be connected, R₃₆The other end connect digitally, C₉The other end also with diode D₁₂Input be connected, D₁₂Outfan V₂₆Being second outfan of the 7th circuit unit, its output is time of high level to intercept and capture spike, U in itself and the 16th circuit unit₂₆In-phase input end be connected；The connection of the 8th circuit unit is, voltage follower U₁Outfan V₁With resistance R₆₀One end be connected, resistance R₆₀The other end and U₁₀₁In-phase input end be connected, resistance R₆₁The other end and U₁₀₁Inverting input be connected, U₁₀₁Outfan and resistance R₆₃One end be connected, R₆₃The other end and R₆₂One end be connected, R₆₂The other end connect simulation ground, electric capacity C₂₀And R₆₂Parallel connection, R₆₃The other end also and U₁₀₂Two inputs be connected, diode D₂₀Input and U₁₀₂Two inputs be connected, its outfan connect+5v power supply, diode D₂₁Outfan connect D₂₀Input, D₂₁Input connect digitally, U₁₀₂Outfan V₁₀₂Being first outfan of the 8th circuit unit, the low level Square wave pulses of its output is divided into two-way, and a road, as the signal determining scaling position, is connected to U₉₃In 2,3 feet, another road is connected to U₁₀₃Two inputs；U₁₀₃Outfan and electric capacity C₂₁One end be connected, C₂₁The other end and resistance R₆₄One end be connected, R₆₄The other end connect digitally, C₂₁The other end also with diode D₂₂Input be connected, D₂₂Outfan V₂₆Being second outfan of the 8th circuit unit, its output is time of high level to intercept and capture spike, U in itself and the 16th circuit unit₂₆In-phase input end be connected；

Nine, the ten, 11,12, ten three-circuit unit are the output circuit of the comparison voltage being made up of as voltage follower divider resistance and amplifier OP-07 respectively, and its connection is, the resistance R of the 9th circuit unit₁₀One end and voltage reference integrated circuit AD581, i.e. U₈Outfan V_outIt is connected, R₁₀The other end and resistance R₁₁One end be connected, R₁₁The other end connect simulation ground, R₁₀The other end also and U₆In-phase input end be connected, U₆Inverting input and outfan V₆It is connected, U₆Outfan V₆Voltage 1mv is compared in output first, its outfan V₆With the resistance R in the 4th circuit unit₂₁One end be connected；The resistance R of the tenth circuit unit₈One end and U₈Outfan V_outIt is connected, R₈The other end and resistance R₉One end be connected, R₉The other end connect simulation ground, R₈The other end also and U₅In-phase input end be connected, U₅Inverting input and outfan V₅It is connected, U₅Outfan V₅Voltage 10mv is compared in output second, its outfan V₅With the resistance R in the 5th circuit unit₁₉One end be connected；The resistance R of the 11st circuit unit₆One end and U₈Outfan V_outIt is connected, R₆The other end and resistance R₇One end be connected, R₇The other end connect simulation ground, R₆The other end also and U₄In-phase input end be connected, U₄Inverting input and outfan V₄It is connected, U₄Outfan V₄Export the 3rd and compare voltage 100mv, its outfan V₄With the resistance R in the 6th circuit unit₁₇One end be connected；The resistance R of the 12nd circuit unit₄One end and U₈Outfan V_outIt is connected, R₄The other end and resistance R₅One end be connected, R₅The other end connect simulation ground, R₄The other end also and U₃In-phase input end be connected, U₃Inverting input and outfan V₃It is connected, U₃Outfan V₃Export the 4th and compare voltage 1v, its outfan V₃With the resistance R in the 7th circuit unit₁₅One end be connected；The U of the tenth three-circuit unit₁₀₀In-phase input end and U₈Outfan V_outIt is connected, U₁₀₀Inverting input and outfan V₁₀₀It is connected, U₁₀₀Outfan V₁₀₀Export the 5th and compare voltage 10v, its outfan V₁₀₀With the resistance R in the 8th circuit unit₆₁One end be connected；

14th circuit unit is by MC1403 voltage reference integrated circuit U₇With adjustable resistance R₂₂, electric capacity C₆And two amplifier OP-07 are as the U of voltage follower₂₄、U₈₁With resistance R₃₃、R₅₈Constitute, U₇The voltage of output is divided into two-way, respectively through U₂₄And resistance R₃₃、U₈₁And resistance R₅₈Being input in the three, the 16 circuit units the inverting input of amplifier, its connection is, U₇1 foot connect+5v power supply, 3 feet connect digitally, electric capacity C₆One end connect U₇2 feet, the other end connect digitally, adjustable resistance R₂₂One end connect U₇2 feet, the other end connect digitally, R₂₂Adjustable end connect U₂₄In-phase input end, U₂₄Inverting input be connected with outfan, its outfan connect resistance R₃₃One end, R₃₃The other end connect U in third circuit unit₂₅Inverting input, R₂₂Adjustable end be also connected with U₈₁In-phase input end, U₈₁Inverting input be connected with outfan, its outfan connect resistance R₅₈One end, R₅₈The other end connect U in the 16th circuit unit₂₆Inverting input；R₂₂The voltage of adjustable end output be called adjustment voltage, the pulse for the three, the 16 circuit units outputs carries out the adjustment of pulse width, and the method for its adjustment is, suitably adjusts R₂₂Adjustable end, make the adjustment voltage that adjustable end exports slightly below being input to U₂₅、U₂₆The ceiling voltage of pulse of in-phase input end；

15th circuit unit is model is the voltage reference integrated circuit U of AD581₈, its power end+V_SConnecing+15v power supply, earth terminal connects simulation ground, outfan V_OUTExport stable 10v reference voltage be connected respectively to the nine, the ten, 11, resistance R in 12 circuit units₁₀、R₈、R₆And R₄One end, the U of the tenth three-circuit unit₁₀₀In-phase input end and U₈Outfan V_OUTIt is connected；

16th circuit unit is the circuit of output after the signal of second outfan output of fourth, fifth, six, seven, eight circuit units is adjusted again, its output be one, be at most more acute, narrow time of five and intercept and capture pulse or train of pulse, the outfan of this circuit unit and the CP end of the 21st circuit unit are connected；Its connection is, D₁₅、D₁₄、D₁₃、D₁₂、D₂₂Outfan V₂₆It is connected to U₂₆In-phase input end, resistance R₃₇One end connect U₂₆In-phase input end, the other end connect digitally, electric capacity C₁₀And R₃₇Parallel connection, C₁₀And R₃₇The filter capacity accessing use energy intensifier circuit in parallel, U₂₆It is an amplifier OP-37, voltage reference integrated circuit U₇The adjustment voltage for adjusting pulse width of output is by voltage follower U₈₁And resistance R₅₈And U₂₆Inverting input be connected, from D₁₅、D₁₄、D₁₃、D₁₂、D₂₂The time passing through differential exported respectively intercepts and captures pulse and passes through again U₂₆In-phase input end and inverting input on, via voltage follower U₈₁And resistance R₅₈The adjustment voltage of input compares, thus at U₂₆Outfan obtain more acute, narrower time and intercept and capture pulse, U₂₆Outfan and electric capacity C₁₅One end be connected, C₁₅The other end and resistance R₄₂One end be connected, R₄₂The other end connect digitally, C₁₅The other end also with phase inverter U₂₈Input be connected, U₂₈Outfan and phase inverter U₂₉Input be connected, U₂₉Outfan V₂₉The 11st foot CP end as the outfan of the 16th circuit unit and four depositors being sequentially connected with of the 21st circuit unit is connected；

Time data application module, it is intercepted and captured Pulse Width Control by time starting impulse and time, being used to sampling time t value when voltage is compared in arrival after obtaining tested sinusoidal current waveform zero passage and this sampling time t value is directly read the application module of the data of storage in the memorizer appropriate address being connected with this module as storage address, the memorizer being connected with this module adopts electrically erasable programmable ROM EEPROM；This application module includes the 17th, 18,19,20,21,22,23,24,25 circuit units；

As shown in Figure 6, the 17th circuit unit is the first maintenance impulse circuit, is 74L,S08 42 input and door U₅₁In a gate circuit, one input, i.e. U₅₁1 foot and the 20th circuit unit the output of 16 data output ends 16 bits in the 11st, i.e. U₄₃12 feet be connected, another input, i.e. U₅₁2 feet and 16 bits in the 13rd, i.e. U₄₄14 feet be connected, the outfan of the 17th circuit unit, i.e. U₅₁3 feet time counting circuit start counting after 5120us time output first maintenance pulse, its output is divided into two-way, four depositor U being sequentially connected with that a road is input in the 22nd circuit unit₅₃、U₅₄、U₅₅And U₅₆11 feet, another road is input to an input of the 18th circuit unit, i.e. U₅₁4 feet；

18th circuit unit is the second maintenance impulse circuit, is U₅₁In another gate circuit, one input, i.e. U₅₁4 feet and U₅₁3 feet be connected, another input, i.e. U₅₁5 feet and the 20th circuit unit the output of 16 data output ends 16 bits in the 8th, i.e. U₄₂11 feet be connected, the outfan of the 18th circuit unit, i.e. U₅₁6 foot V_51.6Output the second maintenance pulse when time counting circuit starts the 5248us after counting, second keeps pulse to be input to two 4 bidirectional shift register U in the 24th circuit unit₇₆And U₉₅11 feet；

First keeps impulse circuit and second to keep impulse circuit to be to temporary sampling time data and arithmetic point information at least be kept the time of 20ms, i.e. a cycle arrange；The condition of its setting is,First keeps pulse and second to keep the time that pulse occurs to should be greater than the 5000us after time counting circuit starts counting,First keeps pulse and second to keep the time that pulse occurs to should be less than 10ms,First keeps the time that pulse occurs pulse should be kept Zao than second,It is minimum that hardware used during this two pulses is set；According to aforementioned condition, its method to set up is, decimal number 5120 convert to binary number, namely 0001,0100,0000,0000, being decimal numeral 5120 when there is high level for the 11st of this binary number the, 13 simultaneously, this method of attachment of binary 11st, 13 is as previously mentioned；Same, decimal number 5248 convert to binary number, namely 0001,0100,1000,0000, be decimal numeral 5248 when the 8th of this binary number the, 11,13 high level occurring simultaneously, its method of attachment is as previously mentioned；

19th circuit unit is 10MHZ pulses generation and very frequency circuit, and its connection is, 74LS04 hex inverter U₄₆The 1st, connect resistance R between 2 feet₅₅, the 3rd, connect R between 4 feet₅₆, the 2nd, connect C between 3 feet₁₇, the 1st, connect 10MHZ crystal oscillator between 4 feet, the 2nd foot and the 13rd foot are connected, the 12nd foot and 74LS160 decimal scale coincidence counter U₄₅The 2nd foot CP end be connected, U₄₅The 1st, 7,9 and 10 feet by resistance R₅₄Being connected with+5V power supply, the 15th foot output 10MHZ 1MHZ pulse after very frequency, namely every microsecond is 1 pulse, U₄₅The output of the 15th foot be connected to the 2nd foot CP end of four coincidence counters of the 20th circuit unit；

20th circuit unit is by four 74LS161 tetrad coincidence counter U₄₁、U₄₂、U₄₃、U₄₄16 binary time pulse counting circuits of be connected in sequence, its output be one by zero, be incremented by 16 bits of 1us every time；Its connection is, U₄₁The 15th foot connect U₄₂The 10th foot, U₄₂The 15th foot connect U₄₃The 10th foot, U₄₃The 15th foot connect U₄₄The 10th foot, the 2nd foot CP end and U of four enumerators₄₅The 15th foot be connected, the 7th of four enumerators the, 9 feet and U₄₁The 10th foot by resistance R₅₄It is connected with+5V power supply, the 1st foot of four enumeratorsEnd and first outfan of the first circuit unit, i.e. U₁₅Outfan be connected, U₄₁The 14th foot be the lowest order of this 16 bit, U₄₄The 11st foot be the highest order of this 16 bit, four enumerators totally 16 data output ends connect one to one 16 data input pins of the 21st circuit unit, namely U₄₁、U₄₂、U₄₃、U₄₄The 14th of each enumerator, 13,12,11 feet one_to_one corresponding successively access U₄₇、U₄₈、U₄₉、U₅₀The 3rd of each depositor, 4,5,6 feet；

21st circuit unit is by four 74LS194 i.e. 4 bidirectional shift register U₄₇、U₄₈、U₄₉、U₅₀Be sequentially connected with and being incorporated to-and going out the time data buffering circuit that mode works, its 4 bidirectional shift registers can also adopt the IC chips such as eight d type flip flops to replace；Its connection is, four depositor U₄₇、U₄₈、U₄₉、U₅₀The 1st footEnd and first outfan of the first circuit unit, i.e. U₁₅Outfan be connected, four depositor U₄₇、U₄₈、U₄₉、U₅₀The 11st foot CP end and the outfan of the 16th circuit unit of time interception module, i.e. U₂₉Outfan be connected, 16 data input pin one_to_one corresponding of totally 16 data output ends and the 22nd circuit unit of four depositors are connected, namely U₄₇、U₄₈、U₄₉、U₅₀The 15th of each depositor, 14,13,12 feet one_to_one corresponding successively access U₅₃、U₅₄、U₅₅、U₅₆The 3rd of each depositor, 4,5,6 feet, the 9th of four depositors the, 10 feet connect resistance R₅₃One end, resistance R₅₃The other end and+5V power supply connect, R₅₃One end by electric capacity C₁₆Connect digitally；

22nd circuit unit is by four 74LS194 i.e. 4 bidirectional shift register U₅₃、U₅₄、U₅₅、U₅₆Be sequentially connected with and being incorporated to-and going out the time data holding circuit that mode works, its 4 bidirectional shift registers can also adopt the IC chips such as eight d type flip flops to replace；Its connection is, four depositor U₅₃、U₅₄、U₅₅、U₅₆The 1st foot CR end, 9,10 feet and resistance R₅₃One end be connected, R₅₃The other end and+5V power supply connect, R₅₃One end by electric capacity C₁₆Connect digitally；11st foot CP end and the outfan of the 17th circuit unit, i.e. U of four depositors₅₁3 feet be connected, front 13 outfans in 16 data output ends of four depositors, namely from U₅₃The 15th foot rise, according to priority, the 14th, 13,12 feet, connecing down is U₅₄The 15th, 14,13,12 feet, then to connect down be U₅₅The 15th, 14,13,12 feet, be finally U₅₆The 15th foot, respectively successively with the 20th three-circuit unit, i.e. (1st) individual memorizer U₅₇, (2nd) individual memorizer U₅₈13 address wire A in parallel₀～A₁₂One_to_one corresponding is connected；

20th three-circuit unit is arranged to the programmable read only memory EEPROM2864 of 8K × 8 of two address wires parallel connections of read-only working method, has adopted the form of four binary-decimal binary-coded decimals to be stored in H I in conversion table in the memory element of two memorizeies_mValue, the store method of data is as described above；Its connection is, U₅₇And U₅₈The 20th, 22 feet are by resistance R₅₂Connect digitally, U₅₇And U₅₈The 27th foot by resistance R₅₁Connect+5V power supply, U₅₇And U₅₈13 address wire A in parallel₀～A₁₂Successively with 16 data output ends of the 22nd circuit unit in before 13 outfans, i.e. U₅₃、U₅₄、U₅₅15,14,13,12 foot and U₅₆15 foot one_to_one corresponding be connected, U₅₇And U₅₈The data wire I/O of two memorizeies₀～I/O₇Totally 16 articles are connected with the 25th circuit unit；

24th circuit unit is arithmetic point automatic switching circuit unit, and it includes: (1) time data decision circuitry；(2) scaling position determines circuit；(3) 8 line-3 line priority encoding output circuits；(4) 3 line-8 line decoding output circuits；(5) arithmetic point keeps and output driving circuit；

The concrete connection of its circuit is:

(1) time data decision circuitry, its 22nd circuit unit, i.e. time data holding circuit export and the time data that keeps more than or equal to 319us time output low level, its circuit is by first 42 input or door integrated circuit U₅₂, first 42 input and door integrated circuit U₆₇, second 42 input and door integrated circuit U₆₈, second 42 input or door integrated circuit U₆₉With a phase inverter U₇₀Constitute, first depositor U of the 22nd circuit unit₅₃15,14,13,12 feet, namely corresponding to the address end foot A of memorizer₀、A₁、A₂、A₃Successively with first 42 input and door integrated circuit U₆₇1,2,4,5 feet be connected, second depositor U₅₄15,14,13,12 feet, namely corresponding to the address end foot A of memorizer₄、A₅、A₆、A₇Successively with first 42 input and door integrated circuit U₆₇12,13 feet and first 42 input or door integrated circuit U₅₂1,2 feet be connected, the 3rd depositor U₅₅15,14,13,12 feet, namely corresponding to the address end foot A of memorizer₈、A₉、A₁₀、A₁₁Successively with second 42 input and door integrated circuit U₆₈1 foot, first 42 input or door integrated circuit U₅₂4,5,12 feet be connected, the 4th depositor U₅₆15 feet, namely corresponding to the address end foot A of memorizer₁₂And U₅₆14 feet successively with first 42 input or door integrated circuit U₅₂13 feet, second 42 input or door integrated circuit U₆₉10 feet be connected, first 42 input or door integrated circuit U₅₂3 feet and second 42 input or door integrated circuit U₆₉1 foot be connected, first 42 input or door integrated circuit U₅₂6 feet and 9 feet be connected, 10 feet and 11 feet are connected, first 42 input or door integrated circuit U₅₂8 feet and second 42 input or door integrated circuit U₆₉5 feet be connected, first 42 input with door integrated circuit U₆₇3 feet and 10 feet be connected, 6 feet and 9 feet are connected, first 42 input with door integrated circuit U₆₇8,11 feet successively with second 42 input with door integrated circuit U₆₈5,4 feet be connected, second 42 input with door integrated circuit U₆₈2,3,6 feet successively with second 42 input or door integrated circuit U₆₉3,4,2 feet be connected, second 42 input or door integrated circuit U₆₉6 feet and 9 feet be connected, second 42 input or door integrated circuit U₆₉8 feet and phase inverter U₇₀Input be connected, phase inverter U₇₀Outfan V₇₀As time data decision circuitry outfan respectively with first in scaling position decision circuitry and door U₃₇, second and door U₃₈, the 3rd with door U₃₉With the 4th and door U₉₀An input be connected, phase inverter U₇₀Outfan V₇₀Data output end at time data holding circuit unit export and the time data that keeps more than or equal to 319us time output low level, or in other words, the phase inverter U when time data is less than 319us₇₀Outfan output high level；Constitute this time data decision circuitry two input with door and two input or door can with three input, four input with door and three input, four input or door replace flexibly；

(2) scaling position determines that circuit is by the first phase inverter U₃₀, the second phase inverter U₃₁, the 3rd phase inverter U₃₂, the 4th phase inverter U₃₃, the 5th phase inverter U₉₁, first or door U₃₄, second or door U₃₅, the 3rd or door U₃₆, the 4th or door U₉₂, first and door U₃₇, second and door U₃₈, the 3rd with door U₃₉, the 4th with door U₉₀With first four S-R latch U₄₀With second four S-R latch U₉₃Constituting, the concrete connection of its circuit is, U₂₂Outfan V₂₂With U₄₀2,3 feet be connected, U₂₀Outfan V₂₀With U₄₀6 feet be connected, U₁₈Outfan V₁₈With U₄₀15 feet be connected, U₁₆Outfan V₁₆With U₄₀11,12 feet be connected, U₁₀₂Outfan V₁₀₂With U₉₃2,3 feet be connected, phase inverter U₂₇Outfan V₂₇With U₄₀1,5,10,14 foot and U₉₃1 foot be connected, U₇₀Outfan V₇₀Respectively with first and door U₃₇, second and door U₃₈, the 3rd with door U₃₉With the 4th and door U₉₀An input be connected, U₄₀4 feet and U₃₀Input and U₃₇Another input be connected, U₃₀Outfan V₃₀And U₇₁11 feet be connected, U₃₇Outfan and U₃₄An input be connected, U₄₀7 feet and U₃₄Another input and U₃₈Another input be connected, U₃₄Outfan and U₃₁Input be connected, U₃₁Outfan V₃₁With U₇₁12 feet be connected, U₃₈Outfan and U₃₅An input be connected, U₄₀13 feet and U₃₅Another input and U₃₉Another input be connected, U₃₅Outfan and U₃₂Input be connected, U₃₂Outfan V₃₂With U₇₁13 feet be connected, U₃₉Outfan and U₃₆An input be connected, U₄₀9 feet and U₃₆Another input and U₉₀Another input be connected, U₃₆Outfan and U₃₃Input be connected, U₃₃Outfan V₃₃With U₇₁1 foot be connected, U₉₀Outfan and U₉₂An input be connected, U₉₃4 feet and U₉₂Another input be connected, U₉₂Outfan and U₉₁Input be connected, U₉₁Outfan V₉₁With U₇₁2 feet be connected；

(3) 8 line-3 line priority encoding output circuits are by 74LS148 priority encoder U₇₁, phase inverter U₇₂、U₇₃And U₇₄Constituting, its connection is, U₇₁11,12,13,1,2 feet successively with U₃₀、U₃₁、U₃₂、U₃₃、U₉₁Outfan be connected, 5,10 feet connect digitally, and 6,7,9 feet are sequentially connected with U₇₂、U₇₃And U₇₄Input, U₇₂、U₇₃And U₇₄Outfan be sequentially connected with U₇₅3,2,1 foot；

(4) 3 line-8 line decoding output circuits are by 74LS138 decoder U₇₅Constituting, its connection is, 5,4 feet connect digitally, and 6 feet pass through resistance R₅₇Connecting+5V power supply, 14,13,12,11 feet connect U respectively₇₆3,4,5,6 feet, its 10 foot connect U₉₅3 feet；

(5) arithmetic point maintenance and output driving circuit are by two 4 bidirectional shift register 74LS194, i.e. U₇₆、U₉₅And 74LS07 buffering/driving gate circuit U₇₇、U₇₈、U₇₉、U₈₀And U₉₄Constituting, its connection is, U₇₆、U₉₅1,9,10 feet by resistance R₅₇Connect+5V power supply, U₇₆、U₉₅11 feet and U₅₁6 feet be connected, U₇₆15,14,13,12 foot and V₇₉、V₈₀、V₇₈、V₇₇, respectively corresponding to buffering/driving gate circuit U₇₉、U₈₀、U₇₈、U₇₇Input be connected, U₇₉、U₈₀、U₇₈、U₇₇Outfan respectively through resistance R₆₅、R₄₇、R₄₈、R₄₉With LED seven-segment display U₆₃、U₆₄、U₆₅And U₆₆In arithmetic point display position dp be connected with represents respectively successively individual, ten, hundred, the arithmetic point of kilobit, U₉₅15 foot V₉₄With buffering/driving gate circuit U₉₄Input be connected, U₉₄Outfan by resistance R₅₀With the LED light emitting diode D representing myriabit arithmetic point₁₆It is connected, i.e. U₆₃In dp represent position arithmetic point, U₆₄In dp represent ten arithmetic point, U₆₅In dp represent hundred arithmetic point, U₆₆In dp represent kilobit arithmetic point, light emitting diode D₁₆It is used for representing myriabit arithmetic point；U₅₁6 feet can export the second maintenance and be pulsed into U during 5248us after time counting circuit starts counting₇₆And U₉₅11 feet, this rising edge of a pulse is through U₇₁、U₇₅That obtain after process and deliver to U₇₆Or U₉₅Unique arithmetic point signal of data input pin send display；

As shown in Figure 8,25th circuit unit is the digital-scroll technique circuit adopting the conventional device compositions such as BCD-seven-segment decoder/driver, current-limiting resistance, LED seven-segment numeric indicator or liquid crystal display, for the tested current value of instant playback, it is by 74LS47 and BCD-seven-segment decoder/driver U in the present embodiment₅₉、U₆₀、U₆₁、U₆₂, current-limiting resistance R₄₃×7、R₄₄×7、R₄₅×7、R₄₆× 7, LED seven-segment numeric indicator U₆₃、U₆₄、U₆₅、U₆₆And individual position, ten, hundred, kilobit, myriabit arithmetic point current-limiting resistance R₆₅、R₄₇、R₄₈、R₄₉、R₅₀With a LED light emitting diode D₁₆The digital-scroll technique circuit of composition, the method for attachment of the data wire I/O of its memorizer in parallel with two address wires of the 20th three-circuit unit is, U₅₇Data wire I/O₀、I/O₁、I/O₂、I/O₃Successively and U₅₉7,1,2,6 feet be connected, its output and at U₆₃On be shown that in totally two storage bytes of two in parallel memorizeies of address wire first ten's digit of storage, U₅₇Data wire I/O₄、I/O₅、I/O₆、I/O₇Successively and U₆₀7,1,2,6 feet be connected, its output and at U₆₄On be shown that in totally two storage bytes of two in parallel memorizeies of address wire second ten's digit of storage, U₅₈Data wire I/O₀、I/O₁、I/O₂、I/O₃Successively and U₆₁7,1,2,6 feet be connected, its output and at U₆₅On be shown that in totally two storage bytes of two in parallel memorizeies of address wire the 3rd ten's digit of storage, U₅₈Data wire I/O₄、I/O₅、I/O₆、I/O₇Successively and U₆₂7,1,2,6 feet be connected, its output and at U₆₆On be shown that in two storage bytes of two in parallel memorizeies of address wire the 4th ten's digit of storage；U₅₉、U₆₀、U₆₁、U₆₂With current-limiting resistance R₄₃×7、R₄₄×7、R₄₅×7、R₄₆× 7 and seven-segment numeric indicator U₆₃、U₆₄、U₆₅、U₆₆And LED light emitting diode D₁₆Connection belong to knowledge.

This utility model device work process is summarized as follows: one via preposition voltage follower U₁The tested sinusoidal current waveform signal of input is by U when bearing positive zero passage₉The Square wave pulses of the about low than ± 15V 2～3V of outfan output after level shifter interface circuit conversion at the first circuit unit U₁₅The high level Square wave pulses of outfan one TTL of output to the U of time counting circuit unit₄₁、U₄₂、U₄₃And U₄₄1 foot and the U of time data t buffering circuit unit₄₇、U₄₈、U₄₉And U₅₀1 foot, make time counting circuit start counting up, time data t buffering circuit unit prepares data at any time and keeps in；U₁₅High level Square wave pulses is carried out differential and then through U by another road of output₂₅Through by U after conditioning₂₇Outfan exports low level point, burst pulse to U₄₀1,5,10,14 foot and U₉₃1 foot, make U₄₀And U₉₃Two four s-r latch reset；When the tested sinusoidal current waveform signal amplitude of input is more than 1mv, the 4th circuit unit first outfan U₂₂Export a low level square wave to U₄₀2,3 foot set, make U₄₀4 feet output high level to U₃₀Input, U₃₀Outfan output low level to priority encoder U₇₁11 feet, decoded device U₇₅, shift register U₇₆After the process of circuit, under the second rising edge effect keeping pulse, determine the arithmetic point position in individual position；U₂₂Outfan again and U₂₃Input be connected, U₂₃The high level square wave of output is through the differential second outfan D via the 4th circuit unit₁₅, pass through U₂₆Then through by U after conditioning₂₉The output point of one high level, burst pulse, i.e. time catch the U being pulsed into time data t buffering circuit unit₄₇、U₄₈、U₄₉And U₅₀11 foot CP ends, by the rising edge of this pulse arrive after the tested sinusoidal current waveform signal zero passage of input first compare voltage 1mv time time counting value, sampling time t is from the U of time counting circuit unit₄₁、U₄₂、U₄₃And U₄₄Data output end deliver to U₄₇、U₄₈、U₄₉And U₅₀Data output end keep in, finally under the first effect keeping pulse, temporary sampling time t is retained in time data holding circuit U₅₃、U₅₄、U₅₅、U₅₆Data output end and directly access two memorizer U in parallel₅₇And U₅₈, read the storage data in respective stored address, complete the measuring task of the tested sinusoidal current waveform signal to more than amplitude 1mv；If tested sinusoidal current waveform signal amplitude is much larger than 1mv but during more than 10mv, then when this sine wave-shaped signal amplitude is more than 10mv, the 5th circuit unit first outfan U₂₀Export a low level square wave to U₄₀6 foot set, make U₄₀7 feet output high level to U₃₄Another input, cause U₃₄Output high level is to U₃₁Input, U₃₁Output low level is to priority encoder U₇₁12 feet, decoded device U₇₅, shift register U₇₆After the process of circuit, under the second rising edge effect keeping pulse, determine arithmetic point the position of ten, if now the numerical value of sampling time t is not less than 319us, then U₇₀High level will not be exported, therefore U₃₇、U₃₈、U₃₉、U₉₀All it is blocked；U₂₀Outfan again and U₂₁Input be connected, U₂₁The high level square wave of output is through the differential second outfan D via the 5th circuit unit₁₄, pass through U₂₆Then through by U after conditioning₂₉The output point of one high level, burst pulse, namely second time catch the U being pulsed into time data t buffering circuit unit₄₇、U₄₈、U₄₉And U₅₀11 foot CP ends, by the rising edge of this pulse refresh first sampling time t data and arrive after tested sinusoidal current waveform signal zero passage second compare voltage 10mv time time counting value, sampling time t is from the U of time counting circuit unit₄₁、U₄₂、U₄₃And U₄₄Data output end deliver to U₄₇、U₄₈、U₄₉And U₅₀Data output end keep in, finally under the first effect keeping pulse, second temporary sampling time t is retained in time data holding circuit U₅₃、U₅₄、U₅₅、U₅₆Data output end and directly access two memorizer U in parallel₅₇And U₅₈, read the storage data in respective stored address, complete the measuring task of the tested sinusoidal current waveform signal to more than amplitude 10mv；If tested sinusoidal current waveform signal amplitude is much larger than 10mv, but time more than 100mv, 1v to 10v, then the simplified process of device work is generally the same.In a word, tested sinusoidal current waveform signal amplitude as more than 1,10,100,1000,10000mv, then first outfan at corresponding fourth, fifth, six, seven, eight circuit units will make U by output low level square wave₄₀、U₉₃CorrespondingEnd set, thus tested sinusoidal current waveform signal amplitude be 1,10,100,1000,10000mv time, by second keep pulse determine its corresponding arithmetic point place, the position of ten, hundred, thousand, ten thousand；Meanwhile, second outfan of corresponding fourth, fifth, six, seven, eight circuit units will pass through the outfan U of the 16th circuit unit₂₉Export a pulse or more than two, the time being preferably at most five intercepts and captures the train of pulse CP end to four depositors being sequentially connected with of the 21st circuit unit, in this continuous print pulse, later pulse always refreshes the time t value that previous pulse samples, and the sampling time t value that later pulse is intercepted and captured always keeps pulse to be sent on the data output end of time data holding circuit when occurring and DASD first, read out and store data accordingly, achieve measurement scope by 1 to 10, 100, 1000, automatically the conversion of 10000 is automatic with scaling position, convert accurately.As previously mentioned, as long as the present embodiment can meet requirement according to the resolution in actual current measurement and metering, degree of accuracy when reaching more than 2/1000ths, so device only arranges the memorizer of two 8K × 8, it is used for showing four decimal numeral measurement results.When tested current amplitude successively more than 1,10,100,1000mv time, its four LED seven-segment numeric indicator U₆₃、U₆₄、U₆₅、U₆₆Can show accordingly ×. ×××, ××. ××, ×××. ×, ××××., in display, arithmetic point moves right successively, can meet the display from 1～9999, i.e. arithmetic point this first × expression units when from left to right first × back, arithmetic point moves right successively, first × also represent tens, hundreds, thousands digit successively；When tested current amplitude is more than 10000mv, due to U₆₃、U₆₄、U₆₅、U₆₆Altogether only having four, so now last bit digital one by one is by default, the arithmetic point of myriabit is also with D₁₆Represent, work as D₁₆When lighting, represent U₆₃、U₆₄、U₆₅、U₆₆The numeral of display is the numeral of ten thousand, thousand, hundred, ten successively, although do not have a units, but still will not reduce the resolution of measurement, degree of accuracy is the requirement of 2/1000ths.Really the complete numeral showing a myriabit is needed, as long as increasing and U₅₇、U₅₈The memorizer of the 3rd 8K × 8 that address wire is in parallel, additionally one group of current-limiting resistance of increase and a LED seven-segment numeric indicator, and R₅₀And D₁₆Connection change R into₅₀It is connected with the arithmetic point display position dp in the 5th the LED seven-segment numeric indicator increased；In the 3rd memorizer increased, according to first and second memorizer storage method, namely each time t value in conversion table is represented using 16 bits, according to the ascending order of time t value successively as the address of memorizer I corresponding with time t in table_m5th decimal number of numerical value adopts four binary coded decimal binary-coded decimals to represent that a decimal numeral form is stored in the memory element of memorizer, detailed stored digital method and display circuit include BCD-seven-segment decoder/driver, current-limiting resistance, LED seven-segment numeric indicator method of attachment as previously mentioned.

Find by putting into practice, when tested sinusoidal current waveform signal amplitude reaches 1 just, 10, 100, 1000, 10000mv and with corresponding comparison voltage 1, 10, 100, 1000, 10000mv should respectively the 4th, five, six, seven, first outfan of eight circuit units produces, but because some reason such as temperature is waftd etc. without when producing the low level Square wave pulses being used as to determine scaling position, namely tested current sinusoidal waveshape signal amplitude and compare voltage when being in crossing critical point, the temperature drift of components and parts can make the display of arithmetic point deviation occur, unnecessary error result can be brought most probably to measurement.Such as, when a sine wave-shaped signal with 10mv amplitude arrives comparing voltage value 10mv time, first outfan U at the 5th circuit unit should be worked as₂₀Produce one be used as determine scaling position low level Square wave pulses, but cause error that this low level square wave cannot be produced due to " temperature is waftd ", U₂₀U is not arrived in output₄₀6 feet be used as determine that arithmetic point should be at the low level square-wave signal of ten positions, U₄₀7 feet just do not have high level signal to export U₃₄, make U₃₁Not having low level output, therefore arithmetic point just also can rest on the position of original position without the position moving to ten in good time, cause should be 10. ××s display but mistake become 1.0 ××s.In order to prevent this type of mistake from occurring, the scope making measurement not only to measure 10000mv by auto-changing " gear " from 1mv always, and arithmetic point in normal circumstances or tested sinusoidal current waveform signal amplitude with compare voltage be under the critical point state intersected also can be in good time, move into place accurately, be a significant separation according to the 318us above illustrated and when sampling time t is 318us its waveforms amplitude equal to the feature of comparing voltage value 10 times, namely when time t is 318us, sinusoidal wave form amplitude is 10.0264 times of comparing voltage value value, its scaling position is the position of ten, and sinusoidal wave form amplitude is 9.99509 times of comparing voltage value when time t is 319us, its scaling position is in the position of individual position, it is provided with above-mentioned time data decision circuitry especially.The Method And Principle of its setting is, the time data decision circuitry output high level when the time value that time data holding circuit keeps is less than 319us, and when the time value kept is more than or equal to 319us time data decision circuitry output low level, decimal number 319 is changed into the binary number 0000 of sixteen bit, 0001,0011,1111, when the lowest order from right to left in this sixteen-bit binary number, namely first play the 6th and the 9th high level occurs simultaneously, it is decimal number 319；It is attached according to the method in time data decision circuitry above, then coordinates with the circuit such as (2), (3), (4) in the 24th circuit unit, (5), ensure that arithmetic point correctly shows.Such as, time a foregoing sine wave-shaped signal with 10mv amplitude arrives comparing voltage value 10mv, first outfan U at the 5th circuit unit should be worked as₂₀Produce one be used as determine scaling position low level Square wave pulses, but cause error that this low level square wave cannot be produced due to " temperature is waftd ", U₂₀U is not arrived in output₄₀6 feet be used as determine that arithmetic point should be at the low level square-wave signal of ten positions, U₄₀7 feet just do not have high level signal to export U₃₄, make U₃₁Not having low level output, therefore arithmetic point just also can rest on the position of original position without the position moving to ten in good time；Owing to being provided with above-mentioned time data decision circuitry, amplitude be the sine wave-shaped signal and first of 10mv compare voltage 1mv can at second outfan D of the 4th circuit unit₁₅It is generated by U₂₆Then through by U after conditioning₂₉The time sharp, narrow of one high level of output catches pulse acquisition the sampling time t value necessarily 318us being maintained in time data holding circuit under the first effect keeping pulse or the value less than 318, and the t value that this is kept is by the output of time data decision circuitry, i.e. U₇₀Output high level determines the U of circuit to scaling position₃₇、U₃₈、U₃₉、U₉₀An input because the sine wave-shaped signal of amplitude 10mv is much larger than comparing voltage 1mv, so U₂₂The low level square-wave signal of output makes U₄₀2,3 foot set, U₄₀4 feet output high level to U₃₀Input and U₃₇Another input, now U₃₇An input also by U₇₀Have input high level so that U₃₇Outfan output high level to U₃₄And cause U₃₁Output low level is to priority encoder U₇₁12 feet, again through decoder U₇₅, depositor U₇₆Process after under the second effect keeping pulse, achieve arithmetic point from individual position to the automatic conversion of ten；U₇₀Although the high level of output is also input simultaneously to U₃₈、U₃₉、U₉₀An input, but because U₄₀7,13,9 feet do not export high level and to their another input thus be not activated, therefore U₃₂、U₃₃、U₉₁There is no output low level；Once time the sine wave-shaped signal of this 10mv amplitude only will be slightly greater than comparing voltage value 10mv, can at first outfan U of the 5th circuit unit₂₀Produce and export one to be used as to determine that the low level square-wave signal of scaling position is to U₄₀6 feet make its set, U₄₀7 feet output high level signals to U₃₄Another input, U₃₁Still output low level, arithmetic point is still in the position of ten so that tested sinusoidal current waveform signal amplitude and compare the situation of contingent arithmetic point transcription error when voltage is in crossing critical point and no longer occur.Second outfan D of the 5th circuit unit simultaneously₁₄It is generated by U₂₆Then through by U after conditioning₂₉Time sharp, narrow of second high level of output catches pulse and after having refreshed previous time t value, under the effect of the first maintenance pulse, time t value acquired for second pulse is maintained in time data holding circuit, sampling time t value now has been a time value much larger than 318, so U₇₀Output is a low level signal, U₃₇、U₃₈、U₃₉、U₉₀All blocked and inoperative.Other tested sinusoidal current waveform signal amplitude reaches 100,1000,10000mv and with corresponding comparison voltage 100,1000,10000mv be in crossing critical point time situation with aforesaid the same, its automatically process of conversion be not repeated to describe.

The measurement apparatus installed by method described in the utility model and requirement should be placed in the earth lead in the metallic shield casing of ground connection and on the electronic circuit board of device should by specifying appropriate ground connection in case external interference.The secondary current that input signal is Verification of Measuring Current Transformer of measurement apparatus through resistance convert to and filter, through electronic circuit, the sine wave-shaped signal and tested sinusoidal current waveform signal that harmonic wave interference etc. processes, its waveforms amplitude is proportional to primary current, this signal should use the signal shielding cable of shielding layer grounding and aviation connection-peg to be linked into the forward voltage follower U of measurement apparatus₁In-phase input end V_IN, it is recommended to use cable punching full-shield electronic current transducer secondary side filters the measurement sine wave-shaped signal of output after harmonic wave and interference etc. process through signal processing circuit.

In the circuit of this utility model device, amplifier U₁、U₂、U₃、U₄、U₅、U₆、U₉、U₁₀、U₁₁、U₁₂、U₁₃、U₁₀₀、U₁₀₁All connect ± 15V working power.In addition, the positive supply termination+5V working power of other amplifiers and integrated circuit, its negative power end or ground connection terminate digitally.In the circuit of this utility model device, C₁=C₂=C₃=C₄=C₅=C₂₀；C₇=C₉=C₁₁=C₁₂=C₁₃=C₂₁；C₈=C₁₀；C₁₄=C₁₅；R₁₂=R₁₃=R₁₄=R₁₅=R₁₆=R₁₇=R₁₈=R₁₉=R₂₀=R₂₁=R₆₀=R₆₁；R₂₃=R₂₅=R₂₇=R₂₉=R₃₁=R₆₃；R₂₄=R₂₆=R₂₈=R₃₀=R₃₂=R₆₂；R₃₄=R₃₆=R₃₈=R₃₉=R₄₀=R₆₄；R₃₅=R₃₇；R₄₁=R₄₂。

This utility model device and Verification of Measuring Current Transformer with the use of, the tested sinusoidal current waveform signal of Verification of Measuring Current Transformer secondary is linked into measurement apparatus forward voltage follower U₁In-phase input end V_IN.Under usual situation, when transformer reaches rated primary current, the maximum amplitude adjustment of the tested sinusoidal current waveform signal of its secondary is set as 10V.Now enumerating several example to explain: 1. when transformer rated primary current is for 10A, the maximum amplitude of the tested sinusoidal current waveform signal of its secondary is 10V, and its mutual inductor ratio is 1:1, and the digital-scroll technique circuit of device directly displays tested current value；2., when transformer rated primary current is 50A, the maximum amplitude of the tested sinusoidal current waveform signal of its secondary is 10V, and its mutual inductor ratio is 5:1, each I in aforementioned conversion table_mValue is all multiplied by 5 and the new I obtained_mValue is stored in memorizer in the same way, and the digital-scroll technique circuit of device also directly displays tested current value and need not be multiplied by no-load voltage ratio again；3. when transformer rated primary current is 1000A, the maximum amplitude of the tested sinusoidal current waveform signal of its secondary is 10V, can measure the electric current of 1A～more than 1000A: cancel the four, the nine circuit units after the circuit of device is done following a little little amendment；U₇₁11 foot reconfigurations to digitally；U₃₄An input, namely and U₃₇That end foot that outfan is connected connects digitally；Cut off U₇₉With R₆₅Connection, U₈₀Output pass through R₆₅It is connected to U₆₃Arithmetic point dp foot, accordingly, U₇₈、U₇₇、U₉₄Output be also moved to the left successively respectively through R₄₇、R₄₈、R₄₉It is connected to U₆₄、U₆₅、U₆₆Arithmetic point dp foot.So when the amplitude of the tested sinusoidal current waveform signal of secondary reaches more than 10mv, display primary current is more than 1A, when the amplitude of the tested sinusoidal current waveform signal of secondary reaches more than 100mv, display primary current is more than 10A, when the amplitude of the tested sinusoidal current waveform signal of secondary reaches 1000mv, more than 10000mv, display primary current is 100A, more than 1000A.1., 2. in measurement lower limit is transformer rated current 0.01%, degree of accuracy is better than 0.2%；3. the measurement lower limit in is the 0.1% of transformer rated current, and degree of accuracy is better than 0.2%；Visible, this utility model device and Verification of Measuring Current Transformer with the use of, its performance is better than the method and apparatus that electric current measured by present many applied current transformers.The application of this device is not only limited to these examples above-mentioned, and change is various for it, cannot all enumerate.This utility model can also be used for the measurement to power-frequency voltage.

Following time t value and sinusoidal wave form amplitude I_mValue conversion table is simple signal table.During as needed a complete conversion table, available measure equation calculates voluntarily.

t us	ImValue	t us	ImValue	t us	ImValue	t us	ImValue	t us	ImValue	t us	ImValue
												1	3183.0989	1008	3.211239	1996	1.704251	●●●	●●●●●●	3898	1.063075	4580	1.008769
2	1591.5495	1009	3.208164	1997	1.703512	3001	1.235786	3899	1.062954	4581	1.008727
												3	1061.0331	1010	3.205094	1998	1.702775	3002	1.235504	3900	1.062834	4582	1.008685
4	795.77493	●●●	●●●●●●	1999	1.702038	3003	1.235223	3901	1.062714	4583	1.008643
												5	636.62004	1130	2.876950	2000	1.701302	3004	1.234941	3902	1.062594	4584	1.008601
6	530.51680	1131	2.874514	2001	1.700566	3005	1.234660	3903	1.062474	4585	1.008560
												7	454.72878	1132	2.872083	2002	1.699832	3006	1.234380	●●●	●●●●●●	4586	1.008518
8	397.88778	1133	2.869655	●●●	●●●●●●	3007	1.234099	4010	1.050395	4587	1.008477
												9	353.67812	1134	2.867233	2222	1.555853	3008	1.233819	4011	1.050289	4588	1.008435
10	318.31041	1135	2.864814	2223	1.555271	3009	1.233539	4012	1.050183	4589	1.008394
												●●●	●●●●●●	1136	2.862400	2224	1.554689	3010	1.233259	4013	1.050078	●●●	●●●●●●
311	10.251347	1137	2.859991	2225	1.554108	●●●	●●●●●●	4014	1.049972	4801	1.001957 19 -->
												312	10.218595	1138	2.857585	2226	1.553528	3350	1.151236	4015	1.049866	4802	1.001938
313	10.186052	1139	2.855184	2227	1.552948	3351	1.151030	4016	1.049761	4803	1.001918
												314	10.153717	●●●	●●●●●●	2228	1.552368	3352	1.150824	4017	1.049656	4804	1.001899
315	10.121588	1506	2.194575	2229	1.551790	3353	1.150618	4018	1.049551	4805	1.001879
												316	10.089663	1507	2.193229	2230	1.551211	3354	1.150412	4019	1.049446	4806	1.001860
317	10.057939	1508	2.191885	2231	1.550634	3355	1.150207	●●●	●●●●●●	4807	1.001841
												318	10.026415	1509	2.190542	●●●	●●●●●●	3356	1.150002	4328	1.022706	4808	1.001822
319	9.995089	1510	2.189202	2506	1.411555	3357	1.149797	4329	1.022637	4809	1.001803
												320	9.963959	1511	2.187864	2507	1.411114	3358	1.149592	4330	1.022569	4810	1.001784
●●●	●●●●●●	1512	2.186527	2508	1.410673	3359	1.149387	4331	1.022500	●●●	●●●●●●
												622	5.150236	1513	2.185192	2509	1.410232	●●●	●●●●●●	4332	1.022432	4983	1.000014
623	5.142075	1514	2.183859	2510	1.409792	3529	1.117187	4333	1.022363	4984	1.000013
												624	5.133940	1515	2.182528	2511	1.409352	3530	1.117012	4334	1.022295	4985	1.000011
625	5.125831	●●●	●●●●●●	2512	1.408912	3531	1.116837	4335	1.022227	4986	1.000010
												626	5.117748	1805	1.861669	2513	1.408473	3532	1.116663	4336	1.022159	4987	1.000008
627	5.109692	1806	1.860751	2514	1.408034	3533	1.116489	4337	1.022091	4988	1.000007
												628	5.101661	1807	1.859834	2515	1.407596	3534	1.116315	●●●	●●●●●●	4989	1.000006
629	5.093656	1808	1.858919	●●●	●●●●●●	3535	1.116141	4500	1.012465	4990	1.000005
												630	5.085676	1809	1.858004	2801	1.297499	3536	1.115967	4501	1.012415	4991	1.000004
631	5.077722	1810	1.857091	2802	1.297162	3537	1.115793	4502	1.012365	4992	1.000003
												●●●	●●●●●●	1811	1.856178	2803	1.296826	3538	1.115620	4503	1.012314	4993	1.000002
1001	3.232942	1812	1.855267	2804	1.296489	●●●	●●●●●●	4504	1.012264	4994	1.000002
												1002	3.229823	1813	1.854357	2805	1.296154	3892	1.063800	4505	1.012215	4995	1.000001
1003	3.226710	1814	1.853447	2806	1.295818	3893	1.063679	4506	1.012165	4996	1.000001
												1004	3.223603	●●●	●●●●●●	2807	1.295483	3894	1.063558	4507	1.012115	4997	1.000000
1005	3.220503	1993	1.706471	2808	1.295148	3895	1.063437	4508	1.012065	4998	1.000000
												1006	3.217409	1994	1.705730	2809	1.294813	3896	1.063316	4509	1.012016	4999	1.000000
1007	3.214321	1995	1.704990	2810	1.294478	3897	1.063195	●●●	●●●●●●	5000	1.000000

Claims (3)

1. the measurement apparatus of a power current, the secondary current that input signal is Verification of Measuring Current Transformer of this measurement apparatus through resistance convert to and through electronic circuit filter harmonic wave interference process, its waveforms amplitude sine wave-shaped signal proportional to primary current, also referred to as tested sinusoidal current waveform signal, it is characterised in that: it includes a preposition voltage follower；The time producing time counting starting impulse during one sine wave-shaped signal zero passage starts module, its output time starting impulse；One sine wave-shaped signal arrives comparing voltage value I_bjTime produce the time intercept and capture pulse time interception module, its output time intercept and capture pulse；And one by time starting impulse and time intercept and capture pulse controlled, be used for sampling time t value when arriving comparing voltage value after obtaining tested sinusoidal current waveform signal zero passage and this sampling time t value directly read the time data application module of the respective stored data in this memorizer as the address of the memorizer being connected with this module；

Wherein, the voltage follower U of forward voltage follower it is made up of an amplifier OP-07₁, one by the secondary current of Verification of Measuring Current Transformer through resistance convert to and through filtering harmonic wave interference and processing, its waveforms amplitude sine wave-shaped signal proportional to primary current, also referred to as tested sinusoidal current waveform signal, be input to U₁In-phase input end V_IN, U₁Inverting input be connected with its outfan, its outfan output signal be divided into six tunnels, be respectively outputted to the amplifier U in first, fourth, five, six, seven, eight circuit units₉、U₁₃、U₁₂、U₁₁、U₁₀、U₁₀₁In-phase input end；

Time starts module and includes first, second and third circuit unit；

First circuit unit is to be made up of the voltage comparator circuit with open-loop gain an amplifier OP-37 and be followed by Transistor-Transistor Logic level conversion interface circuit again the circuit unit of the square wave differential of high level and output, and OP-37 is as voltage comparator U₉, its connection is, voltage follower U₁Outfan and resistance R₁₂One end be connected, resistance R₁₂The other end and U₉In-phase input end be connected, resistance R₁₃The other end and U₉Inverting input be connected, U₉Outfan and resistance R₂₃One end be connected, R₂₃The other end and R₂₄One end be connected, R₂₄The other end connect simulation ground, electric capacity C₁And R₂₄Parallel connection, C₁And R₂₄The filter capacity accessing use energy intensifier circuit in parallel, R₂₃The other end also and have the NAND gate U of Schmidt trigger₁₄Two inputs be connected, diode D₁Input and U₁₄Two inputs be connected, its outfan connection+5v, diode D₂Outfan connect D₁Input, D₂Input connect digitally, U₁₄Outfan and NAND gate U₁₅Two inputs be connected, the first circuit unit has two outfans, U₁₅Outfan be first outfan of the first circuit unit, the Square wave pulses of the high level of its output is divided into two-way, and a road exports be sequentially connected with four enumerators in the 20th circuit unit as time starting impulseBe sequentially connected with four depositors in end and the 21st circuit unitEnd, another road exports electric capacity C₇One end, C₇The other end and resistance R₃₄One end be connected, R₃₄The other end connect digitally, C₇The other end also with diode D₁₁Input be connected, D₁₁Outfan be second outfan of the first circuit unit, its high level Square wave pulses differential, D₁₁U in outfan and third circuit unit₂₅In-phase input end be connected；Third circuit unit output is reset pulse, for the reset of scaling position；

Second circuit unit is that a zero-point voltage adjusts circuit unit, and amplifier OP-07 is as the voltage follower U in this circuit₂, U₂Outfan as the outfan of circuit unit；Its connection is, adjustable resistance R₁One end connection+15v, other end connection-15v, adjustable end connect resistance R₂One end, R₂The other end connect resistance R₃One end, R₃The other end connect simulation ground, R₂The other end also and U₂In-phase input end be connected, its inverting input is connected with outfan, its outfan and resistance R₁₃One end be connected；

Third circuit unit is second outfan of the first circuit unit, i.e. diode D₁₁The reset pulse passing through differential of output is again and U₂₅Inverting input on adjustment voltage compare, thus at U₂₅Outfan obtain high level more acute, narrow pulse, this pulse is through the outfan of third circuit unit, i.e. phase inverter U₂₇Anti-phase output after become low level point, the narrow reset pulse resetted for scaling position, its connection is, D₁₁Outfan and resistance R₃₅One end be connected, R₃₅The other end connect digitally, electric capacity C₈And R₃₅Parallel connection, C₈And R₃₅The filter capacity accessing use energy intensifier circuit in parallel, D₁₁Outfan also and U₂₅In-phase input end be connected, U₂₅It is an amplifier OP-37, voltage reference integrated circuit U₇The adjustment voltage for adjusting pulse width of output is by voltage follower U₂₄And resistance R₃₃And U₂₅Inverting input be connected, U₂₅Outfan and electric capacity C₁₄One end be connected, C₁₄The other end and resistance R₄₁One end be connected, R₄₁The other end connect digitally, C₁₄The other end also with phase inverter U₂₇Input be connected, U₂₇Outfan as first four S-R latch U in the outfan of third circuit unit and the 24th circuit unit₄₀FourEnd, i.e. 1,5,10,14 feet and second four S-R latch U₉₃OneEnd, i.e. 1 foot are connected；

Time interception module includes fourth, fifth, six, seven, eight, nine, ten, 11,12,13,14,15,16 circuit units；

4th, five, six, seven, eight circuit units are circuit structures, the components and parts model used, duplicate five the voltage comparator circuit unit of parameter, it is made up of the voltage comparator circuit with open-loop gain respectively amplifier OP-37 and is followed by Transistor-Transistor Logic level conversion interface circuit again the circuit unit of the square wave differential of high level and output, and each circuit unit of five circuit units has two outfans, first outfan of circuit unit is the outfan of first NAND gate having Schmidt trigger in the circuit unit of place respectively, the low level Square wave pulses of its output is divided into two-way, one road is used as to determine the signal of scaling position, it is connected respectively to two 7,4LS,279 tetra-S-R latch U in the 24th circuit unit₄₀And U₉₃In corresponding fiveEnd, i.e. set end, another road is connected to two inputs of next NAND gate；Second outfan of circuit unit is the outfan of last diode in the circuit unit of place respectively, and its output is time of high level to intercept and capture spike, and is all connected with the in-phase input end of amplifier in the 16th circuit unit；The NAND gate having Schmidt trigger in circuit is 74LS132, and it includes U₁₄、U₁₅、U₁₆、U₁₇、U₁₈、U₁₉、U₂₀、U₂₁、U₂₂、U₂₃、U₁₀₂、U₁₀₃；The connection of the 4th circuit unit is, voltage follower U₁Outfan and resistance R₂₀One end be connected, resistance R₂₀The other end and U₁₃In-phase input end be connected, resistance R₂₁The other end and U₁₃Inverting input be connected, U₁₃Outfan and resistance R₃₁One end be connected, R₃₁The other end and R₃₂One end be connected, R₃₂The other end connect simulation ground, electric capacity C₅And R₃₂Parallel connection, C₅And R₃₂In parallel access use can the filter capacity of intensifier circuit, similar electric capacity and resistance be connected in parallel on the five, the six, seven, eight circuit units also have, act on identical, no longer illustrate, R₃₁The other end also and U₂₂Two inputs be connected, diode D₉Input and U₂₂Two inputs be connected, its outfan connect+5v power supply, diode D₁₀Outfan connect D₉Input, D₁₀Input connect digitally, U₂₂Outfan be first outfan of the 4th circuit unit, the low level Square wave pulses of its output is divided into two-way, and a road is used as to determine and is connected to U by the signal of scaling position₄₀In 2,3 feet, another road is connected to U₂₃Two inputs；U₂₃Outfan and electric capacity C₁₃One end be connected, C₁₃The other end and resistance R₄₀One end be connected, R₄₀The other end connect digitally, C₁₃The other end also with diode D₁₅Input be connected, D₁₅Outfan be second outfan of the 4th circuit unit, its output is time of high level to intercept and capture spike, itself and U in the 16th circuit unit₂₆In-phase input end be connected；The connection of the 5th circuit unit is, voltage follower U₁Outfan and resistance R₁₈One end be connected, resistance R₁₈The other end and U₁₂In-phase input end be connected, resistance R₁₉The other end and U₁₂Inverting input be connected, U₁₂Outfan and resistance R₂₉One end be connected, R₂₉The other end and R₃₀One end be connected, R₃₀The other end connect simulation ground, electric capacity C₄And R₃₀Parallel connection, R₂₉The other end also and U₂₀Two inputs be connected, diode D₇Input and U₂₀Two inputs be connected, its outfan connect+5v power supply, diode D₈Outfan connect D₇Input, D₈Input connect digitally, U₂₀Outfan be first outfan of the 5th circuit unit, the low level Square wave pulses of its output is divided into two-way, and a road is used as to determine and is connected to U by the signal of scaling position₄₀In 6 feet, another road is connected to U₂₁Two inputs；U₂₁Outfan and electric capacity C₁₂One end be connected, C₁₂The other end and resistance R₃₉One end be connected, R₃₉The other end connect digitally, C₁₂The other end also with diode D₁₄Input be connected, D₁₄Outfan be second outfan of the 5th circuit unit, its output is time of high level to intercept and capture spike, itself and U in the 16th circuit unit₂₆In-phase input end be connected；The connection of the 6th circuit unit is, voltage follower U₁Outfan and resistance R₁₆One end be connected, resistance R₁₆The other end and U₁₁In-phase input end be connected, resistance R₁₇The other end and U₁₁Inverting input be connected, U₁₁Outfan and resistance R₂₇One end be connected, R₂₇The other end and R₂₈One end be connected, R₂₈The other end connect simulation ground, electric capacity C₃And R₂₈Parallel connection, R₂₇The other end also and U₁₈Two inputs be connected, diode D₅Input and U₁₈Two inputs be connected, its outfan connect+5v power supply, diode D₆Outfan connect D₅Input, D₆Input connect digitally, U₁₈Outfan be first outfan of the 6th circuit unit, the low level Square wave pulses of its output is divided into two-way, and a road is used as to determine and is connected to U by the signal of scaling position₄₀In 15 feet, another road is connected to U₁₉Two inputs；U₁₉Outfan and electric capacity C₁₁One end be connected, C₁₁The other end and resistance R₃₈One end be connected, R₃₈The other end connect digitally, C₁₁The other end also with diode D₁₃Input be connected, D₁₃Outfan be second outfan of the 6th circuit unit, its output is time of high level to intercept and capture spike, itself and U in the 16th circuit unit₂₆In-phase input end be connected；The connection of the 7th circuit unit is, voltage follower U₁Outfan and resistance R₁₄One end be connected, resistance R₁₄The other end and U₁₀In-phase input end be connected, resistance R₁₅The other end and U₁₀Inverting input be connected, U₁₀Outfan and resistance R₂₅One end be connected, R₂₅The other end and R₂₆One end be connected, R₂₆The other end connect simulation ground, electric capacity C₂And R₂₆Parallel connection, R₂₅The other end also and U₁₆Two inputs be connected, diode D₃Input and U₁₆Two inputs be connected, its outfan connect+5v power supply, diode D₄Outfan connect D₃Input, D₄Input connect digitally, U₁₆Outfan be first outfan of the 7th circuit unit, the low level Square wave pulses of its output is divided into two-way, and a road is used as to determine and is connected to U by the signal of scaling position₄₀In 11,12 feet, another road is connected to U₁₇Two inputs；U₁₇Outfan and electric capacity C₉One end be connected, C₉The other end and resistance R₃₆One end be connected, R₃₆The other end connect digitally, C₉The other end also with diode D₁₂Input be connected, D₁₂Outfan be second outfan of the 7th circuit unit, its output is time of high level to intercept and capture spike, itself and U in the 16th circuit unit₂₆In-phase input end be connected；The connection of the 8th circuit unit is, voltage follower U₁Outfan and resistance R₆₀One end be connected, resistance R₆₀The other end and U₁₀₁In-phase input end be connected, resistance R₆₁The other end and U₁₀₁Inverting input be connected, U₁₀₁Outfan and resistance R₆₃One end be connected, R₆₃The other end and R₆₂One end be connected, R₆₂The other end connect simulation ground, electric capacity C₂₀And R₆₂Parallel connection, R₆₃The other end also and U₁₀₂Two inputs be connected, diode D₂₀Input and U₁₀₂Two inputs be connected, its outfan connect+5v power supply, diode D₂₁Outfan connect D₂₀Input, D₂₁Input connect digitally, U₁₀₂Outfan be first outfan of the 8th circuit unit, the low level Square wave pulses of its output is divided into two-way, and a road is used as to determine and is connected to U by the signal of scaling position₉₃In 2,3 feet, another road is connected to U₁₀₃Two inputs；U₁₀₃Outfan and electric capacity C₂₁One end be connected, C₂₁The other end and resistance R₆₄One end be connected, R₆₄The other end connect digitally, C₂₁The other end also with diode D₂₂Input be connected, D₂₂Outfan be second outfan of the 8th circuit unit, its output is time of high level to intercept and capture spike, itself and U in the 16th circuit unit₂₆In-phase input end be connected；

Nine, the ten, 11,12, ten three-circuit unit are the output circuit of the comparison voltage being made up of as voltage follower divider resistance and amplifier OP-07 respectively, and its connection is, the resistance R of the 9th circuit unit₁₀One end and voltage reference integrated circuit AD581, i.e. U₈Outfan V_outIt is connected, R₁₀The other end and resistance R₁₁One end be connected, R₁₁The other end connect simulation ground, R₁₀The other end also and U₆In-phase input end be connected, U₆Inverting input be connected with outfan, U₆Outfan output first compare voltage 1mv, its outfan and the resistance R in the 4th circuit unit₂₁One end be connected；The resistance R of the tenth circuit unit₈One end and U₈Outfan V_outIt is connected, R₈The other end and resistance R₉One end be connected, R₉The other end connect simulation ground, R₈The other end also and U₅In-phase input end be connected, U₅Inverting input be connected with outfan, U₅Outfan output second compare voltage 10mv, its outfan and the resistance R in the 5th circuit unit₁₉One end be connected；The resistance R of the 11st circuit unit₆One end and U₈Outfan V_outIt is connected, R₆The other end and resistance R₇One end be connected, R₇The other end connect simulation ground, R₆The other end also and U₄In-phase input end be connected, U₄Inverting input be connected with outfan, U₄Outfan output the 3rd compare voltage 100mv, its outfan and the resistance R in the 6th circuit unit₁₇One end be connected；The resistance R of the 12nd circuit unit₄One end and U₈Outfan V_outIt is connected, R₄The other end and resistance R₅One end be connected, R₅The other end connect simulation ground, R₄The other end also and U₃In-phase input end be connected, U₃Inverting input be connected with outfan, U₃Outfan output the 4th compare voltage 1v, its outfan and the resistance R in the 7th circuit unit₁₅One end be connected；The U of the tenth three-circuit unit₁₀₀In-phase input end and U₈Outfan V_outIt is connected, U₁₀₀Inverting input be connected with outfan, U₁₀₀Outfan output the 5th compare voltage 10v, its outfan and the resistance R in the 8th circuit unit₆₁One end be connected；

14th circuit unit is by MC1403 voltage reference integrated circuit U₇With adjustable resistance R₂₂, electric capacity C₆And two amplifier OP-07 are as the U of voltage follower₂₄、U₈₁With resistance R₃₃、R₅₈Constitute, U₇The voltage of output is divided into two-way, respectively through U₂₄And resistance R₃₃、U₈₁And resistance R₅₈Being input in the three, the 16 circuit units the inverting input of amplifier, its connection is, U₇1 foot connect+5v power supply, 3 feet connect digitally, electric capacity C₆One end connect U₇2 feet, the other end connect digitally, adjustable resistance R₂₂One end connect U₇2 feet, the other end connect digitally, R₂₂Adjustable end connect U₂₄In-phase input end, U₂₄Inverting input be connected with outfan, its outfan connect resistance R₃₃One end, R₃₃The other end connect U in third circuit unit₂₅Inverting input, R₂₂Adjustable end be also connected with U₈₁In-phase input end, U₈₁Inverting input be connected with outfan, its outfan connect resistance R₅₈One end, R₅₈The other end connect U in the 16th circuit unit₂₆Inverting input；R₂₂The voltage of adjustable end output be called adjustment voltage, the pulse for the three, the 16 circuit units outputs carries out the adjustment of pulse width；

15th circuit unit is model is the voltage reference integrated circuit U of AD581₈, its power end+V_SConnecing+15v power supply, earth terminal connects simulation ground, outfan V_OUTExport stable 10v reference voltage be connected respectively to the nine, the ten, 11, resistance R in 12 circuit units₁₀、R₈、R₆And R₄One end, the U of the tenth three-circuit unit₁₀₀In-phase input end and U₈Outfan V_OUTIt is connected；

16th circuit unit is the circuit of output after the signal of second outfan output of fourth, fifth, six, seven, eight circuit units is adjusted again, its output be one, be at most more acute, narrow time of five and intercept and capture pulse or train of pulse, the outfan of this circuit unit and the CP end of the 21st circuit unit are connected；Its connection is, D₁₅、D₁₄、D₁₃、D₁₂、D₂₂Outfan be connected to U₂₆In-phase input end, resistance R₃₇One end connect U₂₆In-phase input end, the other end connect digitally, electric capacity C₁₀And R₃₇Parallel connection, C₁₀And R₃₇The filter capacity accessing use energy intensifier circuit in parallel, U₂₆It is an amplifier OP-37, voltage reference integrated circuit U₇The adjustment voltage for adjusting pulse width of output is by voltage follower U₈₁And resistance R₅₈And U₂₆Inverting input be connected, from D₁₅、D₁₄、D₁₃、D₁₂、D₂₂The time passing through differential exported respectively intercepts and captures pulse and passes through again U₂₆In-phase input end and inverting input on, via voltage follower U₈₁And resistance R₅₈The adjustment voltage of input compares, thus at U₂₆Outfan obtain more acute, narrower time and intercept and capture pulse, U₂₆Outfan and electric capacity C₁₅One end be connected, C₁₅The other end and resistance R₄₂One end be connected, R₄₂The other end connect digitally, C₁₅The other end also with phase inverter U₂₈Input be connected, U₂₈Outfan and phase inverter U₂₉Input be connected, U₂₉Outfan be connected as the 11st foot CP end of the outfan of the 16th circuit unit and four depositors being sequentially connected with of the 21st circuit unit；

Time data application module, it is intercepted and captured Pulse Width Control by time starting impulse and time, it is used to after obtaining tested sinusoidal current waveform zero passage to arrive sampling time t value when comparing voltage and this sampling time t value is directly read the application module of storage data in the memorizer appropriate address being connected with this module, the memorizer being connected with this module employing electrically erasable programmable ROM EEPROM as storage address；This application module includes the 17th, 18,19,20,21,22,23,24,25 circuit units；

17th circuit unit is the first maintenance impulse circuit, is 74L,S08 42 input and door U₅₁In a gate circuit, one input, i.e. U₅₁1 foot and the 20th circuit unit the output of 16 data output ends 16 bits in the 11st, i.e. U₄₃12 feet be connected, another input, i.e. U₅₁2 feet and 16 bits in the 13rd, i.e. U₄₄14 feet be connected, the outfan of the 17th circuit unit, i.e. U₅₁3 feet time counting circuit start counting after 5120us time output first maintenance pulse, its output is divided into two-way, four depositor U being sequentially connected with that a road is input in the 22nd circuit unit₅₃、U₅₄、U₅₅And U₅₆11 feet, another road is input to an input of the 18th circuit unit, i.e. U₅₁4 feet；

18th circuit unit is the second maintenance impulse circuit, is U₅₁In another gate circuit, one input, i.e. U₅₁4 feet and U₅₁3 feet be connected, another input, i.e. U₅₁5 feet and the 20th circuit unit the output of 16 data output ends 16 bits in the 8th, i.e. U₄₂11 feet be connected, the outfan of the 18th circuit unit, i.e. U₅₁6 feet time counting circuit start counting after 5248us time output second maintenance pulse, second keep pulse be input to two 4 bidirectional shift register U in the 24th circuit unit₇₆And U₉₅11 feet；

First keeps impulse circuit and second to keep impulse circuit to be to temporary sampling time data and arithmetic point information at least be kept the time of 20ms, i.e. a cycle arrange；

19th circuit unit is 10MHZ pulses generation and very frequency circuit, and its connection is, 74LS04 hex inverter U₄₆The 1st, connect resistance R between 2 feet₅₅, the 3rd, connect R between 4 feet₅₆, the 2nd, connect C between 3 feet₁₇, the 1st, connect 10MHZ crystal oscillator between 4 feet, the 2nd foot and the 13rd foot are connected, the 12nd foot and 74LS160 decimal scale coincidence counter U₄₅The 2nd foot CP end be connected, U₄₅The 1st, 7,9 and 10 feet by resistance R₅₄Being connected with+5V power supply, the 15th foot output 10MHZ 1MHZ pulse after very frequency, namely every microsecond is 1 pulse, U₄₅The output of the 15th foot be connected to the 2nd foot CP end of four coincidence counters of the 20th circuit unit；

20th circuit unit is by four 74LS161 tetrad coincidence counter U₄₁、U₄₂、U₄₃、U₄₄16 binary time pulse counting circuits of be connected in sequence, its output be one by zero, be incremented by 16 bits of 1us every time；Its connection is, U₄₁The 15th foot connect U₄₂The 10th foot, U₄₂The 15th foot connect U₄₃The 10th foot, U₄₃The 15th foot connect U₄₄The 10th foot, the 2nd foot CP end and U of four enumerators₄₅The 15th foot be connected, the 7th of four enumerators the, 9 feet and U₄₁The 10th foot by resistance R₅₄It is connected with+5V power supply, the 1st foot of four enumeratorsEnd and first outfan of the first circuit unit, i.e. U₁₅Outfan be connected, U₄₁The 14th foot be the lowest order of this 16 bit, U₄₄The 11st foot be the highest order of this 16 bit, four enumerators totally 16 data output ends connect one to one 16 data input pins of the 21st circuit unit, namely U₄₁、U₄₂、U₄₃、U₄₄The 14th of each enumerator, 13,12,11 feet one_to_one corresponding successively access U₄₇、U₄₈、U₄₉、U₅₀The 3rd of each depositor, 4,5,6 feet；

21st circuit unit is by four 74LS194 i.e. 4 bidirectional shift register U₄₇、U₄₈、U₄₉、U₅₀Be sequentially connected with and being incorporated to-and going out the time data buffering circuit that mode works, its 4 bidirectional shift registers can also adopt eight d type flip flop IC chips to replace；Its connection is, four depositor U₄₇、U₄₈、U₄₉、U₅₀The 1st footEnd and first outfan of the first circuit unit, i.e. U₁₅Outfan be connected, four depositor U₄₇、U₄₈、U₄₉、U₅₀The 11st foot CP end and the outfan of the 16th circuit unit of time interception module, i.e. U₂₉Outfan be connected, 16 data input pin one_to_one corresponding of totally 16 data output ends and the 22nd circuit unit of four depositors are connected, namely U₄₇、U₄₈、U₄₉、U₅₀The 15th of each depositor, 14,13,12 feet one_to_one corresponding successively access U₅₃、U₅₄、U₅₅、U₅₆The 3rd of each depositor, 4,5,6 feet, the 9th of four depositors the, 10 feet connect resistance R₅₃One end, resistance R₅₃The other end and+5V power supply connect, R₅₃One end by electric capacity C₁₆Connect digitally；

22nd circuit unit is by four 74LS194 i.e. 4 bidirectional shift register U₅₃、U₅₄、U₅₅、U₅₆Be sequentially connected with and being incorporated to-and going out the time data holding circuit that mode works, its 4 bidirectional shift registers can also adopt eight d type flip flop IC chips to replace；Its connection is, four depositor U₅₃、U₅₄、U₅₅、U₅₆The 1st footEnd, 9,10 feet and resistance R₅₃One end be connected, R₅₃The other end and+5V power supply connect, R₅₃One end by electric capacity C₁₆Connect digitally；11st foot CP end and the outfan of the 17th circuit unit, i.e. U of four depositors₅₁3 feet be connected, front 13 outfans in 16 data output ends of four depositors, namely from U₅₃The 15th foot rise, according to priority, the 14th, 13,12 feet, connecing down is U₅₄The 15th, 14,13,12 feet, then to connect down be U₅₅The 15th, 14,13,12 feet, be finally U₅₆The 15th foot, respectively successively with the 20th three-circuit unit, i.e. (1st) individual memorizer U₅₇, (2nd) individual memorizer U₅₈13 address wire A in parallel₀～A₁₂One_to_one corresponding is connected；

20th three-circuit unit is arranged to the programmable read only memory EEPROM2864 of 8K × 8 of two address wires parallel connections of read-only working method, has adopted the form of four binary-decimal binary-coded decimals to be stored in H I in conversion table in the memory element of two memorizeies_mValue；Its connection is, U₅₇And U₅₈The 20th, 22 feet are by resistance R₅₂Connect digitally, U₅₇And U₅₈The 27th foot by resistance R₅₁Connect+5V power supply, U₅₇And U₅₈13 address wire A in parallel₀～A₁₂Successively with 16 data output ends of the 22nd circuit unit in before 13 outfans, i.e. U₅₃、U₅₄、U₅₅15,14,13,12 foot and U₅₆15 foot one_to_one corresponding be connected, U₅₇And U₅₈The data wire I/O of two memorizeies₀～I/O₇Totally 16 articles are connected with the 25th circuit unit；

24th circuit unit is arithmetic point automatic switching circuit unit, including (1) time data decision circuitry, its 22nd circuit unit, i.e. time data holding circuit export and the time data that keeps more than or equal to 319us time output low level；(2) scaling position determines circuit；(3) 8 line-3 line priority encoding output circuits；(4) 3 line-8 line decoding output circuits；(5) arithmetic point keeps and output driving circuit；

The concrete wiring of the 24th circuit unit is: (1) time data decision circuitry, its the 22nd circuit unit, i.e. time data holding circuit export and the time data that keeps more than or equal to 319us time output low level, its circuit is by first 42 input or door integrated circuit U₅₂, first 42 input and door integrated circuit U₆₇, second 42 input and door integrated circuit U₆₈, second 42 input or door integrated circuit U₆₉With a phase inverter U₇₀Constitute, first depositor U of the 22nd circuit unit₅₃15,14,13,12 feet, namely corresponding to the address end foot A of memorizer₀、A₁、A₂、A₃Successively with first 42 input and door integrated circuit U₆₇1,2,4,5 feet be connected, second depositor U₅₄15,14,13,12 feet, namely corresponding to the address end foot A of memorizer₄、A₅、A₆、A₇Successively with first 42 input and door integrated circuit U₆₇12,13 feet and first 42 input or door integrated circuit U₅₂1,2 feet be connected, the 3rd depositor U₅₅15,14,13,12 feet, namely corresponding to the address end foot A of memorizer₈、A₉、A₁₀、A₁₁Successively with second 42 input and door integrated circuit U₆₈1 foot, first 42 input or door integrated circuit U₅₂4,5,12 feet be connected, the 4th depositor U₅₆15 feet, namely corresponding to the address end foot A of memorizer₁₂And U₅₆14 feet successively with first 42 input or door integrated circuit U₅₂13 feet, second 42 input or door integrated circuit U₆₉10 feet be connected, first 42 input or door integrated circuit U₅₂3 feet and second 42 input or door integrated circuit U₆₉1 foot be connected, first 42 input or door integrated circuit U₅₂6 feet and 9 feet be connected, 10 feet and 11 feet are connected, first 42 input or door integrated circuit U₅₂8 feet and second 42 input or door integrated circuit U₆₉5 feet be connected, first 42 input with door integrated circuit U₆₇3 feet and 10 feet be connected, 6 feet and 9 feet are connected, first 42 input with door integrated circuit U₆₇8,11 feet successively with second 42 input with door integrated circuit U₆₈5,4 feet be connected, second 42 input with door integrated circuit U₆₈2,3,6 feet successively with second 42 input or door integrated circuit U₆₉3,4,2 feet be connected, second 42 input or door integrated circuit U₆₉6 feet and 9 feet be connected, second 42 input or door integrated circuit U₆₉8 feet and phase inverter U₇₀Input be connected, phase inverter U₇₀Outfan as time data decision circuitry outfan respectively with first in scaling position decision circuitry and door U₃₇, second and door U₃₈, the 3rd with door U₃₉With the 4th and door U₉₀An input be connected, phase inverter U₇₀Outfan the data output end of time data holding circuit unit export and the time data that keeps more than or equal to 319us time output low level, or in other words, the phase inverter U when time data is less than 319us₇₀Outfan output high level；

(2) scaling position determines that circuit is by the first phase inverter U₃₀, the second phase inverter U₃₁, the 3rd phase inverter U₃₂, the 4th phase inverter U₃₃, the 5th phase inverter U₉₁, first or door U₃₄, second or door U₃₅, the 3rd or door U₃₆, the 4th or door U₉₂, first and door U₃₇, second and door U₃₈, the 3rd with door U₃₉, the 4th with door U₉₀With first four S-R latch U₄₀With second four S-R latch U₉₃Constituting, the concrete connection of its circuit is, U₂₂Outfan and U₄₀2,3 feet be connected, U₂₀Outfan and U₄₀6 feet be connected, U₁₈Outfan and U₄₀15 feet be connected, U₁₆Outfan and U₄₀11,12 feet be connected, U₁₀₂Outfan and U₉₃2,3 feet be connected, phase inverter U₂₇Outfan and U₄₀1,5,10,14 foot and U₉₃1 foot be connected, U₇₀Outfan respectively with first with door U₃₇, second and door U₃₈, the 3rd with door U₃₉With the 4th and door U₉₀An input be connected, U₄₀4 feet and U₃₀Input and U₃₇Another input be connected, U₃₀Outfan and U₇₁11 feet be connected, U₃₇Outfan and U₃₄An input be connected, U₄₀7 feet and U₃₄Another input and U₃₈Another input be connected, U₃₄Outfan and U₃₁Input be connected, U₃₁Outfan and U₇₁12 feet be connected, U₃₈Outfan and U₃₅An input be connected, U₄₀13 feet and U₃₅Another input and U₃₉Another input be connected, U₃₅Outfan and U₃₂Input be connected, U₃₂Outfan and U₇₁13 feet be connected, U₃₉Outfan and U₃₆An input be connected, U₄₀9 feet and U₃₆Another input and U₉₀Another input be connected, U₃₆Outfan and U₃₃Input be connected, U₃₃Outfan and U₇₁1 foot be connected, U₉₀Outfan and U₉₂An input be connected, U₉₃4 feet and U₉₂Another input be connected, U₉₂Outfan and U₉₁Input be connected, U₉₁Outfan and U₇₁2 feet be connected；

(3) 8 line-3 line priority encoding output circuits are by 74LS148 priority encoder U₇₁, phase inverter U₇₂、U₇₃And U₇₄Constituting, its connection is, U₇₁11,12,13,1,2 feet successively with U₃₀、U₃₁、U₃₂、U₃₃、U₉₁Outfan be connected, 5,10 feet connect digitally, and 6,7,9 feet are sequentially connected with U₇₂、U₇₃And U₇₄Input, U₇₂、U₇₃And U₇₄Outfan be sequentially connected with U₇₅3,2,1 foot；

(4) 3 line-8 line decoding output circuits are by 74LS138 decoder U₇₅Constituting, its connection is, 5,4 feet connect digitally, and 6 feet pass through resistance R₅₇Connecting+5V power supply, 14,13,12,11 feet connect U respectively₇₆3,4,5,6 feet, its 10 foot connect U₉₅3 feet；

(5) arithmetic point maintenance and output driving circuit are by two 4 bidirectional shift register 74LS194, i.e. U₇₆、U₉₅And 74LS07 buffering/driving gate circuit U₇₇、U₇₈、U₇₉、U₈₀And U₉₄Constituting, its connection is, U₇₆、U₉₅1,9,10 feet by resistance R₅₇Connect+5V power supply, U₇₆、U₉₅11 feet and U₅₁6 feet be connected, U₇₆15,14,13,12 feet respectively corresponding to buffering/driving gate circuit U₇₉、U₈₀、U₇₈、U₇₇Input be connected, U₇₉、U₈₀、U₇₈、U₇₇Outfan respectively through resistance R₆₅、R₄₇、R₄₈、R₄₉Represent successively, ten, hundred, arithmetic point display position dp in the LED seven-segment display of kilobit be connected, U₉₅15 feet and buffering/driving gate circuit U₉₄Input be connected, U₉₄Outfan by resistance R₅₀D with display myriabit arithmetic point₁₆It is connected, D₁₆It it is LED；U₅₁6 feet time counting circuit start counting after the 5248th us time can export a pulse, the rising edge of this pulse can through U₇₁、U₇₅The unique arithmetic point signal obtained after process sends display；

25th circuit unit is digital-scroll technique circuit, and for the value of the tested electric current of instant playback, the data port line I/O of its memorizer in parallel with two address wires of the 20th three-circuit unit is connected.

2. the measurement apparatus of a kind of power current according to claim 1, it is characterised in that: described 25th circuit unit adopts LED seven-segment numeric indicator or liquid crystal display.

3. the measurement apparatus of a kind of power current according to claim 1, it is characterised in that: in described time data decision circuitry two input with door and two input or door can by three input, four input with door and three input, four input or door replace.