CN205305192U

CN205305192U - Energy -conserving circuit of new efficiency standard of ultralow stand -by power consumption of high power factor

Info

Publication number: CN205305192U
Application number: CN201521028180.0U
Authority: CN
Inventors: 高波
Original assignee: Gardenia Ind Ltd
Current assignee: Gardenia Ind Ltd
Priority date: 2015-12-11
Filing date: 2015-12-11
Publication date: 2016-06-08
Anticipated expiration: 2025-12-11

Abstract

The utility model discloses an energy -conserving circuit of new efficiency standard of ultralow stand -by power consumption of high power factor, hold the EMI anti -electromagnetic interference circuit that connects gradually, rectifier circuit, PPFC to pursue including the self -load and having flowed correction circuit, single -end and strike back inverter circuit, light modulation control circuit, this light modulation control circuit's output is used for connecting the light source load, PPFC pursue to flow the correction circuit and is used for controlling the wave form that arrival current followed the output circuit wave form and changes in order to reduce the output current distortion. The utility model discloses a PPFC pursues the stream correction circuit can improve complete machine power factor, PF> 0.7, design features can satisfy american energy efficiency CEC standard clause and require the index value, and adopt the single -ended counterattack inverter circuit scheme of ultra -low power consumption, and design features satisfies american efficiency DOE standard index, and unloaded consumption is less than 0.1W, and work efficiency is greater than 81.81%, and above -mentioned circuit can satisfy up -to -date american energy standard CEC and DOE efficiency index simultaneously.

Description

A kind of new Energy Efficiency Standard energy-saving circuit of high power factor super-low standby power consumption

Technical field

This utility model relates to Power Electronic Technique, the new Energy Efficiency Standard energy-saving circuit of especially a kind of high power factor super-low standby power consumption.

Background technology

The low PFC of conventional traditional design single-ended counterattack electronic circuit can only meet single DOE energy efficiency indexes under optimized design and can not meet CEC standard, and this Energy Efficiency Standard requires that power factor requirements is more than 0.7. Another conventional circuit design is band Active PFC APFC single-stage or the single-ended counterattack inverter circuit of twin-stage, its electronics self there is also limitation, cannot meeting new six grades of Energy Efficiency Standard requirement clauses, no-load power cannot meet no-load power consumption less than 0.1W under existing technical background. Therefore, both circuit design all can not meet the designing requirement of newest standards.

Utility model content

Limitation for above two conventional circuit self, the design reaches up-to-date Energy Efficiency Standard, a kind of novel PPFC is adopted to set, with single-ended counterattack inverter circuit, the new design circuit combined, so as to integrated circuit solution can meet two big energy efficiency indexes CEC(concrete technical specification energy PF > 0.7 simultaneously) and DOE Energy Efficiency Standard requirement (concrete technical specification: no-load power consumption is less than 0.1W, and power work efficiency is more than 81.81%).

The technical solution adopted in the utility model is:

A kind of new Energy Efficiency Standard energy-saving circuit of high power factor super-low standby power consumption, including the EMI anti-electromagnetic interference circuit (10) being sequentially connected with from input, rectification circuit (20), PPFC valley-fill correcting circuit (30), single-ended counterattack inverter circuit (40), adjusting control circuit (50), the outfan of this adjusting control circuit (50) is used for connecting light source load, and described PPFC valley-fill correcting circuit (30) follows the waveform change of output circuit waveform to reduce output current distortion for controlling input current.

Described PPFC valley-fill correcting circuit (30) includes being connected in parallel on the first discharge loop between rectification circuit (20) two outfan and the second discharge loop, first discharge loop is in series by electrochemical capacitor C2, diode D2, second discharge loop is in series by electrochemical capacitor C16, diode D4, between electrochemical capacitor C2 and diode D2, common point is n1, between electrochemical capacitor C16 and diode D4, common point is n2, is connected to diode D3 between common point n1 and n2.

Described single-ended counterattack inverter circuit (40) includes power supply and controls IC1 and control IC1 transformator T1, the photoelectrical coupler IC2 being connected respectively with power supply, the outfan of transformator T1 connects secondary transformer T2, secondary transformer T2 is connected with adjusting control circuit (50) with the driving voltage of the running voltage and light source load providing adjusting control circuit (50), and described photoelectrical coupler IC2 isolates for the output photoelectric of transformator T1.

Described single-ended counterattack inverter circuit (40) also includes the RCD pulse absorption circuit for absorbing counterattack spike, this RCD pulse absorption circuit is connected between the outfan of PPFC valley-fill correcting circuit (30) and transformator T1 input, and is connected with power supply control IC1.

This RCD pulse absorption circuit is made up of resistance R5, resistance R6, electric capacity C6 and diode D5, resistance R5, resistance R6, electric capacity C6 are parallel between the outfan of PPFC valley-fill correcting circuit (30) and diode D5 negative pole simultaneously, and diode D5 positive pole controls IC1 with power supply and is connected.

Described adjusting control circuit (50) includes the three terminal integrated voltage stabilizer IC3, light adjusting controller IC4, metal-oxide-semiconductor Q1 and the load outputs SIP2 that are sequentially connected with.

The beneficial effects of the utility model: this utility model adopts PPFC valley-fill correcting circuit can improve complete machine power factor (PF), PF > 0.7, design feature can meet american energy efficiency CEC standard clause and require desired value; And adopting the single-ended counterattack inverter circuit scheme of super low-power consumption, design feature meets U.S.'s efficiency DOE standard index, and no-load power consumption is less than 0.1W, and work efficiency is more than 81.81%, and foregoing circuit can meet up-to-date american energy standard CEC and DOE energy efficiency indexes simultaneously.

Accompanying drawing explanation

Below in conjunction with accompanying drawing, detailed description of the invention of the present utility model is described further.

Fig. 1 is the theory diagram of the new Energy Efficiency Standard energy-saving circuit of this utility model;

Fig. 2 is the layout of this utility model EMI anti-electromagnetic interference circuit and rectification circuit;

Fig. 3 is the layout of this utility model PPFC valley-fill correcting circuit;

Fig. 4 is the layout of the single-ended counterattack inverter circuit of this utility model;

Fig. 5 is the layout of this utility model adjusting control circuit.

Detailed description of the invention

It is illustrated in figure 1 the new Energy Efficiency Standard energy-saving circuit of a kind of high power factor super-low standby power consumption of the present utility model, including the EMI anti-electromagnetic interference circuit 10 being sequentially connected with from input, rectification circuit 20, PPFC valley-fill correcting circuit 30, single-ended counterattack inverter circuit 40, adjusting control circuit 50, the outfan of this adjusting control circuit 50 is used for connecting light source load, and described PPFC valley-fill correcting circuit 30 follows the waveform change of output circuit waveform to reduce output current distortion for controlling input current.

As in figure 2 it is shown, EMI anti-electromagnetic interference circuit 10 input connects alternating current power supply, by fuse F1, and the RLC rc filter circuit of electric capacity C1, resistance RL1, resistance RL2 and inductance L1 connection in series-parallel, then access full bridge rectifier D1.

As shown in Figure 3, described PPFC valley-fill correcting circuit 30 includes being connected in parallel on the first discharge loop between 20 liang of outfans of rectification circuit and the second discharge loop, first discharge loop is in series by electrochemical capacitor C2, diode D2, second discharge loop is in series by electrochemical capacitor C16, diode D4, between electrochemical capacitor C2 and diode D2, common point is n1, between electrochemical capacitor C16 and diode D4, common point is n2, is connected to diode D3 between common point n1 and n2.

After power supply input is rectified, power supply input the rectified after current of positive half cycle through electric capacity C2, diode D3, electric capacity C16 gives two electric capacity C2, C16 charges, when arriving positive half cycle peak value, electric capacity C2 and auxiliary discharge diode D2 forms discharge loop with late-class circuit, electric capacity starts electric discharge, when the VCC(VCC of electric capacity C2 Voltage Drop to 1/2 is defined as two total voltages fully charged for electric capacity C2 and C16) time, C2 no longer discharges, and now, electric capacity C16 and diode D4 forms discharge loop with late-class circuit, electric capacity C16 starts electric discharge, two electric capacity discharge in turn, so as to input current waveform is able to continuously, reduce current distortion, thus reaching to provide the purpose of power factor (PF), realize power factor (PF) more than 0.7 index.

Except the above-mentioned realization to concrete scheme and application are introduced, circuitry is PPFC valley-fill correction electricity, and 30 form a control circuit core with the combination of single-ended counterattack inverter circuit 40.

CEC standard can not be met because power factor (PF) cannot be realized more than 0.7 index in view of the single-ended counterattack electronic circuit of the low PFC of traditional design. Another conventional circuit design is band Active PFC APFC single-stage or the single-ended counterattack inverter circuit of twin-stage, although Active PFC can be realized after starting because of APFC, but owing to starting loss minimum needs 0.2 0.3W, the open circuit loss standard lower than 0.1W cannot be realized, therefore also cannot meet new six grades of efficiency DOE standard-requireds.

This circuit adopts PPFC to correct to realize high power factor, and this applies an advantage for this circuit, also realizes another advantage is that simultaneously, and this PPFC valley-fill correcting circuit 30 own loss is extremely low, and much smaller than 0.1W, perfect condition is lossless. And rear class need not again with the PF single-ended counterattack inverter circuit 40 corrected simultaneously, because it is big that himself starts resistance, the advantage that quiescent dissipation is little, after circuit start, not consumed energy substantially under not having loaded condition, therefore can make it under idle condition, and open circuit loss is less than 0.1W, add PPFC valley-fill correcting circuit total losses again smaller than 0.1W, therefore meet DOE standard.

Such as Fig. 4, described single-ended counterattack inverter circuit 40 includes power supply and controls IC1 and control IC1 transformator T1, the photoelectrical coupler IC2 being connected respectively with power supply, and the basic electronic component in periphery, the outfan of transformator T1 connects secondary transformer T2, secondary transformer T2 is connected the driving voltage of running voltage and the light source load providing adjusting control circuit 50 with adjusting control circuit 50, and described photoelectrical coupler IC2 isolates for the output photoelectric of transformator T1.

In addition, described single-ended counterattack inverter circuit 40 also includes the RCD pulse absorption circuit 60 for absorbing counterattack spike, this RCD pulse absorption circuit is connected between the outfan of PPFC valley-fill correcting circuit 30 and transformator T1 input, and is connected with power supply control IC1.

This RCD pulse absorption circuit is made up of resistance R5, resistance R6, electric capacity C6 and diode D5, resistance R5, resistance R6, electric capacity C6 are parallel between the outfan of PPFC valley-fill correcting circuit 30 and diode D5 negative pole simultaneously, and diode D5 positive pole controls IC1 with power supply and is connected.

Such as Fig. 5, described adjusting control circuit 50 includes the three terminal integrated voltage stabilizer IC3, light adjusting controller IC4, metal-oxide-semiconductor Q1 and the load outputs SIP2 that are sequentially connected with, and the basic electronic component in periphery, VCC is converted to the 5V voltage that light adjusting controller IC4 work is required by three terminal integrated voltage stabilizer IC3, and light adjusting controller IC4 realizes the load outputs SIP2 output to light source load by controlling the conducting of metal-oxide-semiconductor Q1.

The foregoing is only preferred embodiments of the present utility model, this utility model is not limited to above-mentioned embodiment, broadly falls within protection domain of the present utility model as long as realizing the technical scheme of this utility model purpose with essentially identical means.

Claims

1. the new Energy Efficiency Standard energy-saving circuit of a high power factor super-low standby power consumption, it is characterized in that: the EMI anti-electromagnetic interference circuit (10) that includes being sequentially connected with from input, rectification circuit (20), PPFC valley-fill correcting circuit (30), single-ended counterattack inverter circuit (40), adjusting control circuit (50), the outfan of this adjusting control circuit (50) is used for connecting light source load, and described PPFC valley-fill correcting circuit (30) follows the waveform change of output circuit waveform to reduce output current distortion for controlling input current.

2. the new Energy Efficiency Standard energy-saving circuit of a kind of high power factor super-low standby power consumption according to claim 1, it is characterized in that: described PPFC valley-fill correcting circuit (30) includes being connected in parallel on the first discharge loop between rectification circuit (20) two outfan and the second discharge loop, first discharge loop is by electrochemical capacitor C2, diode D2 is in series, second discharge loop is by electrochemical capacitor C16, diode D4 is in series, between electrochemical capacitor C2 and diode D2, common point is n1, between electrochemical capacitor C16 and diode D4, common point is n2, diode D3 it is connected between common point n1 and n2.

3. the new Energy Efficiency Standard energy-saving circuit of a kind of high power factor super-low standby power consumption according to claim 1 and 2, it is characterized in that: described single-ended counterattack inverter circuit (40) includes power supply and controls IC1 and control IC1 transformator T1, the photoelectrical coupler IC2 being connected respectively with power supply, the outfan of transformator T1 connects secondary transformer T2, secondary transformer T2 is connected with adjusting control circuit (50) with the driving voltage of the running voltage and light source load providing adjusting control circuit (50), and described photoelectrical coupler IC2 isolates for the output photoelectric of transformator T1.

4. the new Energy Efficiency Standard energy-saving circuit of a kind of high power factor super-low standby power consumption according to claim 3, it is characterized in that: described single-ended counterattack inverter circuit (40) also includes the RCD pulse absorption circuit for absorbing counterattack spike, this RCD pulse absorption circuit is connected between the outfan of PPFC valley-fill correcting circuit (30) and transformator T1 input, and is connected with power supply control IC1.

5. the new Energy Efficiency Standard energy-saving circuit of a kind of high power factor super-low standby power consumption according to claim 4, it is characterized in that: this RCD pulse absorption circuit is made up of resistance R5, resistance R6, electric capacity C6 and diode D5, resistance R5, resistance R6, electric capacity C6 are parallel between the outfan of PPFC valley-fill correcting circuit (30) and diode D5 negative pole simultaneously, and diode D5 positive pole controls IC1 with power supply and is connected.

6. the new Energy Efficiency Standard energy-saving circuit of a kind of high power factor super-low standby power consumption according to claim 3, it is characterised in that: described adjusting control circuit (50) includes the three terminal integrated voltage stabilizer IC3, light adjusting controller IC4, metal-oxide-semiconductor Q1 and the load outputs SIP2 that are sequentially connected with.