CN105491758A - A new energy efficiency standard energy-saving circuit with high power factor and ultra-low standby power consumption - Google Patents

Abstract

The invention discloses a high-power-factor ultra-low standby power consumption new energy efficiency standard energy-saving circuit which comprises an EMI anti-electromagnetic interference circuit, a rectifying circuit, a PPFC current-chasing correction circuit, a single-ended counter-attack inverter circuit and a dimming control circuit which are sequentially connected from an input end, wherein the output end of the dimming control circuit is connected with a light source load, and the PPFC current-chasing correction circuit is used for controlling the waveform change of input current following the waveform of an output circuit so as to reduce the distortion of the output current. The PPFC gradual flow correction circuit can improve the power factor of the whole machine, PF is greater than 0.7, and the design characteristics can meet the index value required by the standard provision of the American energy efficiency CEC; and an ultra-low power consumption single-end counterattack inverter circuit scheme is adopted, the design characteristics meet the energy efficiency DOE standard index of the United states, the no-load power consumption is less than 0.1W, the working efficiency is more than 81.81%, and the circuit can simultaneously meet the latest energy efficiency indexes of the United states CEC and the DOE.

Description

A new energy efficiency standard energy-saving circuit with high power factor and ultra-low standby power consumption

technical field

The invention relates to power electronic technology, in particular to a new energy efficiency standard energy-saving circuit with high power factor and ultra-low standby power consumption.

Background technique

In the past, the traditionally designed low-PFC single-end counter electronic circuit can only meet a single DOE energy efficiency index under the optimal design and cannot meet the CEC standard. This energy efficiency standard requires a power factor greater than 0.7. Another traditional circuit design is APFC single-stage or double-stage single-end counter-attack inverter circuit with power factor correction. The electronics itself has limitations and cannot meet the requirements of the new six-level energy efficiency standard. The background cannot meet the no-load power consumption of less than 0.1W. Therefore, neither of these two circuit designs can meet the design requirements of the latest standards.

Contents of the invention

Aiming at the limitations of the above two traditional electronic circuits, this design adopts a new design circuit combining a new type of PPFC and a single-ended counter-attack inverter circuit design in order to meet the latest energy efficiency standards, so that the overall circuit solution can simultaneously Meet the two major energy efficiency indicators CEC (specific technical indicators can PF>0.7) and DOE energy efficiency standards (specific technical indicators: no-load power consumption is less than 0.1W, and power supply efficiency is greater than 81.81%).

The technical scheme adopted in the present invention is:

A new energy-efficiency standard energy-saving circuit with high power factor and ultra-low standby power consumption, including an EMI anti-electromagnetic interference circuit (10), a rectifier circuit (20), a PPFC current-by-current correction circuit (30), and a single terminal counter-attack inverter circuit (40), dimming control circuit (50), the output terminal of the dimming control circuit (50) is used to connect the light source load, and the PPFC current-by-current correction circuit (30) is used to control the input current to follow The waveform of the output circuit waveform is changed to reduce output current distortion.

The PPFC current-by-current correction circuit (30) includes a first discharge circuit and a second discharge circuit connected in parallel between the two output terminals of the rectification circuit (20), the first discharge circuit is formed by electrolytic capacitor C2 and diode D2 in series, and the second The second discharge circuit is composed of electrolytic capacitor C16 and diode D4 in series, the common point between electrolytic capacitor C2 and diode D2 is n1, the common point between electrolytic capacitor C16 and diode D4 is n2, and a diode is connected between common points n1 and n2 D3.

The single-ended counter-attack inverter circuit (40) includes a power control IC1, a transformer T1 connected to the power control IC1, and a photocoupler IC2, the output end of the transformer T1 is connected to a secondary transformer T2, and the secondary transformer T2 is connected to the dimming control The circuit (50) is connected to provide the working voltage of the dimming control circuit (50) and the driving voltage of the light source load, and the photocoupler IC2 is used for photoelectric isolation of the output of the transformer T1.

The single-ended counter-attack inverter circuit (40) also includes an RCD pulse absorption circuit for absorbing counter-attack peak pulses, and the RCD pulse absorption circuit is connected between the output terminal of the PPFC current-by-current correction circuit (30) and the input terminal of the transformer T1 , and connected with the power control IC1.

The RCD pulse absorbing circuit is composed of resistor R5, resistor R6, capacitor C6 and diode D5. The resistor R5, resistor R6 and capacitor C6 are simultaneously connected in parallel between the output terminal of the PPFC current-by-current correction circuit (30) and the cathode of the diode D5. The diode D5 The positive pole is connected to the power control IC1.

The dimming control circuit (50) includes a three-terminal integrated voltage regulator IC3, a dimming controller IC4, a MOS transistor Q1 and a load output terminal SIP2 connected in sequence.

Beneficial effects of the present invention: the present invention adopts the PPFC current-by-flow correction circuit to improve the power factor of the whole machine, PF>0.7, and the design features can meet the index value required by the American energy efficiency CEC standard clause; and adopt ultra-low power consumption single-ended counter-attack inverter The circuit scheme and design features meet the US energy efficiency DOE standard indicators, the no-load power consumption is less than 0.1W, and the work efficiency is greater than 81.81%. The above circuits can meet the latest US energy standard CEC and DOE energy efficiency indicators at the same time.

Description of drawings

The specific embodiments of the present invention will be further described below in conjunction with the accompanying drawings.

Fig. 1 is the functional block diagram of new energy efficiency standard energy-saving circuit of the present invention;

Fig. 2 is the circuit diagram of EMI anti-electromagnetic interference circuit and rectifier circuit of the present invention;

Fig. 3 is the circuit diagram of PPFC flow-by-flow correction circuit of the present invention;

Fig. 4 is a circuit diagram of the single-ended counter-attack inverter circuit of the present invention;

Fig. 5 is a circuit diagram of the dimming control circuit of the present invention.

detailed description

As shown in Figure 1, it is a new energy-efficiency standard energy-saving circuit with high power factor and ultra-low standby power consumption of the present invention, including an EMI anti-electromagnetic interference circuit 10, a rectifier circuit 20, and a PPFC current-by-current correction circuit connected sequentially from the input end 30. Single-ended counter-attack inverter circuit 40, dimming control circuit 50, the output end of the dimming control circuit 50 is used to connect the light source load, and the PPFC current-by-current correction circuit 30 is used to control the input current to follow the waveform of the output circuit waveform change to reduce output current distortion.

As shown in Figure 2, the input end of the EMI anti-electromagnetic interference circuit 10 is connected to the AC power supply, and the RLC resistance-capacitance filter circuit formed by series-parallel connection of the fuse F1, the capacitor C1, the resistor RL1, the resistor RL2, and the inductor L1 is then connected to the full Bridge rectifier circuit D1.

As shown in FIG. 3 , the PPFC current-by-current correction circuit 30 includes a first discharge loop and a second discharge loop connected in parallel between the two output terminals of the rectifier circuit 20, and the first discharge loop is formed by connecting an electrolytic capacitor C2 and a diode D2 in series. , the second discharge circuit is composed of electrolytic capacitor C16 and diode D4 in series, the common point between electrolytic capacitor C2 and diode D2 is n1, the common point between electrolytic capacitor C16 and diode D4 is n2, and the common point n1 and n2 are connected There is diode D3.

After the power input is rectified, the rectified current passes through capacitor C2, diode D3, and capacitor C16 to charge the two capacitors C2 and C16 in the positive half cycle of the power input. When the peak value of the positive half cycle is reached, the capacitor C2 and the auxiliary discharge diode D2 The stage circuit forms a discharge circuit, and the capacitor starts to discharge. When the voltage of capacitor C2 drops to 1/2 of VCC (VCC is defined as the total voltage of two capacitors C2 and C16 fully charged), C2 will no longer discharge, and at this time, capacitor C16 And the diode D4 forms a discharge circuit with the subsequent circuit, the capacitor C16 starts to discharge, and the two capacitors discharge in turn, so that the input current waveform can be continuous and the current distortion can be reduced, so as to achieve the purpose of providing power factor and achieve a power factor greater than 0.7.

In addition to the above-mentioned implementation and application introduction of specific solutions, the circuit of the whole machine is a PPFC current-by-current correction circuit 30 combined with a single-ended counter-attack inverter circuit 40 to form a control circuit core.

In view of the traditional design of low PFC single-ended counter electronic circuit, it cannot meet the CEC standard because the power factor cannot be greater than 0.7. Another traditional circuit design is an APFC single-stage or double-stage single-end counter-attack inverter circuit with power factor correction. Although the power factor correction can be realized after the APFC is started, it cannot be achieved due to the minimum start-up loss of 0.2-0.3W. The no-load loss standard of 0.1W cannot meet the requirements of the new DOE standard for energy efficiency level VI.

This circuit uses PPFC correction to achieve high power factor, which is one advantage of the application of this circuit, and another advantage is that the PPFC current-by-flow correction circuit 30 itself has extremely low loss, far less than 0.1W, and the ideal state is called no loss. At the same time, the rear stage does not need the single-ended counter-attack inverter circuit 40 with PF correction, because its own starting resistance is large and the static loss is small. After the circuit starts, it basically does not consume energy under the condition of no load, so it can be used. Under no-load conditions, the no-load loss is less than 0.1W, and the total loss of the PPFC current-by-stream correction circuit is also less than 0.1W, so it meets the DOE standard.

As shown in Fig. 4, the single-ended counter-attack inverter circuit 40 includes a power control IC1, a transformer T1 connected to the power control IC1, a photocoupler IC2, and peripheral basic electronic parts, and the output terminal of the transformer T1 is connected to the secondary transformer T2. The secondary transformer T2 is connected to the dimming control circuit 50 to provide the working voltage of the dimming control circuit 50 and the driving voltage of the light source load, and the optocoupler IC2 is used for optical isolation of the output of the transformer T1.

In addition, the single-ended counter-attack inverter circuit 40 also includes an RCD pulse absorption circuit 60 for absorbing counter-attack spikes, and the RCD pulse absorption circuit is connected between the output end of the PPFC current-by-current correction circuit 30 and the input end of the transformer T1, And connect with power control IC1.

The RCD pulse absorbing loop is composed of a resistor R5, a resistor R6, a capacitor C6 and a diode D5. The resistor R5, the resistor R6 and the capacitor C6 are simultaneously connected in parallel between the output terminal of the PPFC current-by-flow correction circuit 30 and the negative pole of the diode D5, and the positive pole of the diode D5 is connected to the negative pole of the diode D5. Power control IC1 connection.

As shown in Figure 5, the dimming control circuit 50 includes a three-terminal integrated voltage regulator IC3, a dimming controller IC4, a MOS transistor Q1, and a load output terminal SIP2 connected in sequence, as well as peripheral basic electronic components, the three-terminal integrated voltage regulator IC3 converts VCC to the 5V voltage required for the dimming controller IC4 to work. The dimming controller IC4 realizes the output of the load output terminal SIP2 to the light source load by controlling the conduction of the MOS transistor Q1.

The above descriptions are only preferred implementations of the present invention, and the present invention is not limited to the above-mentioned implementations, as long as the technical solutions that achieve the purpose of the present invention by basically the same means fall within the protection scope of the present invention.

Claims (6)

1. the new Energy Efficiency Standard energy-saving circuit of a high power factor super-low standby power consumption, it is characterized in that: comprise connect successively from input EMI anti-electromagnetic interference circuit (10), rectification circuit (20), PPFC by stream correcting circuit (30), single-ended counterattack inverter circuit (40), adjusting control circuit (50), the output of this adjusting control circuit (50) is for connecting light source load, and described PPFC follows the wave form varies of output circuit waveform to reduce output current distortion by stream correcting circuit (30) for control inputs electric current.

2. the new Energy Efficiency Standard energy-saving circuit of a kind of high power factor super-low standby power consumption according to claim 1, it is characterized in that: described PPFC comprises by stream correcting circuit (30) and is connected in parallel on the first discharge loop between rectification circuit (20) two output and the second discharge loop, first discharge loop is by electrochemical capacitor C2, diode D2 is in series, second discharge loop is by electrochemical capacitor C16, diode D4 is in series, between electrochemical capacitor C2 and diode D2, common point is n1, between electrochemical capacitor C16 and diode D4, common point is n2, diode D3 is connected with between common point n1 and n2.

3. the new Energy Efficiency Standard energy-saving circuit of a kind of high power factor super-low standby power consumption according to claim 1 and 2, it is characterized in that: transformer T1, photoelectrical coupler IC2 that described single-ended counterattack inverter circuit (40) comprises Energy control IC1 and is connected with Energy control IC1 respectively, the output of transformer T1 connects secondary transformer T2, secondary transformer T2 is connected with adjusting control circuit (50) to provide the operating voltage of adjusting control circuit (50) and the driving voltage of light source load, and described photoelectrical coupler IC2 isolates for the output photoelectric of transformer T1.

4. the new Energy Efficiency Standard energy-saving circuit of a kind of high power factor super-low standby power consumption according to claim 3, it is characterized in that: described single-ended counterattack inverter circuit (40) also comprises the RCD pulse absorb loop for absorbing counterattack spike, this RCD pulse absorb loop is connected to PPFC by between the output flowing correcting circuit (30) and transformer T1 input, and is connected with Energy control IC1.

5. the new Energy Efficiency Standard energy-saving circuit of a kind of high power factor super-low standby power consumption according to claim 4, it is characterized in that: this RCD pulse absorb returns routing resistance R5, resistance R6, electric capacity C6 and diode D5 and forms, resistance R5, resistance R6, electric capacity C6 are parallel to PPFC by between the output flowing correcting circuit (30) and diode D5 negative pole simultaneously, and diode D5 positive pole is connected with Energy control IC1.

6. the new Energy Efficiency Standard energy-saving circuit of a kind of high power factor super-low standby power consumption according to claim 3, is characterized in that: described adjusting control circuit (50) comprises the three terminal integrated voltage stabilizer IC3, light adjusting controller IC4, metal-oxide-semiconductor Q1 and the load outputs SIP2 that connect successively.