CN205229402U - First structure of wafer chip assay - Google Patents
First structure of wafer chip assay Download PDFInfo
- Publication number
- CN205229402U CN205229402U CN201521035528.9U CN201521035528U CN205229402U CN 205229402 U CN205229402 U CN 205229402U CN 201521035528 U CN201521035528 U CN 201521035528U CN 205229402 U CN205229402 U CN 205229402U
- Authority
- CN
- China
- Prior art keywords
- chaining pin
- adapter sleeve
- wafer chip
- wiring board
- face
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The utility model relates to an automatic frock technical field that detects discloses a first structure of wafer chip assay, including circuit board, adapter sleeve, the middle part of circuit board is equipped with positioning hole, and the location bulge loop that forms with the positioning hole joint is extended to the one end of adapter sleeve, and the both sides of the outer end of adapter sleeve respectively are equipped with one row of chaining pin, and the chaining pin includes the chaining pin cover, establishes the telescopic chaining pin head in the chaining pin cover, be connected through the glue layer between the terminal surface of chaining pin cover and adapter sleeve, and the terminal surface on the chaining pin head height play glue layer of every chaining pin, the chaining pin of every chaining pin overlaps and passes through wire and circuit board connection. The utility model discloses have and to be applicable to automated inspection equipment, greatly improve detection efficiency's beneficial effect.
Description
Technical field
The utility model relates to test technique automatic field, particularly relates to a kind of wafer chip detection header structure.
Background technology
Wafer (Wafer) is the carrier producing used in integrated circuits, refers to monocrystalline silicon disk more, monocrystalline silicon disk is drawn by common silica sand and refines, make silicon single crystal rod through dissolving, purifying, distill series of measures, silicon single crystal rod, after polishing, section, just becomes wafer.A discoid wafer sheet is distributed with a lot of one sound of laughing wafer, and wafer needed to detect its performance before encapsulation manufactures chip, and due to a wafer existing up to a hundred wafers, manual detection efficiency is low.
Utility model content
The utility model in order to solve wafer in prior art detect exist detection efficiency low and problem, provide one and can be applicable to automatic checkout equipment, greatly improve the wafer chip detection header structure of detection efficiency.
To achieve these goals, the utility model adopts following technical scheme:
A kind of wafer chip detection header structure, comprise wiring board, adapter sleeve, the middle part of described wiring board is provided with positioning through hole, one end of described adapter sleeve extends to form the positioning convex ring with positioning through hole clamping, the both sides of the outer end of described adapter sleeve are respectively provided with row's chaining pin, described chaining pin comprises chaining pin cover, the telescopic chaining pin head be located in chaining pin cover, be connected by glue layer between described chaining pin cover and the end face of adapter sleeve, the chaining pin head height of each chaining pin goes out the end face of glue layer, and the chaining pin cover of each chaining pin is connected with wiring board by wire.
Wiring board is connected with automatic detection system, wafer chip is arranged on sliding support, chaining pin head is connected with wafer chip surface Elastic Contact, sliding support drives wafer chip to move, make each lattice on wafer chip all through a chaining pin head, detection is direct afterwards reads testing result from automatic detection system, greatly improves the detection efficiency of wafer chip; The extraneous contact condition can seeing chaining pin and wafer chip from connecting through hole intuitively.
As preferably, between described chaining pin and adapter sleeve end face, tilt distribution forms angle, and the outer end of described chaining pin head is bent to form detection terminal, described detection terminal and wafer Chip Vertical to be detected.There is angle between chaining pin and adapter sleeve, thus ensure that between chaining pin head and wafer chip be Elastic Contact, detection terminal and wafer Chip Vertical, ensure contact stabilization, chaining pin stability under loading between the two.
As preferably, the end face of described detection terminal is sphere.Sphere can prevent detection terminal from producing scratch when wafer chip surface moves.
As preferably, the outer end of described positioning convex ring exceeds the surface of wiring board.Positioning convex ring exceeds the position of wiring board for being connected with automation equipment.
As preferably, be bolted between described wiring board and the end face of adapter sleeve.
Therefore, the utility model has and can be applicable to automatic checkout equipment, greatly improves the beneficial effect of detection efficiency.
Accompanying drawing explanation
Fig. 1 is a kind of structural representation of the present utility model.
Fig. 2 is the sectional side view of Fig. 1.
Fig. 3 is the structural representation of chaining pin.
In figure: wiring board 1, adapter sleeve 2, bolt 3, chaining pin 4, glue layer 5, wire 6, wafer chip 7, positioning through hole 10, positioning convex ring 20, chaining pin cover 40, chaining pin head 41, detection terminal 42.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is further described:
A kind of wafer chip detection header structure as depicted in figs. 1 and 2, comprise wiring board 1, adapter sleeve 2, the middle part of wiring board is provided with positioning through hole 10, one end of adapter sleeve 2 extends to form the positioning convex ring 20 with positioning through hole clamping, the outer end of positioning convex ring exceeds the surface of wiring board, be connected by bolt 3 between wiring board 1 and the end face of adapter sleeve 2, the both sides of the outer end of adapter sleeve 2 are respectively provided with row's chaining pin 4, as shown in Figure 3, chaining pin 4 comprises chaining pin cover 40, be located at the telescopic chaining pin head 41 in chaining pin cover, be connected by glue layer 5 between chaining pin cover 40 and the end face of adapter sleeve 2, glue layer solidifies formation by insulating gel, glue layer entirety is in an annular, chaining pin head 41 is positioned at the inner ring portion of the glue layer of annular, between chaining pin 4 and adapter sleeve end face, tilt distribution forms angle, the chaining pin head 41 of each chaining pin exceeds the end face of glue layer, the chaining pin cover 40 of each chaining pin is connected with wiring board by wire 6, the outer end of chaining pin head 41 is bent to form detection terminal 42, detection terminal 42 is vertical with wafer chip 7 to be detected, the end face of detection terminal 42 is sphere.
By reference to the accompanying drawings, using method of the present utility model is as follows: the position that positioning convex ring exceeds wiring board is fixedly connected with automatic detection system, wafer chip 7 is arranged on sliding support, detection terminal 42 on chaining pin head contacts with wafer chip 7 surface elasticity and connects, sliding support drives wafer chip to move, make each lattice on wafer chip all through a chaining pin head, detection is direct afterwards reads testing result from automatic detection system, in testing process, the positioning convex ring place in positioning through hole can see the contact condition of chaining pin and wafer chip intuitively.The utility model has and can be applicable to automatic checkout equipment, greatly improves the beneficial effect of detection efficiency.
Claims (5)
1. a wafer chip detection header structure, it is characterized in that, comprise wiring board, adapter sleeve, the middle part of described wiring board is provided with positioning through hole, one end of described adapter sleeve extends to form the positioning convex ring with positioning through hole clamping, the both sides of the outer end of described adapter sleeve are respectively provided with row's chaining pin, described chaining pin comprises chaining pin cover, the telescopic chaining pin head be located in chaining pin cover, be connected by glue layer between described chaining pin cover and the end face of adapter sleeve, the chaining pin head height of each chaining pin goes out the end face of glue layer, and the chaining pin cover of each chaining pin is connected with wiring board by wire.
2. a kind of wafer chip detection header structure according to claim 1, it is characterized in that, between described chaining pin and adapter sleeve end face, tilt distribution forms angle, and the outer end of described chaining pin head is bent to form detection terminal, described detection terminal and wafer Chip Vertical to be detected.
3. a kind of wafer chip detection header structure according to claim 1 and 2, is characterized in that, the end face of described detection terminal is sphere.
4. a kind of wafer chip detection header structure according to claim 1, it is characterized in that, the outer end of described positioning convex ring exceeds the surface of wiring board.
5. a kind of wafer chip detection header structure according to claim 1 or 4, is characterized in that, be bolted between described wiring board and the end face of abutment ring.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201521035528.9U CN205229402U (en) | 2015-12-12 | 2015-12-12 | First structure of wafer chip assay |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201521035528.9U CN205229402U (en) | 2015-12-12 | 2015-12-12 | First structure of wafer chip assay |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205229402U true CN205229402U (en) | 2016-05-11 |
Family
ID=55904459
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201521035528.9U Expired - Fee Related CN205229402U (en) | 2015-12-12 | 2015-12-12 | First structure of wafer chip assay |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205229402U (en) |
-
2015
- 2015-12-12 CN CN201521035528.9U patent/CN205229402U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160511 Termination date: 20211212 |