CN205215220U

CN205215220U - Brain wave signals collection system

Info

Publication number: CN205215220U
Application number: CN201520668602.4U
Authority: CN
Inventors: 童路遥; 王君迪; 林通; 雷京颢; 付全胜; 易昊翔; 李哲越; 岳佳琴
Original assignee: Hangzhou Kether Electronic Technology Co Ltd
Current assignee: Hangzhou Kether Electronic Technology Co Ltd
Priority date: 2015-08-31
Filing date: 2015-08-31
Publication date: 2016-05-11
Anticipated expiration: 2025-08-31

Abstract

The utility model is suitable for a signal acquisition field provides a brain wave signals collection system, the method includes: be connected with preamp circuit for output brain wave signals's external electrode, respectively with back level amplifier circuit filter circuit, power supply circuit and external electrode is connected for enlarge brain wave signals's preamp circuit, respectively with MUC acquisition circuit preamp circuit with power supply circuit connects for enlarge brain wave signals, and it is right brain wave signals carries out the back level amplification and filtering circuit that filtering was handled, respectively with back level amplification and filtering circuit and power supply circuit connect for the collection process is enlargied, the simulation brain wave signals's of post -filter MUC acquisition circuit, respectively with preamp circuit, back level amplification and filtering circuit and MUC acquisition circuit connect for a power supply circuit of the power is provided. The utility model discloses, can gather clear brain wave signals.

Description

A kind of eeg signal harvester

Technical field

This utility model belongs to signals collecting field, particularly relates to a kind of eeg signal harvester.

Background technology

Along with the development of medical electronics, brain electricity is valued by the people gradually.EEG signals is the comprehensive of cerebral neuron postsynaptic potential, has abundant cerebral activity information, is the important means of brain research, physiological Study, Clinical detection cerebral activity.In addition, EEG signals contains the pathological information of a large amount of Human Physiology, by the research to EEG signals, can understand the relation between neurocyte electrical activity and human physiology mental status, have important scientific meaning at clinical medicine and cognitive domain.

But eeg signal acquisition and pretreatment are the problems of a more complicated always.First, EEG signals is very faint; The second, EEG signals scalp and the usual impedance of skull very high; 3rd, the frequency of EEG signals is low; 4th, in normal circumstances, eeg signal acquisition is subject to the common mode disturbances such as Hz noise.Above reason and some other factor cause brain telecommunications on gathering, become difficulty very.

Utility model content

Given this, this utility model provides a kind of eeg signal harvester, gathers the inaccurate technical problem of eeg signal to solve prior art.

This utility model embodiment is achieved in that a kind of eeg signal harvester, and described device comprises:

Be connected with preamplifying circuit, for exporting the external electrode of eeg signal;

Be connected with rear class amplifying circuit filter circuit, power circuit and described external electrode respectively, for amplifying the preamplifying circuit of eeg signal;

Being connected with MUC Acquisition Circuit, described preamplifying circuit and described power circuit respectively, for amplifying eeg signal, and described eeg signal being carried out to the rear class filtering and amplifying circuit of Filtering Processing;

Be connected with described rear class filtering and amplifying circuit and power circuit respectively, for gathering the MUC Acquisition Circuit through amplification, filtered simulation eeg signal;

Be connected with described preamplifying circuit, rear class filtering and amplifying circuit and MUC Acquisition Circuit respectively, for providing the power circuit of power supply.

Further, described device also comprises:

Be connected with described external electrode and power circuit respectively, for eliminating the driven-right-leg circuit of the work mould interference in eeg signal.

Further, described MUC Acquisition Circuit is also for being converted into digital brain electrical ripple signal by simulation eeg signal.

Further, described MUC Acquisition Circuit is also for exporting digital brain electrical ripple signal by serial ports.

This utility model embodiment, by external electrode, EEG signals is transferred to preamplifying circuit, rear class filtering and amplifying circuit is transferred to again through amplified signal, rear class filter amplification circuit is further amplified and filtering signal, MCU gathers the analogue signal after amplification filtering, signal processed and changes into digital signal, outwards being transmitted by serial ports.This utility model circuit is simple, and strong interference immunity, volume is little.

Accompanying drawing explanation

In order to be illustrated more clearly in the technical scheme in this utility model embodiment, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.

Fig. 1 is the structure chart of the eeg signal harvester that this utility model embodiment provides;

Fig. 2 is the circuit diagram of the preamplifying circuit that this utility model embodiment provides;

Fig. 3 is the circuit diagram of the rear class filtering and amplifying circuit that this utility model embodiment provides;

Fig. 4 is the circuit diagram of the MUC Acquisition Circuit that this utility model embodiment provides;

Fig. 5 is the circuit diagram of the power circuit that this utility model embodiment provides;

Fig. 6 is the circuit diagram of the driven-right-leg circuit that this utility model embodiment provides.

Detailed description of the invention

In order to make the purpose of this utility model, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, this utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain this utility model, and be not used in restriction this utility model.

In order to technical scheme described in the utility model is described, be described below by specific embodiment.

Embodiment one

Be illustrated in figure 1 the structure chart of the eeg signal harvester that this utility model embodiment provides, for convenience of explanation, the part relevant to this utility model embodiment be only shown, comprise:

Be connected with preamplifying circuit 102, for exporting the external electrode 101 of eeg signal.

In this utility model embodiment, external electrode 101 is connected with preamplifying circuit 102, for exporting the eeg signal of collection to treatment circuit.

Be connected with rear class amplifying circuit filter circuit 103, power circuit 105 and described external electrode 101 respectively, for amplifying the preamplifying circuit 102 of eeg signal.

In this utility model embodiment, preamplifying circuit 102 is connected with rear class amplifying circuit filter circuit 103, power circuit 105 and external electrode 101 respectively, processing and amplifying is carried out to the eeg signal received, concrete: preamplifying circuit 102 comprises TLC2254 operational amplifier, single contact pin TRODE, chip ceramic capacitor C1, C2, C3, C4, Chip-R R1, R2, R3, R4, R5, R6, R7.1 foot of single contact pin TRODE and 2 feet connect 5 feet and 3 feet of TLC2254 chip respectively; 2 feet of resistance R1 mono-chip termination TLC2254,1 foot of another chip termination TLC2254; 2 feet of resistance R2 chip termination TLC2254,6 feet of another chip termination TLC2254; 6 feet of resistance R3 mono-chip termination TLC2254,7 feet of another chip termination TLC2254; 1 foot of resistance R4 mono-chip termination TLC2254,10 feet of another chip termination TLC2254; 10 feet of resistance R5 mono-chip termination TLC2254,7 feet of another chip termination TLC2254; 4 feet of electric capacity C1 mono-termination positive supply VCC and chip TLC2254, another termination power ground; 11 feet of electric capacity C2 mono-termination negative supply VEE and chip TLC2254, other end ground connection; 1 foot of electric capacity C3 mono-chip termination TLC2254,8 feet of another chip termination TLC2254 of other end connecting resistance R6, resistance R6; 7 feet of electric capacity C4 mono-chip termination TLC2254,8 feet of another chip termination TLC2254 of other end connecting resistance R7, resistance R7; 8 feet and 9 feet of chip TLC2254 connect.

Be illustrated in figure 2 the circuit diagram of the preamplifying circuit that this utility model embodiment provides.

Being connected with MUC Acquisition Circuit 104, described preamplifying circuit 102 and described power circuit 105 respectively, for amplifying eeg signal, and described eeg signal being carried out to the rear class filtering and amplifying circuit 103 of Filtering Processing.

In this utility model embodiment, rear class filtering and amplifying circuit 103 is connected with MUC Acquisition Circuit 104, preamplifying circuit 102 and power circuit 105 respectively, eeg signal is amplified further and Filtering Processing is carried out to eeg signal, concrete: described rear class filtering and amplifying circuit 103 comprises chip AD8232, Chip-R R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, RS1, RS2, RS patch capacitor C9, C10, C11, C12, C13, C14, CRLD.Resistance R13 mono-terminating resistor R14 and resistance R15, another termination capacitor C10; 20 feet of another chip termination AD8232 of resistance R14,19 feet of another chip termination AD8232 of resistance R15; 6 feet of resistance R16 mono-chip termination AD8232,8 feet of another chip termination AD8232; 6 feet of resistance R17 mono-chip termination AD8232, other end connecting resistance R18 and electric capacity C12; 7 feet of another chip termination AD8232 of resistance R18; 8 feet of resistance R19 mono-chip termination AD8232,9 feet of another chip termination AD8232; 9 feet of resistance R20 mono-chip termination AD8232,10 feet of another chip termination AD8232; 18 feet of the one chip termination AD8232 of R21,17 feet of another chip termination AD8232; 18 feet of the one chip termination AD8232 of R22,16 feet of another chip termination AD8232; 15 feet of resistance RS1 mono-chip termination AD8232, another termination positive supply VCC; 15 feet of resistance RS2 mono-chip termination AD8232, another termination power ground; The one termination R13 of electric capacity C10,8 feet of another chip termination AD8232; 19 feet of electric capacity C11 mono-chip termination AD8232,6 feet of another chip termination AD8232; Electric capacity C12 mono-terminating resistor R17 and R18,10 feet of another chip termination AD8232; 7 feet of electric capacity C13 mono-chip termination AD8232,8 feet of another chip termination AD8232; Electric capacity C14 mono-termination positive supply VCC, another termination power ground; 4 feet of the one chip termination AD8232 of electric capacity CRLD, 5 feet of another chip termination AD8232; The 2 foot connecting resistance R6 of chip AD8232 and electric capacity C3; The 3 foot connecting resistance R7 of chip AD8232 and electric capacity C4; 10 feet of chip AD8232 connect 12 feet of chip TLC2254, and 13 feet of chip TLC2254 connect with 14 feet; 13 feet of chip AD8232,14 feet, 17 feet meet positive supply VCC; 16 feet of chip AD8232,21 feet connect power supply ground; 14 feet of resistance RS mono-chip termination TLC2254,20 feet of another termination STM8S003F3P6.

Be illustrated in figure 3 the circuit diagram of the rear class filtering and amplifying circuit that this utility model embodiment provides.

Be connected with described rear class filtering and amplifying circuit 103 and power circuit 105 respectively, for gathering the MUC Acquisition Circuit 104 through amplification, filtered simulation eeg signal.

In this utility model embodiment, MUC Acquisition Circuit 104 is connected with filtering and amplifying circuit 103 and power circuit 105 respectively, simulation eeg signal through amplification, filtering is gathered, concrete: MUC Acquisition Circuit 104 comprises chip STM8S003F3P6, electric capacity C21, C22, Chip-R R, R23, R24, patch capacitor C21, C22, C23, button S, paster LED lamp DS, single contact pin UART, SWD.8 feet of electric capacity C21 mono-chip termination STM8S003F3P6, another termination power ground; 9 feet of electric capacity C22 mono-termination positive supply VCC and chip STM8S003F3P6, another termination power ground; Resistance R mono-termination positive supply VCC, the forward end of another termination LED DS, the negative sense termination power ground of LED DS; 1 foot of single contact pin UART connects power supply ground, and 2 feet connect 3 feet of chip STM8S003F3P6, and 3 feet connect 2 feet of chip STM8S003F3P6, and 4 feet meet positive supply VCC; 1 foot of single contact pin SWD meets positive supply VCC, and 2 feet connect power supply ground, and 3 feet connect 18 feet of chip STM8S003F3P6, and 4 feet connect 4 feet of chip STM8S003F3P6.4 feet of button S mono-chip termination STM8S003F3P6, another termination power ground; 4 feet of electric capacity C23 chip STM8S003F3P6, another termination power ground; 18 feet of resistance R23 mono-chip termination STM8S003F3P6, another termination positive supply VCC; 4 feet of resistance R24 chip termination STM8S003F3P6, another termination positive supply VCC.

As an embodiment of the present utility model, described MUC Acquisition Circuit 104 is also for being converted into digital brain electrical ripple signal by simulation eeg signal.

As another embodiment of the present utility model, described MUC Acquisition Circuit 104 is also for exporting digital brain electrical ripple signal by serial ports.

Be illustrated in figure 4 the circuit diagram of the MUC Acquisition Circuit that this utility model embodiment provides.

Be connected with described preamplifying circuit 102, rear class filtering and amplifying circuit 103 and MUC Acquisition Circuit 104 respectively, for providing the power circuit 105 of power supply.

In this utility model embodiment, power circuit 105 is connected with preamplifying circuit 102, rear class filtering and amplifying circuit 103 and MUC Acquisition Circuit 104 respectively, for foregoing circuit provides power supply, concrete: power circuit 105 comprises patch capacitor C15, C16, C17, C18, C19, C20, inductance L 1, chip XC6206, chip TPS60403.3 feet of electric capacity C15 mono-termination positive supply VCC5V and chip XC6206, another termination power ground; 2 feet of electric capacity C16 mono-termination positive supply VCC and chip XC6206, another termination power ground; The 2 foot ground connection of chip XC6206; 2 feet of electric capacity C17 mono-termination positive supply VCC and chip TPS60403, another termination power ground; 1 foot of electric capacity C18 mono-chip termination TPS60403, another termination power ground; 3 feet of electric capacity C19 mono-chip termination TPS60403,5 feet of another chip termination TPS60403; Electric capacity C20 one end negative supply VEE, another termination power ground; Inductance L 1 one termination negative supply VEE, 1 foot of another chip termination TPS60403.

Be illustrated in figure 5 the circuit diagram of the power circuit that this utility model embodiment provides.

As this utility model embodiment, described eeg signal harvester also comprises:

Be connected with described external electrode 101 and power circuit 105 respectively, for eliminating the driven-right-leg circuit 106 of the work mould interference in eeg signal.

In this utility model embodiment, driven-right-leg circuit 106 is connected with external electrode 101 and power circuit 105 respectively, eliminate the work mould interference in eeg signal, concrete: driven-right-leg circuit 106 comprises TLC2252 operational amplifier, patch capacitor C5, C6, C7, C8, Chip-R R8, R9, R10, R11, R12.4 feet of one end order socket pin of resistance R8,1 foot of another chip termination TLC2252; 4 feet of resistance R9 one end order socket pin TRODE, the other end ground connection of another termination capacitor C7, electric capacity C7; 1 foot of resistance R10 mono-chip termination TLC2252,6 feet of another chip termination TLC2252; 6 feet of resistance R11 mono-chip termination TLC2252,7 feet of another chip termination TLC2252 of another termination capacitor C8, C8; 6 feet of the one chip termination TLC2252 of resistance R12,7 feet of another chip termination TLC2252; 4 feet of electric capacity C5 mono-termination positive supply VCC and chip TLC2252, another termination power ground; 8 feet of electric capacity C6 mono-termination negative supply VEE and chip TLC2252, other end ground connection; 3 feet of chip TLC2252 connect 8 feet of chip TLC2254, and 1 foot of chip TLC2252 connects with 2 feet, the 5 foot ground connection of chip TLC2252,3 feet of 7 foot order socket pin TRODE.

Be illustrated in figure 6 the circuit diagram of the driven-right-leg circuit that this utility model embodiment provides

One of ordinary skill in the art will appreciate that the unit included by above-described embodiment one is carry out dividing according to function logic, but be not limited to above-mentioned division, as long as corresponding function can be realized; In addition, the concrete title of each functional unit, also just for the ease of mutual differentiation, is not limited to protection domain of the present utility model.

Those of ordinary skill in the art it is also understood that, the all or part of step realized in above-described embodiment method is that the hardware that can carry out instruction relevant by program has come, described program can be stored in a computer read/write memory medium, described storage medium, comprises ROM/RAM, disk, CD etc.

The foregoing is only preferred embodiment of the present utility model; not in order to limit this utility model; all do within spirit of the present utility model and principle any amendment, equivalent to replace and improvement etc., all should be included within protection domain of the present utility model.

Claims

1. an eeg signal harvester, is characterized in that, described device comprises:

2. device as claimed in claim 1, it is characterized in that, described device also comprises:

3. device as claimed in claim 1, it is characterized in that, described MUC Acquisition Circuit is also for being converted into digital brain electrical ripple signal by simulation eeg signal.

4. device as claimed in claim 1, is characterized in that, described MUC Acquisition Circuit is also for exporting digital brain electrical ripple signal by serial ports.