CN205015408U

CN205015408U - Signal analyzer and signal processing device

Info

Publication number: CN205015408U
Application number: CN201520499922.1U
Authority: CN
Inventors: 贺惠农; 陈斌; 赵玉刚
Original assignee: HANGZHOU VICON TECHNOLOGY Co Ltd
Current assignee: HANGZHOU VICON TECHNOLOGY Co Ltd
Priority date: 2015-07-09
Filing date: 2015-07-09
Publication date: 2016-02-03
Anticipated expiration: 2025-07-09

Abstract

The utility model belongs to the test field of electrical property especially relates to a signal analyzer and signal processing device, including digital signal processing unit, analog signal processing unit, a central processing unit, digital signal processing unit for when digital signals input, the data signal's of specified input corresponding threshold values, and be the required level signal of a central processing unit with the data signal level conversion of input according to the corresponding threshold values confirmed, the analog signal processing unit for when analog signal inputed, the corresponding coupled modes dorsal radix that the analog signal of worker's selection input was handled to the analog signal process unit enlargied the analog signal who inputs for the required voltage of analog -to -digital conversion according to the corresponding coupled modes of confirming, the utility model discloses the beneficial effect of have that measurement accuracy height, sampling rate are high, the operational speed is high, signal analysis can the reinforce.

Description

A kind of signal analyzer and signal processing apparatus

Technical field

The invention belongs to the field tests of electrical property, particularly relate to a kind of signal analyzer and signal processing apparatus.

Background technology

Sensor is a kind of induction measurand, and convert thereof into the pick-up unit of electric signal, kind of sensor is a lot, divide according to purposes, acceleration transducer can be divided into, displacement transducer, speed pickup, speed probe and pressure transducer etc., sensor output signal is also varied, the type of output signal has simulating signal and digital signal, output amplitude also vary sensor use time, need to be equipped with corresponding sensor signal conditioning module, in actual control system, need different types of sensor, if every 1 sensor is all equipped with 1 Signal-regulated kinase, this can increase the complexity of system, therefore, the signals collecting of large-scale control system generally adopts concentrated collection, its Usage data collection and analyser gather and analyte sensors signal.

Some data collection and analysis instrument can carry out gather and analysis to simulating signal at present, the demand of a part of sensor signal conditioning can be met, but signal measurement and analytical performance general, and dutycycle, Cycle Length, frequency Measurement accuracy and analysis can not be carried out to the sensor that output signal is digital signal, in addition, on market, the rotating speed of digital signal measured by most digital signal measurement mechanism by single-chip microcomputer, measuring accuracy is not high, and can not carry out on-line analysis to signal.

Summary of the invention

The invention provides a kind of signal analyzer and signal processing apparatus, not high to solve the measuring accuracy proposed in above-mentioned background technology, and the problems such as on-line analysis can not be carried out to signal.

Technical matters solved by the invention realizes by the following technical solutions:

A kind of signal analyzer, it is characterized in that, described analyser comprises digital signal processing unit, analogy signal processing unit, CPU (central processing unit), described digital signal processing unit, for when digital signal inputs, determine the respective thresholds of the digital signal inputted, and according to the respective thresholds determined, the digital signal level of input is converted to level needed for CPU (central processing unit), described analogy signal processing unit, for when simulating signal inputs, the simulating signal of input is enlarged into analog to digital conversion required voltage according to the corresponding coupling scheme determined after manually selecting the corresponding coupling scheme of the simulating signal inputted by analogy signal processing unit, described CPU (central processing unit), for control figure signal processing unit, receive the digital signal through digital signal processing unit process, and to the digital signal computing of described input and process, described computing and process comprise dutycycle, cycle, the measurement of frequency, or for control simulation signal processing unit, and receive analog-to-digital analog signal data in analogy signal processing unit, and to the analog signal data computing of described input and process, described computing and process comprise the measurement of voltage, described digital signal processing unit input exports with sensor signal data and is connected, digital signal processing unit output inputs with CPU (central processing unit) first and is connected, described analogy signal processing unit input exports with sensor analog signals and is connected, analogy signal processing unit output inputs with CPU (central processing unit) second and is connected,

Further, described digital signal processing unit comprises Auto-matching module, for identifying the threshold values of different amplitude digital signal, and the digital signal of input is converted to Transistor-Transistor Logic level, it comprises the first protection circuit, first filtering circuit, signal transformation circuit and D/A converting circuit, described first protection circuit is used for carrying out overvoltage protection and electrostatic protection to input signal, described first filtering circuit is used for the high frequency interference in filtered input signal, described signal transformation circuit is used for the Transistor-Transistor Logic level of comparator input signal and threshold voltage and outputting standard, described D/A converting circuit produces threshold voltage, described level switch module, comprise level shifting circuit, identification signal is converted to for TTL signal, described identification signal is the signal that CPU (central processing unit) receives, described signal transformation circuit comprises digital regulation resistance, its model is MAX5439, described MAX5439 has 128 taps, for generation of different threshold voltage, signal transformation circuit comprises operational amplifier, described operational amplifier is OPA140, for exporting TTL signal, level shifting circuit comprises SN74LVC164245, identification signal is converted to for TTL signal, described identification signal is 0 ~ 3.3V signal,

Described analogy signal processing unit comprises Signal-regulated kinase, for gathering and conditioning simulating signal, output to analog-to-digital conversion module, it comprises the second protection circuit, second filtering circuit, coupling scheme selection circuit and gain adjusting circuit, described second protection circuit is used for carrying out overvoltage protection and electrostatic protection to input signal, filtering circuit is used for the high frequency interference in filtered input signal, coupling scheme selection circuit is used for selecting signal coupling mode through CPU (central processing unit), described coupling scheme comprise differential DC coupling scheme, difference AC-coupled mode, single-end DC coupling scheme, single-ended AC coupling mode and ICP coupling scheme, gain adjusting circuit is used for being amplified by input signal through CPU (central processing unit), analog-to-digital conversion module, comprise Anti-aliasing Filter Circuits and analog to digital conversion circuit, described Anti-aliasing Filter Circuits is used for carrying out anti-aliasing filter process to signal, analog to digital conversion circuit is used for converting simulating signal to digital signal, described gain adjusting circuit comprises high-accuracy low consumed power operational amplifier, described high-accuracy low consumed power operational amplifier is AD8682, analog-digital conversion circuit as described comprises ADC chip, described ADC chip is through CPU (central processing unit) programming Control, described ADC chip is high-precision low-power consumption A/D chip, described high-precision low-power consumption A/D chip is CS5361, described CS5361 has 24 bit data figure places, high s/n ratio, reach as high as the sampling rate of 204.8ksps,

Described CPU (central processing unit) comprises acquisition control module, for realizing the Auto-matching module application of digital signal, Signal-regulated kinase is applied, the programming Control of analog-to-digital conversion module application, it comprises FPGA module, described FPGA module has program module, described program module comprises threshold values Auto-matching module application, digital signal Measurement and analysis module application, gain adjusting circuit control module is applied, analog to digital conversion circuit control module is applied, synchronizing signal processing module is applied, computing module, for processing in real time and computing digital signal, threshold values Auto-matching module application, compare for described acquisition control module domination number analog conversion circuit generation initial value and input signal, acquisition control module is to interpretation of result, judge the output valve whether threshold values of D/A converting circuit, if not threshold values, change the input of D/A converting circuit, the output of D/A converting circuit is made to be exactly the corresponding threshold voltage of input signal, digital signal Measurement and analysis module application, for analyzing digital signal, calculate dutycycle and the Cycle Length of digital signal, calculate the characteristic information of digital signal, signal conditioning circuit control module is applied, for selecting coupling scheme and gain factor, analog to digital conversion circuit control module is applied, for to analog-to-digital conversion module programming Control, chip is made to have different sampling rate, synchronizing signal processing module is applied, for the digital signal to each passage, simulating signal synchronously processes, make each channel signal synchronous,

The digital signal of described sensor exports and is connected with the input of the first protection circuit, first protection circuit exports and is connected with the input of the first filtering circuit, first filtering circuit exports and is connected with the signal input of signal transformation circuit, signal transformation circuit exports and is connected with level shifting circuit input, level shifting circuit output inputs with CPU (central processing unit) first and is connected, the shaping output of CPU (central processing unit) is connected with the input of D/A converting circuit, the output of D/A converting circuit is connected with the shaping of signal transformation circuit input, the analog signal output of described sensor is connected with the input of the second protection circuit, the output of the second protection circuit is connected with the input of the second filtering circuit, the output of the second filtering circuit is connected with the input of coupling scheme selection circuit, the output of coupling scheme selection circuit is connected with the input of the signal of gain adjusting circuit, the output of gain adjusting circuit is connected with the input of analog to digital conversion circuit, analog to digital conversion circuit output inputs with second of CPU (central processing unit) and is connected, the coupling of CPU (central processing unit) controls to export and is connected with the coupling control inputs of coupling scheme selection circuit, the gain-adjusted of CPU (central processing unit) exports and is connected with the gain-adjusted input of gain adjusting circuit, the data bus of described acquisition control module exports and is connected with the input of computing module data bus.

A kind of signal processing apparatus, it is characterized in that, described device comprises digital signal processing unit, CPU (central processing unit), described digital signal processing unit, for when digital signal inputs, determine the respective thresholds of the digital signal inputted, and according to the respective thresholds determined, the digital signal level of input is converted to level needed for CPU (central processing unit), CPU (central processing unit), for control figure signal processing unit, receive the digital signal through digital signal processing unit process, and calculate digital signal computing and the process of described input, described computing and process comprise dutycycle, cycle, the measurement of frequency, described digital signal processing unit input exports with sensor signal data and is connected, digital signal processing unit output inputs with CPU (central processing unit) first and is connected.

Described CPU (central processing unit) comprises acquisition control module, for realizing the Auto-matching module application mainly realizing digital signal, Signal-regulated kinase is applied, the programming Control of analog-to-digital conversion module application, it comprises FPGA module, described FPGA module has program module, described program module comprises threshold values Auto-matching module application, digital signal Measurement and analysis module application, gain adjusting circuit control module is applied, analog to digital conversion circuit control module is applied, synchronizing signal processing module is applied, computing module, for processing in real time and computing digital signal, described threshold values Auto-matching module application, compare for described acquisition control module domination number analog conversion circuit generation initial value and input signal, acquisition control module is to interpretation of result, judge the output valve whether threshold values of D/A converting circuit, if not threshold values, change the input of D/A converting circuit, the output of D/A converting circuit is made to be exactly the corresponding threshold voltage of input signal, digital signal Measurement and analysis module application, for analyzing digital signal, calculate dutycycle and the Cycle Length of digital signal, calculate the characteristic information of digital signal, signal conditioning circuit control module is applied, for selecting coupling scheme and gain factor, analog to digital conversion circuit control module is applied, for to analog-to-digital conversion module programming Control, chip is made to have different sampling rate, synchronizing signal processing module is applied, for the digital signal to each passage, simulating signal synchronously processes, make each channel signal synchronous,

The digital signal of described sensor exports and is connected with the input of the first protection circuit, first protection circuit exports and is connected with the input of the first filtering circuit, first filtering circuit exports and is connected with the signal input of signal transformation circuit, signal transformation circuit exports and is connected with level shifting circuit input, level shifting circuit output inputs with CPU (central processing unit) first and is connected, the shaping output of CPU (central processing unit) is connected with the input of D/A converting circuit, the output of D/A converting circuit is connected with the shaping of signal transformation circuit input, the data bus of described acquisition control module exports and is connected with the input of computing module data bus.

A kind of signal processing apparatus, it is characterized in that, described device comprises analogy signal processing unit, CPU (central processing unit), described analogy signal processing unit, for when simulating signal inputs, the simulating signal of input is enlarged into analog to digital conversion required voltage according to the corresponding coupling scheme determined after manually selecting the corresponding coupling scheme of the simulating signal inputted by analogy signal processing unit, CPU (central processing unit), for control simulation signal processing unit, receive the simulating signal through analogy signal processing unit process, and calculate simulating signal computing and the process of described input, described computing and process comprise the measurement of voltage, described analogy signal processing unit input exports with sensor analog signals and is connected, analogy signal processing unit output inputs with CPU (central processing unit) second and is connected.

Further, described analogy signal processing unit comprises Signal-regulated kinase, for gathering and conditioning simulating signal, output to analog-to-digital conversion module, it comprises the second protection circuit, second filtering circuit, coupling scheme selection circuit and gain adjusting circuit, described second protection circuit is used for carrying out overvoltage protection and electrostatic protection to input signal, filtering circuit is used for the high frequency interference in filtered input signal, coupling scheme selection circuit is used for selecting signal coupling mode through CPU (central processing unit), described coupling scheme comprise differential DC coupling scheme, difference AC-coupled mode, single-end DC coupling scheme, single-ended AC coupling mode and ICP coupling scheme, gain adjusting circuit is used for being amplified by input signal through CPU (central processing unit), analog-to-digital conversion module, comprise Anti-aliasing Filter Circuits and analog to digital conversion circuit, described Anti-aliasing Filter Circuits is used for carrying out anti-aliasing filter process to signal, analog to digital conversion circuit is used for converting simulating signal to digital signal, described gain adjusting circuit comprises high-accuracy low consumed power operational amplifier, described high-accuracy low consumed power operational amplifier is AD8682, analog-digital conversion circuit as described comprises ADC chip, described ADC chip is through CPU (central processing unit) programming Control, described ADC chip is high-precision low-power consumption A/D chip, described high-precision low-power consumption A/D chip is CS5361, described CS5361 has 24 bit data figure places, high s/n ratio, reach as high as the sampling rate of 204.8ksps, described CPU (central processing unit) comprises acquisition control module, for realizing the Auto-matching module application mainly realizing digital signal, Signal-regulated kinase is applied, the programming Control of analog-to-digital conversion module application, it comprises FPGA module, described FPGA module has program module, described program module comprises threshold values Auto-matching module application, digital signal Measurement and analysis module application, gain adjusting circuit control module is applied, analog to digital conversion circuit control module is applied, synchronizing signal processing module is applied, computing module, for processing in real time and computing digital signal,

The analog signal output of described sensor is connected with the input of the second protection circuit, the output of the second protection circuit is connected with the input of the second filtering circuit, the output of the second filtering circuit is connected with the input of coupling scheme selection circuit, the output of coupling scheme selection circuit is connected with the input of the signal of gain adjusting circuit, the output of gain adjusting circuit is connected with the input of analog to digital conversion circuit, analog to digital conversion circuit output inputs with second of CPU (central processing unit) and is connected, the coupling of CPU (central processing unit) controls to export and is connected with the coupling control inputs of coupling scheme selection circuit, the gain-adjusted of CPU (central processing unit) exports and is connected with the gain-adjusted input of gain adjusting circuit, the data bus of described acquisition control module exports and is connected with the input of computing module data bus.

A kind of signal processing method, is characterized in that, when described method is included in digital signal input, front stage circuits determines the respective thresholds of the digital signal inputted, and according to the respective thresholds determined, the digital signal level of input is converted to level needed for rear class.

Further, described front stage circuits determines the respective thresholds of the digital signal inputted, and the digital signal level of input is converted to level needed for rear class according to the respective thresholds determined and comprises and presettingly compare threshold values, by the described threshold values that compares compared with the digital signal of input, judge whether the threshold values of the digital signal being input, if not, then change and compare threshold values, continue compared with the digital signal of input, until compare the threshold values that threshold values is the digital signal of input, according to current comparison threshold values, the digital signal level of input is converted to level needed for rear class, if, according to presetting comparison threshold values, the digital signal level of input is converted to level needed for rear class.

A kind of signal processing method, it is characterized in that, when described method is included in simulating signal input, front stage circuits determines the corresponding coupling scheme of the simulating signal inputted, and according to the corresponding coupling scheme determined, the simulating signal of input is enlarged into rear class required voltage.

Further, described front stage circuits determines the corresponding coupling scheme of the simulating signal inputted, and according to the corresponding coupling scheme determined, the simulating signal of input is enlarged into rear class required voltage and comprises presetting coupling scheme, the simulating signal of input is received by described coupling scheme, judge whether the simulating signal that can receive input, if can not, then change coupling scheme, continue to receive simulating signal, until receive the simulating signal of input, according to current coupling scheme, the simulating signal of input is enlarged into rear class required voltage, if can, then the simulating signal of input is enlarged into rear class required voltage.

The present invention uses digital regulation resistance, operational amplifier, level translator, FPGA is framework, constructs a kind of digital signal acquiring circuit of threshold voltage Auto-matching, has and can carry out dutycycle to digital signal, Cycle Length, the information such as frequency carry out the Advantageous Effects of high-acruracy survey, with operational amplifier, AD converter is framework, constructs a kind of coupling scheme, the analog signal conditioner circuit that gain factor is adjustable, measuring accuracy is high, measures broad quantum, can be compatible single-ended, difference, the polytype simulating signals such as ICP, are core with FPGA+DSP, construct multichannel digital signal, the synchronous acquisition of simulating signal and analyser, have measuring accuracy high, sampling rate is high, arithmetic speed is high, signal analysis ability is strong, can realize multichannel digital signal, the synchronous acquisition of simulating signal and analysis, meet the demand of different sensors application, bring measuring accuracy high simultaneously, measurement range is wide, and Auto-matching digital signal voltage threshold values, can realize different amplitude, dutycycle, the threshold values Auto-matching of the digital signal of frequency, and the dutycycle to digital signal, Cycle Length, the information such as frequency carry out that accurate measuring and analysis measuring accuracy is high, and test specification is wide, can meet coupling scheme, the demand that the simulating signal of different amplitude is accurately measured, interactive operation is convenient, real time signal processing and analysis ability by force, can meet multichannel digital signal, the Advantageous Effects of the demand of the synchronous Real-time Collection of simulating signal and analysis to measure.

Accompanying drawing explanation

The total general schematic view of signal analyzer structure in Fig. 1 embodiment of the present invention;

The many logical total module diagrams of signal analyzer in Fig. 2 embodiment of the present invention;

Digital signal processing unit module diagram in Fig. 3 embodiment of the present invention;

Analogy signal processing unit module diagram in Fig. 4 embodiment of the present invention;

Analog-to-digital conversion module circuit diagram in analogy signal processing unit in Fig. 5 embodiment of the present invention;

Digital signal processing method schematic flow sheet in Fig. 6 a embodiment of the present invention;

Analog signal processing method schematic flow sheet in Fig. 6 b embodiment of the present invention;

The each high-level schematic functional block diagram of Fig. 7 embodiment of the present invention CPU (central processing unit).

In figure: 101-digital signal processing unit, 102-analogy signal processing unit, 103-CPU (central processing unit), 104-Auto-matching module, 105-first protection circuit, 106-first filtering circuit, 107-signal transformation circuit, 108-D/A converting circuit, 109-level switch module, 110-Signal-regulated kinase, 111-second protection circuit, 112-second filtering circuit, 113-coupling scheme selection circuit, 114-gain adjusting circuit, 115-analog-to-digital conversion module, 116-Anti-aliasing Filter Circuits, 117-analog to digital conversion circuit, 118-acquisition control module, 119-FPGA, 120-computing module, 121-level shifting circuit, 301-threshold values Auto-matching module application, 302-digital signal Measurement and analysis module application, 303-Signal-regulated kinase circuit control module is applied, 304-analog to digital conversion circuit control module is applied, 305-synchronizing signal processing module is applied, 501-digital signal processing unit inputs, 502-sensor signal data exports, 503-digital signal processing unit exports, 504-CPU (central processing unit) first inputs, 505-analogy signal processing unit inputs, 506-Sensor Analog Relay System exports, 507-analogy signal processing unit exports, 508-CPU (central processing unit) second inputs, the shaping of 510-CPU (central processing unit) exports, the shaping of 511-signal transformation circuit inputs, the coupling of 513-CPU (central processing unit) controls to export, 514-coupling scheme selection circuit coupling control inputs, 515-CPU (central processing unit) gain-adjusted exports, 516-gain adjusting circuit gain-adjusted inputs.

Embodiment

Below in conjunction with accompanying drawing, the present invention is described further:

Embodiment 1:

This example is that a kind of digital signal device is as Fig. 1, 2, shown in 3, this device comprises digital signal processing unit 101, when digital signal inputs, determine the respective thresholds of the digital signal inputted, and according to the respective thresholds determined, the digital signal level of input is converted to level needed for CPU (central processing unit), digital signal processing unit 101 comprises Auto-matching module 104, for identifying the threshold values of different amplitude digital signal, and the digital signal of input is converted to Transistor-Transistor Logic level, it comprises the first protection circuit 105, first filtering circuit 106, signal transformation circuit 107 and D/A converting circuit 108, first protection circuit 105 is for carrying out overvoltage protection and electrostatic protection to input signal, first filtering circuit 106 is for the high frequency interference in filtered input signal, signal transformation circuit 107 is for the Transistor-Transistor Logic level of comparator input signal and threshold voltage and outputting standard, D/A converting circuit 108 produces threshold voltage, level switch module 109, comprises level shifting circuit 121, converts identification signal to for TTL signal, and identification signal is the signal that CPU (central processing unit) 101 receives, signal transformation circuit 107 comprises digital regulation resistance, its model is MAX5439, MAX5439 has 128 taps, for generation of different threshold voltage, signal transformation circuit 107 comprises operational amplifier, and operational amplifier is OPA140, for exporting TTL signal, level shifting circuit 121 comprises SN74LVC164245, is converted to identification signal for TTL signal, and identification signal is 0 ~ 3.3V signal.CPU (central processing unit) 103, for control figure signal processing unit, receive the digital signal through digital signal processing unit process, and to the digital signal computing of described input and process, described computing and process comprise dutycycle, cycle, the measurement of frequency, or for control simulation signal processing unit, and receive analog-to-digital analog signal data in analogy signal processing unit, and to the analog signal data computing of described input and process, described computing and process comprise the measurement of voltage, CPU (central processing unit) comprises acquisition control module 118, for realizing the Auto-matching module application 301 mainly realizing digital signal, Signal-regulated kinase application 303, the programming Control of analog-to-digital conversion module application 304, it comprises FPGA module 119, FPGA module 119 has program module, program module comprises threshold values Auto-matching module application 301, digital signal Measurement and analysis module application 302, gain adjusting circuit control module application 303, analog to digital conversion circuit control module application 304, synchronizing signal processing module application 305, computing module 120, for processing in real time and computing digital signal, FPGA module 119 is Spartan-3A family chip, computing module 120 comprises dsp chip, dsp chip is DSP6000 family chip, DSP6000 family chip has 300MHz dominant frequency, digital signal processing unit input 501 exports 502 with sensor signal data and is connected, digital signal processing unit output 503 inputs 504 with CPU (central processing unit) first and is connected, the digital signal of sensor exports 502 and is connected with the input of the first protection circuit, first protection circuit exports and is connected with the input of the first filtering circuit, first filtering circuit exports and is connected with the signal input of signal transformation circuit, signal transformation circuit exports and is connected with level shifting circuit input, level shifting circuit output inputs 508 with CPU (central processing unit) first and is connected, the shaping of CPU (central processing unit) exports 510 and is connected with the input of D/A converting circuit, the output of D/A converting circuit inputs with the shaping 511 of signal transformation circuit and is connected, the data bus of acquisition control module exports and is connected with the input of computing module data bus.

As shown in Figure 7, CPU (central processing unit) 103 comprises threshold values Auto-matching module application 301, digital signal Measurement and analysis module application 302, gain adjusting circuit control module application 303, analog to digital conversion circuit control module application 304, synchronizing signal processing module application 305, threshold values Auto-matching module application 301, initial value is produced and input signal compares for acquisition control module 118 domination number analog conversion circuit 108, acquisition control module 118 pairs of interpretations of result, judge the output valve whether threshold values of D/A converting circuit 108, if not threshold values, change the input of D/A converting circuit 108, the output of D/A converting circuit 108 is made to be exactly the corresponding threshold voltage of input signal, the function of digital signal Measurement and analysis module application 302, for analyzing digital signal, calculate dutycycle and the Cycle Length of digital signal, calculate the characteristic information of digital signal, signal conditioning circuit control module application 303, for selecting coupling scheme and gain factor, analog to digital conversion circuit control module application 304, for to analog-to-digital conversion module programming Control, chip is made to have different sampling rate, the function of synchronizing signal processing module application 305, for the digital signal to each passage, simulating signal synchronously processes, make each channel signal synchronous.

In the present embodiment, Auto-matching module 104 is used to comprise the first protection circuit 105, first filtering circuit 106, signal transformation circuit 107 and D/A converting circuit 108, first protection circuit 105 pairs input signal carries out overvoltage protection and electrostatic protection, first filtering circuit 106 realizes the high frequency interference in filtered input signal, D/A converting circuit 108 produces the threshold voltage of input signal, input signal and threshold voltage compare by signal transformation circuit 107, the 5VTTL level of outputting standard, level shifting circuit 121 5VTTL signal is converted to this technological means of level signal that FPGA119 can identify, there is the Advantageous Effects of the threshold values that oneself can identify different amplitude digital signal.

Can the digital signal of input be converted to standard 5VTTL level, convert thereof into the level signal that FPGA can identify again, export to FPGA module, have and can carry out the Advantageous Effects that the information such as dutycycle, cycle, frequency carry out high-acruracy survey to digital signal.

Embodiment 2

This example is a kind of analog signal instrumentation, as Fig. 1, 2, 4, shown in 5, comprise analogy signal processing unit 102, for when simulating signal inputs, the simulating signal of input is enlarged into analog to digital conversion required voltage according to the corresponding coupling scheme determined after manually selecting the corresponding coupling scheme of the simulating signal inputted by analogy signal processing unit, analogy signal processing unit 102 comprises Signal-regulated kinase 110, for gathering and conditioning simulating signal, output to analog-to-digital conversion module, it comprises the second protection circuit 111, second filtering circuit 112, coupling scheme selection circuit 113 and gain adjusting circuit 114, second protection circuit 111 is for carrying out overvoltage protection and electrostatic protection to input signal, second filtering circuit is used for the high frequency interference in filtered input signal, coupling scheme selection circuit 113 is for selecting signal coupling mode through CPU (central processing unit) 103, coupling scheme comprise differential DC coupling scheme, difference AC-coupled mode, single-end DC coupling scheme, single-ended AC coupling mode and ICP coupling scheme, gain adjusting circuit 114 is for amplifying input signal through CPU (central processing unit) 103, analog-to-digital conversion module 115, comprises Anti-aliasing Filter Circuits 116 and analog to digital conversion circuit 117, and Anti-aliasing Filter Circuits 116 is for carrying out anti-aliasing filter process to signal, and analog to digital conversion circuit 117 is for converting simulating signal to digital signal, gain adjusting circuit 114 comprises high-accuracy low consumed power operational amplifier, high-accuracy low consumed power operational amplifier is AD8682, analog to digital conversion circuit 117 comprises ADC chip, ADC chip is through CPU (central processing unit) 103 programming Control, ADC chip is high-precision low-power consumption A/D chip, and high-precision low-power consumption A/D chip is that CS5361, CS5361 have 24 bit data figure places, high s/n ratio, reaches as high as the sampling rate of 204.8ksps.CPU (central processing unit) 103, for control figure signal processing unit, receive the digital signal through digital signal processing unit process, and to the digital signal computing of described input and process, described computing and process comprise dutycycle, cycle, the measurement of frequency, or for control simulation signal processing unit, and receive the analog signal data of digital-to-analog conversion in analogy signal processing unit, and to the analog signal data computing of described input and process, described computing and process comprise the measurement of voltage, CPU (central processing unit) comprises acquisition control module 118, for realizing the Auto-matching module application 301 mainly realizing digital signal, Signal-regulated kinase application 303, the programming Control of analog-to-digital conversion module application 304, it comprises FPGA module 119, FPGA module 119 has program module, program module comprises threshold values Auto-matching module application 301, digital signal Measurement and analysis module application 302, gain adjusting circuit control module application 303, analog to digital conversion circuit control module application 304, synchronizing signal processing module application 305, computing module 120, for processing in real time and computing digital signal, FPGA module 119 is Spartan-3A family chip, computing module 120 comprises dsp chip, dsp chip is DSP6000 family chip, DSP6000 family chip has 300MHz dominant frequency, analogy signal processing unit input 505 exports 506 with Sensor Analog Relay System and is connected, analogy signal processing unit output 507 inputs 508 with CPU (central processing unit) second and is connected, the analog signal output 505 of sensor is connected with the input of the second protection circuit, the output of the second protection circuit is connected with the input of the second filtering circuit, the output of the second filtering circuit is connected with the input of coupling scheme selection circuit, the output of coupling scheme selection circuit is connected with the input of the signal of gain adjusting circuit, the output of gain adjusting circuit is connected with the input of analog to digital conversion circuit, analog to digital conversion circuit output inputs 508 with second of CPU (central processing unit) and is connected, the coupling of CPU (central processing unit) controls output 513 and is connected with the coupling control inputs 514 of coupling scheme selection circuit, the gain-adjusted output 515 of CPU (central processing unit) inputs 516 with the gain-adjusted of gain adjusting circuit and is connected, the data bus of acquisition control module exports and is connected with the input of computing module data bus.

In the present embodiment, use signal conditioning circuit 110 to comprise the second protection circuit 111, second filtering circuit 112, coupling scheme selection circuit 113 and gain adjusting circuit 114, second protection circuit 111 pairs of input signals and carry out overvoltage protection and electrostatic protection, second filtering circuit 112 realizes the high frequency interference in filtered input signal, coupling scheme selection circuit 113 is by control FPGA119, select unlike signal coupling scheme, the coupling scheme selected have differential DC coupling scheme, difference AC-coupled mode, single-end DC coupling scheme, single-ended AC coupling mode and ICP coupling scheme, gain adjusting circuit 114 by input signal according to certain gain factor, signal is amplified, signal is enable better to mate the scope of analog to digital converter, improve the precision and sensitivity measured, by to FPGA119 programming Control, can switch and select the coupling scheme that match of sensor and select suitable gain factor, so both accurately can measure the high sensor signal of amplitude, there is the sensor signal that accurately test amplitude is low, a kind of coupling scheme, the analog signal conditioner circuit that gain factor is adjustable, measuring accuracy is high, measure broad quantum, can be compatible single-ended, difference, the Advantageous Effects of the polytype simulating signals such as ICP.

Analog-to-digital conversion module 115 converts input signal to digital signal, and analog-to-digital conversion module 115 comprises Anti-aliasing Filter Circuits 116 and ADC conversion chip composition.Wherein Anti-aliasing Filter Circuits carries out anti-aliasing filter process to the output signal of signal conditioning circuit, ADC conversion chip converts simulating signal to digital signal, programming Control is carried out to ADC conversion chip, there is the data conversion Advantageous Effects realizing different sampling rate.

Embodiment 3

This example is a kind of signal analyzer, as Fig. 1, 2, 3, 4, shown in 5, comprise digital signal processing unit 101, for when digital signal inputs, determine the respective thresholds of the digital signal inputted, and according to the respective thresholds determined, the digital signal level of input is converted to level needed for CPU (central processing unit), digital signal processing unit 101 comprises Auto-matching module 104, for identifying the threshold values of different amplitude digital signal, and the digital signal of input is converted to Transistor-Transistor Logic level, it comprises the first protection circuit 105, first filtering circuit 106, signal transformation circuit 107 and D/A converting circuit 108, first protection circuit 105 is for carrying out overvoltage protection and electrostatic protection to input signal, first filtering circuit 106 is for the high frequency interference in filtered input signal, signal transformation circuit 107 is for the Transistor-Transistor Logic level of comparator input signal and threshold voltage and outputting standard, D/A converting circuit 108 produces threshold voltage, level switch module 109, comprises level shifting circuit 121, converts identification signal to for TTL signal, and identification signal is the signal that CPU (central processing unit) 101 receives, signal transformation circuit 107 comprises digital regulation resistance, its model is MAX5439, MAX5439 has 128 taps, for generation of different threshold voltage, signal transformation circuit 107 comprises operational amplifier, and operational amplifier is OPA140, for exporting TTL signal, level shifting circuit 121 comprises SN74LVC164245, is converted to identification signal for TTL signal, and identification signal is 0 ~ 3.3V signal.

Analogy signal processing unit 102, for when simulating signal inputs, the simulating signal of input is enlarged into analog to digital conversion required voltage according to the corresponding coupling scheme determined after manually selecting the corresponding coupling scheme of the simulating signal inputted by analogy signal processing unit, analogy signal processing unit 102 comprises: Signal-regulated kinase 110, for gathering and conditioning simulating signal, output to analog-to-digital conversion module, it comprises the second protection circuit 111, second filtering circuit 112, coupling scheme selection circuit 113 and gain adjusting circuit 114, second protection circuit 111 is for carrying out overvoltage protection and electrostatic protection to input signal, second filtering circuit is used for the high frequency interference in filtered input signal, coupling scheme selection circuit 113 is for selecting signal coupling mode through CPU (central processing unit) 103, coupling scheme comprise differential DC coupling scheme, difference AC-coupled mode, single-end DC coupling scheme, single-ended AC coupling mode and ICP coupling scheme, gain adjusting circuit 114 is for amplifying input signal through CPU (central processing unit) 103, analog-to-digital conversion module 115, comprises Anti-aliasing Filter Circuits 116 and analog to digital conversion circuit 117, and Anti-aliasing Filter Circuits 116 is for carrying out anti-aliasing filter process to signal, and analog to digital conversion circuit 117 is for converting simulating signal to digital signal, gain adjusting circuit 114 comprises high-accuracy low consumed power operational amplifier, high-accuracy low consumed power operational amplifier is AD8682, analog to digital conversion circuit 117 comprises ADC chip, ADC chip is through CPU (central processing unit) 103 programming Control, ADC chip is high-precision low-power consumption A/D chip, and high-precision low-power consumption A/D chip is that CS5361, CS5361 have 24 bit data figure places, high s/n ratio, reaches as high as the sampling rate of 204.8ksps.

CPU (central processing unit) 103, for control figure signal processing unit, receive the digital signal through digital signal processing unit process, and to the digital signal computing of described input and process, described computing and process comprise dutycycle, cycle, the measurement of frequency, or for control simulation signal processing unit, and receive analog-to-digital analog signal data in analogy signal processing unit, and to the analog signal data computing of described input and process, described computing and process comprise the measurement of voltage, CPU (central processing unit) comprises acquisition control module 118, for realizing the Auto-matching module application 301 of digital signal, Signal-regulated kinase application 303, the programming Control of analog-to-digital conversion module application 304, it comprises FPGA module 119, FPGA module 119 has program module, program module comprises threshold values Auto-matching module application 301, digital signal Measurement and analysis module application 302, gain adjusting circuit control module application 303, analog to digital conversion circuit control module application 304, synchronizing signal processing module application 305, computing module 120, for processing in real time and computing digital signal, FPGA module 119 is Spartan-3A family chip, computing module 120 comprises dsp chip, dsp chip is DSP6000 family chip, DSP6000 family chip has 300MHz dominant frequency, analogy signal processing unit input 505 exports 506 with Sensor Analog Relay System and is connected, analogy signal processing unit output 507 inputs 508 with CPU (central processing unit) second and is connected, the analog signal output 505 of sensor is connected with the input of the second protection circuit, the output of the second protection circuit is connected with the input of the second filtering circuit, the output of the second filtering circuit is connected with the input of coupling scheme selection circuit, the output of coupling scheme selection circuit is connected with the input of the signal of gain adjusting circuit, the output of gain adjusting circuit is connected with the input of analog to digital conversion circuit, analog to digital conversion circuit output inputs 508 with second of CPU (central processing unit) and is connected, the coupling of CPU (central processing unit) controls output 513 and is connected with the coupling control inputs 514 of coupling scheme selection circuit, the gain-adjusted output 515 of CPU (central processing unit) inputs 516 with the gain-adjusted of gain adjusting circuit and is connected, the data bus of acquisition control module exports and is connected with the input of computing module data bus.

CPU (central processing unit) comprises acquisition control module 118, for realizing the Auto-matching module application 301 mainly realizing digital signal, Signal-regulated kinase application 303, the programming Control of analog-to-digital conversion module application 304, it comprises FPGA module 119, FPGA module 119 has program module, program module comprises threshold values Auto-matching module application 301, digital signal Measurement and analysis module application 302, gain adjusting circuit control module application 303, analog to digital conversion circuit control module application 304, synchronizing signal processing module application 305, computing module 120, for processing in real time and computing digital signal, FPGA module 119 is Spartan-3A family chip, computing module 120 comprises dsp chip, dsp chip is DSP6000 family chip, DSP6000 family chip has 300MHz dominant frequency.

Digital signal processing unit input 501 exports 502 with sensor signal data and is connected, digital signal processing unit output 503 inputs 504 with CPU (central processing unit) first and is connected, the digital signal of sensor exports 502 and is connected with the input of the first protection circuit, first protection circuit exports and is connected with the input of the first filtering circuit, first filtering circuit exports and is connected with the signal input of signal transformation circuit, signal transformation circuit exports and is connected with level shifting circuit input, level shifting circuit output inputs 508 with CPU (central processing unit) first and is connected, the shaping of CPU (central processing unit) exports 510 and is connected with the input of D/A converting circuit, the output of D/A converting circuit inputs with the shaping 511 of signal transformation circuit and is connected, analogy signal processing unit input 505 exports 506 with Sensor Analog Relay System and is connected, analogy signal processing unit output 507 inputs 508 with CPU (central processing unit) second and is connected, the analog signal output 505 of sensor is connected with the input of the second protection circuit, the output of the second protection circuit is connected with the input of the second filtering circuit, the output of the second filtering circuit is connected with the input of coupling scheme selection circuit, the output of coupling scheme selection circuit is connected with the input of the signal of gain adjusting circuit, the output of gain adjusting circuit is connected with the input of analog to digital conversion circuit, analog to digital conversion circuit output inputs 508 with second of CPU (central processing unit) and is connected, the coupling of CPU (central processing unit) controls output 513 and is connected with the coupling control inputs 514 of coupling scheme selection circuit, the gain-adjusted output 515 of CPU (central processing unit) inputs 516 with the gain-adjusted of gain adjusting circuit and is connected, the data bus of acquisition control module exports and is connected with the input of computing module data bus.

In the present embodiment, utilization FPGA module 119 achieves the Auto-matching module 104 to digital signal, Signal-regulated kinase 110, the PLC technology of analog-to-digital conversion module 115, acquisition control module 118 comprises FPGA119 chip and peripheral circuit composition thereof, the main program module of FPGA119 has threshold values Auto-matching module application 301, digital signal Measurement and analysis module application 302, signal conditioning circuit control module application 303, analog to digital conversion circuit control module application 304, synchronizing signal processing module application 305, the function of threshold values Auto-matching module application 301 is that FPGA119 domination number analog conversion circuit 108 produces initial value and input signal compares, FPGA119 is to interpretation of result, judge the output valve whether threshold values of D/A converting circuit, if not threshold values, FPGA119 changes the input of D/A converting circuit 108, the output of D/A converting circuit 108 is made to be exactly the corresponding threshold voltage of input signal, the function of digital signal Measurement and analysis module application 302 analyzes digital signal, dutycycle and the Cycle Length of digital signal can be calculated, and then calculating the information such as frequency of digital signal, the function of signal conditioning circuit control module application 303 selects coupling scheme and gain factor, the function of analog to digital conversion circuit control module application 304 controls ADC chip programming, makes chip have different sampling rate, the function of synchronizing signal processing module application 305 is the digital signals to each passage, simulating signal synchronously processes, make each channel signal synchronous, DSP module 120 pairs of digital signals process and computing in real time, primarily of dsp chip 120 and peripheral circuit composition thereof, the main program module of DSP has real-time signal analysis and processing module, in scheme, carry out the digital signal input of sensor, first through Auto-matching module 104, Auto-matching module 104 pairs of digital signals are protected and High frequency filter, and Auto-matching is carried out to the threshold values of digital signal, thus identify the threshold values of different digital signal, then the digital signal of input is converted to standard 5VTTL level, and then convert thereof into the level signal that FPGA119 can identify, export to FPGA119 module.Carry out the simulating signal of sensor first through Signal-regulated kinase 110, Signal-regulated kinase 110 pairs of simulating signals carry out filtering, then the corresponding signal coupling mode of simulating signal is selected by coupling scheme selection circuit 113, then the gain enlargement factor of signal is selected by gain adjusting circuit 114, again by analog-to-digital conversion module 115, changed and changed into digital signal, passed to FPGA119 module.The signal of FPGA119 to all passages synchronously processes, and calculates dutycycle and the Cycle Length of sensor signal data, and then the information such as the frequency calculating signal, passes to DSP module 120; Meanwhile, digital signal corresponding for sensor analog signals reads by FPGA119, passes to DSP module 120.DSP module carries out real-time analysis and process to the signal received, have that measuring accuracy is high, sampling rate is high, fast operation, signal analysis ability are strong, multichannel digital signal, the synchronous acquisition of simulating signal and analysis can be realized, meet the Advantageous Effects of the demand of different sensors application.

In a particular application, the D/A converting circuit 108 in Auto-matching module 104 is made up of the digital regulation resistance MAX5439 of Maxim and peripheral circuit thereof, has 128 taps, can produce required different threshold voltages; Signal transformation circuit adopts operational amplifier OPA140 and the peripheral circuit composition of TI, can export the TTL signal of 0 ~ 5V; Level shifting circuit adopts the SN74LVC164245 chip of TI, the TTL signal of 0 ~ 5V can be converted to the TTL signal of 0 ~ 3.3V that FPGA can identify, signal conditioning circuit adopts high-accuracy low consumed power operational amplifier AD8682, ultra-low-distortion, signal to noise ratio (S/N ratio) is high, can the accurate measurement of real simulating signal; Adopt the high-precision low-power consumption A/D chip CS5361 of CirrusLogic company in A/D convertor circuit, data bits 24, signal to noise ratio (S/N ratio) is high, and sampling rate reaches as high as 204.8ksps, fully meets the signals collecting requirement in signal measurement field.FPGA module adopts the Spartan-3A family chip of Xilinx company, and DSP adopts the DSP6000 family chip of TI company, and dominant frequency is high to 300MHz, has the Advantageous Effects of the real-time signal analysis process that fully can meet signal measurement field.

By technical scheme as above, be not difficult to find out with digital regulation resistance, operational amplifier, level translator, FPGA as framework, construct a kind of digital signal acquiring circuit of threshold voltage Auto-matching, can carry out the information such as dutycycle, Cycle Length, frequency to digital signal carries out high-acruracy survey simultaneously.With operational amplifier, AD converter is framework, constructs a kind of coupling scheme, the analog signal conditioner circuit that gain factor is adjustable, measuring accuracy is high, measures broad quantum, can be compatible single-ended, difference, the polytype simulating signals such as ICP, are core with FPGA+DSP, construct multichannel digital signal, the synchronous acquisition of simulating signal and analyser, have measuring accuracy high, sampling rate is high, arithmetic speed is high, signal analysis ability is strong, can realize multichannel digital signal, the synchronous acquisition of simulating signal and analysis, meet the Advantageous Effects of the demand of different sensors application, bring measuring accuracy high simultaneously, measurement range is wide, and Auto-matching digital signal voltage threshold values, can realize different amplitude, dutycycle, the threshold values Auto-matching of the digital signal of frequency, and the dutycycle to digital signal, Cycle Length, the information such as frequency carry out that accurate measuring and analysis measuring accuracy is high, and test specification is wide, can meet coupling scheme, the demand that the simulating signal of different amplitude is accurately measured, interactive operation is convenient, real time signal processing and analysis ability by force, can meet multichannel digital signal, the Advantageous Effects of the demand of the synchronous Real-time Collection of simulating signal and analysis to measure.

Under same technical conceive and Design Conception, in embodiments of the present invention, also achieve a kind of signal processing method, as shown in Figure 6 a, when digital signal inputs, front stage circuits determines the respective thresholds of the digital signal inputted, and according to the respective thresholds determined, the digital signal level of input is converted to level needed for rear class, and described method also comprises:

Presettingly compare threshold values 201, by the described threshold values that compares compared with the digital signal of input, judge whether the threshold values 202 of the digital signal being input, if not, then change and compare threshold values, continue compared with the digital signal of input, until compare the threshold values that threshold values is the digital signal of input, according to current comparison threshold values, the digital signal level of input is converted to level 203 needed for rear class, if so, according to presetting comparison threshold values, the digital signal level of input is converted to level 204 needed for rear class.

Under same technical conceive and Design Conception, in an embodiment of the present invention, also achieve a kind of signal processing method, as shown in Figure 6 b, when simulating signal inputs, front stage circuits determines the corresponding coupling scheme of the simulating signal inputted, and according to the corresponding coupling scheme determined, the simulating signal of input is enlarged into rear class required voltage, and described method also comprises:

Presetting coupling scheme 205, the simulating signal of input is received by described coupling scheme, judge whether the simulating signal 206 that can receive input, if can not, then change coupling scheme, continue to receive simulating signal, until receive the simulating signal of input, according to current coupling scheme, the simulating signal of input is enlarged into rear class required voltage 207, if can, then the simulating signal of input is enlarged into rear class required voltage 208.

Utilize technical scheme of the present invention, or those skilled in the art being under the inspiration of technical solution of the present invention, designing similar technical scheme, and reach above-mentioned technique effect, is all fall into protection scope of the present invention.

Claims

1. a signal analyzer, is characterized in that, described analyser comprises:

Digital signal processing unit, analogy signal processing unit, CPU (central processing unit), described digital signal processing unit, for when digital signal inputs, determine the respective thresholds of the digital signal inputted, and according to the respective thresholds determined, the digital signal level of input is converted to level needed for CPU (central processing unit), described analogy signal processing unit, for when simulating signal inputs, the simulating signal of input is enlarged into analog to digital conversion required voltage according to the corresponding coupling scheme determined after manually selecting the corresponding coupling scheme of the simulating signal inputted by analogy signal processing unit, described CPU (central processing unit), for control figure signal processing unit, receive the digital signal through digital signal processing unit process, and to the digital signal computing of described input and process, described computing and process comprise dutycycle, cycle, the measurement of frequency, or for control simulation signal processing unit, and receive analog-to-digital analog signal data in analogy signal processing unit, and to the analog signal data computing of described input and process, described computing and process comprise the measurement of voltage,

Described digital signal processing unit input exports with sensor signal data and is connected, digital signal processing unit output inputs with CPU (central processing unit) first and is connected, described analogy signal processing unit input exports with sensor analog signals and is connected, and analogy signal processing unit output inputs with CPU (central processing unit) second and is connected.

2. a kind of signal analyzer according to claim 1, it is characterized in that, described digital signal processing unit comprises Auto-matching module, for identifying the threshold values of different amplitude digital signal, and the digital signal of input is converted to Transistor-Transistor Logic level, it comprises the first protection circuit, first filtering circuit, signal transformation circuit and D/A converting circuit, described first protection circuit is used for carrying out overvoltage protection and electrostatic protection to input signal, described first filtering circuit is used for the high frequency interference in filtered input signal, described signal transformation circuit is used for comparator input signal and threshold voltage and the Transistor-Transistor Logic level of outputting standard, described D/A converting circuit produces threshold voltage, described level switch module, comprise level shifting circuit, identification signal is converted to for TTL signal, described identification signal is the signal that CPU (central processing unit) receives, described signal transformation circuit comprises digital regulation resistance, its model is MAX5439, described MAX5439 has 128 taps, for generation of different threshold voltage, signal transformation circuit comprises operational amplifier, described operational amplifier is OPA140, for exporting TTL signal, level shifting circuit comprises SN74LVC164245, identification signal is converted to for TTL signal, described identification signal is 0 ~ 3.3V signal,

3. a signal processing apparatus, is characterized in that, described device comprises:

Digital signal processing unit, CPU (central processing unit), described digital signal processing unit, for when digital signal inputs, determine the respective thresholds of the digital signal inputted, and according to the respective thresholds determined, the digital signal level of input is converted to level needed for CPU (central processing unit), CPU (central processing unit), for control figure signal processing unit, receive the digital signal through digital signal processing unit process, and calculate digital signal computing and the process of described input, described computing and process comprise dutycycle, cycle, the measurement of frequency, described digital signal processing unit input exports with sensor signal data and is connected, digital signal processing unit output inputs with CPU (central processing unit) first and is connected.

4. a kind of signal processing apparatus according to claim 3, it is characterized in that, described digital signal processing unit comprises Auto-matching module, for identifying the threshold values of different amplitude digital signal, and the digital signal of input is converted to Transistor-Transistor Logic level, it comprises the first protection circuit, first filtering circuit, signal transformation circuit and D/A converting circuit, described first protection circuit is used for carrying out overvoltage protection and electrostatic protection to input signal, described first filtering circuit is used for the high frequency interference in filtered input signal, described signal transformation circuit is used for comparator input signal and threshold voltage and the Transistor-Transistor Logic level of outputting standard, described D/A converting circuit produces threshold voltage, described level switch module, comprise level shifting circuit, identification signal is converted to for TTL signal, described identification signal is the signal that CPU (central processing unit) receives, described signal transformation circuit comprises digital regulation resistance, its model is MAX5439, described MAX5439 has 128 taps, for generation of different threshold voltage, signal transformation circuit comprises operational amplifier, described operational amplifier is OPA140, for exporting TTL signal, level shifting circuit comprises SN74LVC164245, identification signal is converted to for TTL signal, described identification signal is 0 ~ 3.3V signal,

Described CPU (central processing unit) comprises acquisition control module, for realizing the Auto-matching module application of digital signal, Signal-regulated kinase is applied, the programming Control of analog-to-digital conversion module application, it comprises FPGA module, described FPGA module has program module, described program module comprises threshold values Auto-matching module application, digital signal Measurement and analysis module application, gain adjusting circuit control module is applied, analog to digital conversion circuit control module is applied, synchronizing signal processing module is applied, computing module, for processing in real time and computing digital signal, described threshold values Auto-matching module application, compare for described acquisition control module domination number analog conversion circuit generation initial value and input signal, acquisition control module is to interpretation of result, judge the output valve whether threshold values of D/A converting circuit, if not threshold values, change the input of D/A converting circuit, the output of D/A converting circuit is made to be exactly the corresponding threshold voltage of input signal, digital signal Measurement and analysis module application, for analyzing digital signal, calculate dutycycle and the Cycle Length of digital signal, calculate the characteristic information of digital signal, signal conditioning circuit control module is applied, for selecting coupling scheme and gain factor, analog to digital conversion circuit control module is applied, for to analog-to-digital conversion module programming Control, chip is made to have different sampling rate, synchronizing signal processing module is applied, for the digital signal to each passage, simulating signal synchronously processes, make each channel signal synchronous,

5. a signal processing apparatus, is characterized in that, described device comprises:

Analogy signal processing unit, CPU (central processing unit), described analogy signal processing unit, for when simulating signal inputs, the simulating signal of input is enlarged into analog to digital conversion required voltage according to the corresponding coupling scheme determined after manually selecting the corresponding coupling scheme of the simulating signal inputted by analogy signal processing unit, CPU (central processing unit), for control simulation signal processing unit, receive the simulating signal through analogy signal processing unit process, and calculate simulating signal computing and the process of described input, described computing and process comprise the measurement of voltage, described analogy signal processing unit input exports with sensor analog signals and is connected, analogy signal processing unit output inputs with CPU (central processing unit) second and is connected.

6. a kind of signal processing apparatus according to claim 5, it is characterized in that, described analogy signal processing unit comprises Signal-regulated kinase, for gathering and conditioning simulating signal, output to analog-to-digital conversion module, it comprises the second protection circuit, second filtering circuit, coupling scheme selection circuit and gain adjusting circuit, described second protection circuit is used for carrying out overvoltage protection and electrostatic protection to input signal, filtering circuit is used for the high frequency interference in filtered input signal, coupling scheme selection circuit is used for selecting signal coupling mode through CPU (central processing unit), described coupling scheme comprise differential DC coupling scheme, difference AC-coupled mode, single-end DC coupling scheme, single-ended AC coupling mode and ICP coupling scheme, gain adjusting circuit is used for being amplified by input signal through CPU (central processing unit), analog-to-digital conversion module, comprise Anti-aliasing Filter Circuits and analog to digital conversion circuit, described Anti-aliasing Filter Circuits is used for carrying out anti-aliasing filter process to signal, analog to digital conversion circuit is used for converting simulating signal to digital signal, described gain adjusting circuit comprises high-accuracy low consumed power operational amplifier, described high-accuracy low consumed power operational amplifier is AD8682, analog-digital conversion circuit as described comprises ADC chip, described ADC chip is through CPU (central processing unit) programming Control, described ADC chip is high-precision low-power consumption A/D chip, described high-precision low-power consumption A/D chip is CS5361, described CS5361 has 24 bit data figure places, high s/n ratio, reach as high as the sampling rate of 204.8ksps, described CPU (central processing unit) comprises acquisition control module, for realizing the Auto-matching module application mainly realizing digital signal, Signal-regulated kinase is applied, the programming Control of analog-to-digital conversion module application, it comprises FPGA module, described FPGA module has program module, described program module comprises threshold values Auto-matching module application, digital signal Measurement and analysis module application, gain adjusting circuit control module is applied, analog to digital conversion circuit control module is applied, synchronizing signal processing module is applied, computing module, for processing in real time and computing digital signal,