CN204948482U - A kind of intelligent HID digital ballast - Google Patents
A kind of intelligent HID digital ballast Download PDFInfo
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- CN204948482U CN204948482U CN201520502672.2U CN201520502672U CN204948482U CN 204948482 U CN204948482 U CN 204948482U CN 201520502672 U CN201520502672 U CN 201520502672U CN 204948482 U CN204948482 U CN 204948482U
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Abstract
A kind of intelligent HID digital ballast, comprise rectification circuit, circuit of power factor correction, timing dimming circuit, protective circuit, half-bridge output circuit, HID light source, start-up circuit, voltage sampling circuit, current sampling circuit, power measurement circuit, parameter transfer circuit and single machine unit, the input of voltage sampling circuit is connected with power supply, voltage sampling circuit output is connected with single machine unit with power measurement circuit respectively, the input of current sampling circuit is connected with power supply, the output of current sampling circuit is connected with single machine unit with power measurement circuit respectively, the output of power measurement circuit is connected with single machine unit, parameter transfer circuit is connected with single machine unit, single machine unit is connected with start-up circuit with timing dimming circuit respectively.Possess timing dimming on a large scale, electrical quantity collection and the intelligent functions such as transmission, real-time switch control rule, meet user demand.
Description
Technical field
The utility model relates to a kind of digital ballast, relates to a kind of intelligent HID digital ballast in particular.
Background technology
Ballast is fluorescent lamp, gaseous discharge lamp plays metering function and produce the equipment of instantaneous pressure, and it is divided into electric ballast and Inductive ballast; Electric ballast is converter power frequency AC being converted to high-frequency ac power.HID digital ballast is the driving power of HID lamp, have that volume is little, lightweight, power savings is obvious, reliability is high, to advantages such as electric network pollution are little, now replace the original Inductive ballast of HID lamp tool in a large number, become first choice of green energy conservation illuminating product.
At present, existing HID electronic ballast, majority does not have timing dimming function, or timing dimming scope is wide not; Do not possess voltage, electric current, the isoparametric acquisition function of power simultaneously, operationally do not possess the real-time transmitting function of electrical quantity, bring a lot of restriction therefore to the use of user, can not user demand be met.
Summary of the invention
The purpose of this utility model is do not possess electrical quantity real-time precise acquisition function for existing HID electronic ballast majority, operationally do not possess the real-time transmitting function of electrical quantity, can not meet the defects such as user demand, provides a kind of intelligent HID digital ballast based on High Performance SCM.
The utility model for achieving the above object, adopt technical solution to be: a kind of intelligent HID digital ballast, comprise rectification circuit, circuit of power factor correction, timing dimming circuit, protective circuit, half-bridge output circuit, HID light source and start-up circuit, the input of described rectification circuit is connected with power supply, the output of rectification circuit is connected with the input of circuit of power factor correction, the output of described circuit of power factor correction is connected with the input of timing dimming circuit, the output of described timing dimming circuit is connected with the input of half-bridge output circuit, the output of described half-bridge output circuit is connected with the input of HID light source and start-up circuit respectively, the output of described start-up circuit is connected with HID light source, simultaneously, current output line in half-bridge output circuit is by being connected with the input of protective circuit after series resistance, the output of described protective circuit is connected with the control end of timing dimming circuit, include voltage sampling circuit, current sampling circuit, power measurement circuit, parameter transfer circuit and single machine unit, the input of described voltage sampling circuit is connected with power supply, voltage sampling circuit output is connected with single machine unit with power measurement circuit respectively, the input of described current sampling circuit is connected with power supply, the output of current sampling circuit is connected with single machine unit with power measurement circuit respectively, the output of described power measurement circuit is connected with single machine unit, described parameter transfer circuit is connected with single machine unit, described single machine unit is connected with start-up circuit with timing dimming circuit respectively.
Described voltage sampling circuit comprises resistance R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, voltage sample chip U1, double diode T1, T2, electric capacity C1, C2, C3, C4, C5 and inductance L 1, the current input terminal of the one termination voltage sample chip U1 of L2, described resistance R4, the other end of resistance R4 and R3, R2, R1, R8, R7, R6 and R5 connects successively, the input side of another termination rectification circuit of resistance R5, and the current output terminal of described voltage sample chip U1 connects the input side of rectification circuit, described double diode T1, T2 is respectively three terminal device, and 1 pin of double diode T1 is connected with 1 pin of T2, and 2 pin of T1 are connected with 2 pin of T2, and 3 pin of T1 are connected with one end of inductance L 1, and 3 pin of T2 are connected with one end of inductance L 2, described inductance C1, C2, C3, C4 and inductance L 1, L2 forms pi type filter, and described resistance R10 and electric capacity C5 forms RC low pass filter, and one end one end of connecting resistance R10 and other end of inductance L 1 respectively of described resistance R9, the other end of resistance R9 connects the other end of L2 and one end of C5 respectively.
Described current sampling circuit comprises current sample chip U2, electric capacity C6, C7, C8, C9, C10, inductance L 3, L4, double diode T3, T4, resistance R11, R12, R13, described double diode T3, T4 is respectively three terminal device, 1 pin of double diode T3 is connected with 1 pin of T4, 2 pin of T3 are connected with 2 pin of T4, the input pin tap 220V AC power input line of described current sample chip U2, an output of current sample chip U2 connects 3 pin of double diode T3 and one end of inductance L 3 respectively, another output of sampling A/D chip U2 connects 3 pin of double diode T4 and one end of inductance L 4, described electric capacity C6 respectively, C7, C8, C9 and inductance L 3, L4 forms pi type filter, and described resistance R13 and electric capacity C10 form low pass filter, and described R11 and R12 is in parallel, the other end of inductance L 3 respectively with one end of R11, one end of R12 is connected with one end of resistance R13, the other end of inductance L 4 respectively with the other end of R11, the other end of R12 is connected with one end of electric capacity C10.
Described power measurement circuit comprises electric energy computation chip U3, resistance R14, R15, R16, R17, R18, R19, R20, electrochemical capacitor C11, C13, C15, electric capacity C123, C14, C16, C17, C18, C19, C20, C21, passive crystal oscillator Y1 and photoelectric coupled circuit, the output of described photoelectric coupled circuit is connected with the count pulse input pin of single machine unit, the output of the output voltage signal low pass filter of the one termination current sampling circuit of described R14 is with reference to positive pole, a current sampling signal input of another termination electric energy computation chip U3 of resistance R14, the output of the output voltage signal low pass filter in the one termination current sampling circuit of described resistance R15 is with reference to negative pole, the current sampling signal input pin of another termination electric energy computation chip U3 of resistance R15, the output of the output signal low pass filter of the one termination voltage sampling circuit of described resistance R16 is with reference to positive pole, one of tested voltage input end of another termination electric energy computation chip U3 of resistance R16, the output signal low pass filter output of the one termination voltage sampling circuit of described resistance R17 is with reference to negative pole, the tested voltage input end two of another termination electric energy computation chip U3 of resistance R17, the active power output of the one termination electric energy computation chip U3 of described resistance R18, the positive pole of light-emitting diode D1 in another termination photoelectric coupled circuit of resistance R18, the positive pole of the one termination 5V power supply of described resistance R19, the collector output of photoelectrical coupler in another termination photoelectric coupled circuit of resistance R19, one termination of described resistance R20 connects the active power output verification end of electric energy computation chip U3, the positive pole of another termination 5V power supply of resistance R20, described electrochemical capacitor C11, C13, electric capacity C12 and C14 is in parallel, the positive pole of electrochemical capacitor C11, one end of C12, the positive pole of C13 and one end of C14 connect the positive pole of 5V power supply respectively, the negative pole of electrochemical capacitor C11, the other end of C12, the negative pole of electrochemical capacitor C13 and the other end of electric capacity C14 connect the negative pole of 5V power supply respectively, the positive pole of described electrochemical capacitor C15 connects the positive pole of 5V power supply, the negative pole of electrochemical capacitor C15 connects the negative pole of 5V power supply, the reference voltage input of the one termination electric energy computation chip of described electric capacity C16, the negative pole of another termination 5V power supply of electric capacity C16, one end of described electric capacity C17 connects the clock source output of electric energy computation chip U3 and one end of passive crystal oscillator Y1 respectively, the negative pole of another termination 5V power supply of electric capacity C17, the clock source input of the one termination electric energy computation chip U3 of described electric capacity C18 and the passive crystal oscillator Y1 other end, the negative pole of another termination 5V power supply of electric capacity C18, described electric capacity C19, C20, C21 is in parallel, one end of electric capacity C19, one end of C20 and one end of C21 connect the active power of output checkout terminal of electric energy computation chip U3 respectively, the other end of electric capacity C19, the other end of C20 and the other end of C21 connect the negative pole of 5V power supply respectively.
Described parameter transfer circuit comprises power carrier interface circuit and power carrier signal treatment circuit, described power carrier interface circuit comprises coupling circuit, data transmit circuit and data receiver circuit, the coupling transformer T10 high pressure winding switching power end of described coupling circuit, the data input pin to be sent of described data transmit circuit connects the data modulated signal output in power carrier signal treatment circuit, the data output end of described data receiver circuit connects the external data modulation signal input in the data modem circuitry in power carrier signal treatment circuit, the pin 3 of the coupling transformer T10 in described coupling circuit is connected to the modulation signal output in power carrier data modem circuitry by data transmit circuit, in coupling circuit, the secondary end of coupling transformer T10 is connected to the modulation signal input in power carrier data modem circuitry by data receiver circuit.
Described data receiver circuit comprises electric capacity C22, C23, C24, diode D3, D4, inductance L 5 and resistance R21, described electric capacity C22, C23 and inductance L 5 form antiresonant circuit, one end of electric capacity C22, one end of one end of C23 and one end difference connecting resistance R21 of inductance L 5, the other end of electric capacity C22, the earth terminal AGND of the other end of C23 and the other end difference connection circuit plate of inductance L 5, coupling transformer T10 low pressure winding in another termination coupling circuit of described resistance R21 secondary, described diode D3 negative pole, the positive pole of diode D4 connects one end of electric capacity C24 respectively, the whole pole of diode D3, the earth terminal AGND of the negative pole difference connection circuit plate of diode D4, modulation signal input in another termination power line carrier, PLC data modem circuitry of electric capacity C24.
Described data transmit circuit comprises diode D5, D6, D7, D8, electric capacity C25, C26, C27, inductance L 6, resistance R23, R24, triode T6, T7, T8, T9, described diode D5 and D6 forms amplitude limiter circuit, the negative pole of diode D5 connects the positive pole of 9V power supply, the positive pole of diode D5 connects the negative pole of diode D6, the positive pole of diode D6 connects the negative pole of 9V power supply, the negative pole of described diode D7 connects the emitter of triode T8 and the positive pole of 9V power supply respectively, the positive pole of described diode D8 connects the emitter of triode T9 and the negative pole of 9V power supply respectively, the negative pole of diode D8 connects the base stage of triode T9, one end of the one termination inductance L 6 of described electric capacity C25, coupling transformer T10's in another termination coupling circuit of described inductance L 6 is secondary, the positive pole of another terminating diode D5 of electric capacity C25, one end of the one terminating resistor R24 of described electric capacity C26, the other end of electric capacity C26 connects the modulation signal output in the power carrier data modem circuitry in one end of electric capacity C27 and power carrier signal treatment circuit respectively, one end of the other end connecting resistance R23 of described electric capacity C27, another termination triode T9 of described resistance R23 base stage, the base stage of described triode T6 connects the collector electrode of triode T8, the collector electrode of triode T6 connects the positive pole of diode D5, the emitter of triode T6 connects the positive pole of 9V power supply, the base stage of described triode T7 connects the collector electrode of triode T9, the emitter of the collector connecting transistor T9 of triode T7, the emitter of triode T7 connects the collector electrode of triode T6, the base stage of described triode T8 connects the positive pole of diode D7.
Described power carrier signal treatment circuit comprises signal madulation and demodulation chip U4, electric capacity C29, C30, C31, C33, C34, C35, electrochemical capacitor C32, resistance R25, R26, passive crystal oscillator Y2 and Y3, one end of described electric capacity C29 and one end of electric capacity C30 connect 5V power cathode respectively, another termination signal madulation of electric capacity C29 and the crystal oscillator input of demodulation chip U4, another termination signal madulation of electric capacity C30 and the clock source input of demodulation chip U4, the two ends of described passive crystal oscillator Y2 connect respectively signal madulation and demodulation chip U4 clock source constrained input end, described electric capacity C31 and electrochemical capacitor C32 is in parallel, one end of electric capacity C31 and the positive pole of electrochemical capacitor C32 connect the positive pole of 5V power supply, the other end of electric capacity C31 and the negative pole of electrochemical capacitor C32 connect the negative pole of 5V power supply, the operating voltage of described signal madulation and demodulation chip U4 inputs the positive pole of termination 5V power supply, one end of described electric capacity C33 and one end of electric capacity C34 connect the negative pole of 5V power supply respectively, the input of another termination signal madulation of electric capacity C33 and the crystal oscillator of demodulation chip U4, the output of another termination signal madulation of electric capacity C34 and the crystal oscillator of demodulation chip U4, the two ends of described passive crystal oscillator Y3 connect input and the output of the crystal oscillator of signal madulation and demodulation chip U4 respectively, the one termination signal madulation of described electric capacity C35 and the power supply power-fail of demodulation chip U4 monitor external input terminals, the negative pole of another termination 9V power supply of electric capacity C35, the one termination signal madulation of described resistance R24 and the power supply power-fail of demodulation chip U4 monitor external input terminals, the positive pole of another termination 9V power supply of resistance R24, the one termination signal madulation of described resistance R26 and the power supply power-fail of demodulation chip U4 monitor external input terminals, another termination of resistance R26 connects the negative pole of 9V power supply, the electrification reset of described signal madulation and demodulation chip U4 and the electrification reset end of watchdog reset termination single-chip microcomputer, the house dog counter O reset input of signal madulation and demodulation chip U4 connects the conventional data input/output terminal of single-chip microcomputer, the universal serial bus input end of clock of signal madulation and demodulation chip U4 meets the I of single-chip microcomputer
2c universal serial bus clock signal terminal, the serial bus data input/output terminal of signal madulation and demodulation chip U4 meets the I of single-chip microcomputer
2c serial bus data signal end, the transmitting-receiving control input end of signal madulation and demodulation chip U4 connects the conventional data input/output terminal of single-chip microcomputer, the data transmit-receive input/output terminal of signal madulation and demodulation chip U4 connects the conventional data input/output terminal of single-chip microcomputer, the interrupt signal input of the external interrupt 0 of the data syn-chronization termination single-chip microcomputer of signal madulation and demodulation chip U4, the power supply power-fail indication output end of signal madulation and demodulation chip U4 connects the interrupt signal input of the external interrupt 1 of single-chip microcomputer.
The input of described rectification circuit is provided with EMI filter circuit, and the input of described EMI filter circuit is connected with power supply, and the output of EMI filter circuit is connected with the input of rectification circuit.
Described EMI filter circuit comprises electric capacity C36, C37, C38, C39, C40, resistance R27, common mode inductance L7, L8, with diode rectifier bridge T10, one end of described electric capacity C36, one end of electric capacity C37 and the input of common mode inductance L7 connect the current input terminal of current sampling circuit respectively with reference to positive pole with reference to positive pole, the other end of described electric capacity C37, one end of electric capacity C38 is connected with reference to negative pole with the input of common mode inductance L7, the other end of electric capacity C36, the other end earth connection incoming end PE respectively of electric capacity C38, one end of described electric capacity C39, one end of resistance R27 and the output of common mode inductance L7 connect the reference positive pole of the input of common mode inductance L8 respectively with reference to positive pole, the other end of electric capacity C39, the other end of resistance R27 and the output of common mode inductance L7 connect the input of common mode inductance L8 respectively with reference to negative pole with reference to negative pole, the output of described common mode inductance L8 connects 1 pin of diode rectifier bridge T10 with reference to positive pole, the output of common mode inductance L8 connects 2 pin of diode rectifier bridge T10 with reference to negative pole.
Compared with prior art, the beneficial effects of the utility model are:
The utility model comprises rectification circuit, circuit of power factor correction, timing dimming circuit, protective circuit, half-bridge output circuit, HID light source, start-up circuit, voltage sampling circuit, current sampling circuit, power measurement circuit, parameter transfer circuit and single machine unit, the input of voltage sampling circuit is connected with power supply, voltage sampling circuit output is connected with single machine unit with power measurement circuit respectively, the input of current sampling circuit is connected with power supply, the output of current sampling circuit is connected with single machine unit with power measurement circuit respectively, the output of power measurement circuit is connected with single machine unit, parameter transfer circuit is connected with single machine unit, single machine unit is connected with start-up circuit with timing dimming circuit respectively, compared to existing HID digital ballast, the utility model is by increasing High Performance SCM unit, high-accuracy voltage, current collection circuit, high accuracy power measurement circuit, the parameter transfer circuit of low error rate, make this HID digital ballast possess timing dimming on a large scale, electrical quantity collection and the intelligent functions such as transmission, real-time switch control rule, meet user demand.
Accompanying drawing explanation
Fig. 1 is the utility model structured flowchart.
Fig. 2 is the utility model electrical schematic diagram.
Embodiment
Illustrate below in conjunction with accompanying drawing and with embodiment, the utility model to be described in further detail.
See Fig. 1; a kind of intelligent HID digital ballast, comprises rectification circuit, circuit of power factor correction (APFC), timing dimming circuit, protective circuit, half-bridge output circuit, HID light source, start-up circuit, pressure sample circuit, current sampling circuit, power measurement circuit, parameter transfer circuit and single machine unit.Rectification circuit wherein, circuit of power factor correction, timing dimming circuit, protective circuit, half-bridge output circuit, HID light source and start-up circuit are existing HID digital ballast structure, this HID digital ballast is energy-efficient, the input of wherein said rectification circuit is connected with power supply, the output of rectification circuit is connected with the input of circuit of power factor correction, the output of described circuit of power factor correction is connected with the input of timing dimming circuit, the output of described timing dimming circuit is connected with the input of half-bridge output circuit, the output of described half-bridge output circuit is connected with the input of HID light source and start-up circuit respectively, the output of described start-up circuit is connected with HID light source, simultaneously, current output line in half-bridge output circuit is by being connected with the input of protective circuit after series resistance, the output of described protective circuit is connected with the control end of timing dimming circuit.During work, this HID digital ballast first obtains DC pulse moving voltage by rectifier circuit rectifies, this pulsating voltage carries out current waveform correction through circuit of power factor correction, carry out regulation output by timing dimming circuit according to the regulation time of timing light modulator setting themselves, resize ratio, then be transformed into the alternating current of 40Khz frequency by half-bridge output circuit.Before cold HID light source igniting, the alternating current of 40Khz produces 3kv ~ 5kv high pressure by start-up circuit, completes the start-up course (being commonly called as " igniting ") of cold lamp; After HID light source igniting, start-up circuit exits automatically, afterwards by half-bridge output circuit for HID light source provides stably output current.When open circuit, short circuit appear in light source, or when half-bridge output circuit breaks down, produce error protection signal by protective circuit, making timing dimming circuit adjust export ratio is zero, and half-bridge output circuit stops exporting 40Khz alternating current, guarantees the safety of whole circuit.
See Fig. 1, the input of described voltage sampling circuit is connected with power supply, and voltage sampling circuit output is connected with single machine unit with power measurement circuit respectively; Voltage sampling circuit and power supply input live wire, zero line in parallel after, obtain accurate, suitable sample voltage value, on the one hand export to power measurement circuit and do meritorious power calculation, deliver to single machine unit on the other hand and be voltage effective value A/D and change, coating-forming voltage effective value bit data.The input of described current sampling circuit is connected with power supply, and the output of current sampling circuit is connected with single machine unit with power measurement circuit respectively; After current sampling circuit power supply input live wire or zero line are connected, obtain accurate, suitable sampled current value, on the one hand export to power measurement circuit and do meritorious power calculation, deliver to single machine unit on the other hand and be current effective value A/D and change, formation current effective value bit data.The output of described power measurement circuit is connected with single machine unit, after the respective sampling effective value that power measurement circuit receives voltage sampling circuit, current sampling circuit is sent here, after treatment, active power value is delivered to the bit data transaction that single machine unit carries out active power in the form of a pulse.Described parameter transfer circuit is connected with single machine unit, and described single machine unit is connected with start-up circuit with timing dimming circuit respectively; Parameter transfer circuit is by the control signal of outside by process, and deliver to single machine unit, single machine unit controls timing dimming circuit and start-up circuit again according to the content of control signal; Meanwhile, the data such as electric current, voltage, power that it can obtain by single machine unit are sent to parameter transfer circuit, parameter transfer circuit by process after be sent to outside, process further for user or.The utility model can realize the brightness adjustment control completing power output setting ratio value (0% ~ 100%) in the timing of setting, can realize timely protection in case of a fault; Meanwhile, this single machine unit selects the high-performance ATmega32L single-chip microcomputer of Atmel Corporation, thus defines the intelligent HID digital ballast of the one possessing the functions such as electrical quantity collection, transmission, external control order reception.
See Fig. 2, described voltage sampling circuit comprises resistance R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, voltage sample chip U1, double diode T1, T2, electric capacity C1, C2, C3, C4, C5 and inductance L 1, L2; Described voltage sample chip U1 is special sampling A/D chip SPT204AD, and it is the milliampere level precision current transformer of specified input current 2mA, and its output-current rating is also 2mA, for being electric current by voltage transitions.The current input terminal of the one termination voltage sample chip U1 of described resistance R4, the other end of resistance R4 and R3, R2, R1, R8, R7, R6 and R5 connects successively, the input side of another termination rectification circuit of resistance R5, the current output terminal of described voltage sample chip U1 connects the input side of rectification circuit, described double diode T1, T2 is respectively three terminal device, 1 pin of double diode T1 is connected with 1 pin of T2, 2 pin of T1 are connected with 2 pin of T2, 3 pin of T1 are connected with one end of inductance L 1, 3 pin of T2 are connected with one end of inductance L 2, described inductance C1, C2, C3, C4 and inductance L 1, L2 forms pi type filter, described resistance R10 and electric capacity C5 forms RC low pass filter, one end one end of connecting resistance R10 and other end of inductance L 1 respectively of described resistance R9, the other end of resistance R9 connects the other end of L2 and one end of C5 respectively.The turn ratio of voltage sample chip U1 is 1:1, voltage sample chip U1 to learn from else's experience after the 220V electric main after overvoltage protection after input resistance resistance R1, R2, R3, R4, R5, R6, R7 and R8 current limliting, input current about becomes about 0.8mA, see Fig. 2, now the input current of voltage sample chip U1 is identical with output current size, and phase place is contrary; Voltage sample chip U1 output current by double diode T1 voltage clamping to about 1V, play a protective role; Harmonic wave again in C1, C2, C3, C4 and L1, L2 formation pi type filter filtering voltage; Because voltage sample needs to obtain voltage sampling signal, by resistance R9, current signal is converted to voltage signal, voltage signal after the RC low pass filter filtering radio-frequency component be made up of resistance R10 and electric capacity C5 again, finally delivers to power measurement circuit and is for further processing.
See Fig. 2, because power measurement circuit needs the live wire electric current collecting the input of existing HID digital ballast, therefore need to use current sampling circuit; Described current sampling circuit comprises current sample chip U2, electric capacity C6, C7, C8, C9, C10, inductance L 3, L4, double diode T3, T4, resistance R11, R12, R13.Described double diode T3, T4 are respectively three terminal device, and 1 pin of double diode T3 is connected with 1 pin of T4, and 2 pin of T3 are connected with 2 pin of T4.The input pin of described current sample chip U2 connects 220V AC power input line, in Fig. 2,3,4 pin of current sample chip U2 are input pin, this 3,4 pin connects 1 pin, 2 pin of the jumper switch J1 near mains input side zero line respectively, and wherein 1 pin of jumper switch J1 is tested current feedthrough, 2 pin are the exit of tested electric current; An output of current sample chip U2 connects 3 pin of double diode T3 and one end of inductance L 3 respectively, another output of sampling A/D chip U2 connects 3 pin of double diode T4 and one end of inductance L 4 respectively, in Fig. 2,1,2 pin of current sample chip U2 are output pin, 11 pin of current sample chip U2 connect 3 pin of double diode T3 and one end of inductance L 3 respectively, and 2 pin of current sample chip U2 connect 3 pin of double diode T4 and one end of inductance L 4 respectively.Described electric capacity C6, C7, C8, C9 and inductance L 3, L4 form pi type filter, described resistance R13 and electric capacity C10 forms low pass filter, described R11 and R12 is in parallel, the other end of inductance L 3 is connected with one end of resistance R13 with one end of R11, one end of R12 respectively, and the other end of inductance L 4 is connected with one end of electric capacity C10 with the other end of R11, the other end of R12 respectively.Described current sample chip U2 is for gathering the electric current in test line, this current sample chip U2 selection no-load voltage ratio is the threephase current transformer CT1 of 20:1, it is optimal chip within the scope of 1 ~ 5A, because ballast can not more than 5A at real work electric current, therefore the turn ratio of this threephase current transformer CT1 is for electing 20:1 as, to meet the input requirements of subsequent power metering circuit; This threephase current transformer CT1 has three-phase current acquisition function, because ballast is single phase power supply, here only by a phase wherein, i.e. 1,2,3,4 pin of CT1, wherein: 3,4 pin are current sample input pin, 1,2 pin are current sample output pin, during design, the rectifier of existing HID digital ballast input live wire is disconnected 3 pin being first connected to CT1 module, and 4 pin are connected to the live wire input of existing HID Digital Rectifier again, can complete current sample input.Electric current after sampling is about 0.7mA ~ 2mA, by double diode T3 clamper, again by the pi type filter filtering high order harmonic component of C6, C7, C8, C9 and L3, L4 composition, also by resistance R11, R12, the current signal of sampling will be converted to voltage signal, harmonic signal is sent into the measurement that power measurement circuit carries out voltage, electric current and active power by the low pass filter finally consisted of resistance R13 and electric capacity C10 again.
See Fig. 2, described power measurement circuit comprises electric energy computation chip U3, resistance R14, R15, R16, R17, R18, R19, R20, electrochemical capacitor C11, C13, C15, electric capacity C123, C14, C16, C17, C18, C19, C20, C21, passive crystal oscillator Y1 and photoelectric coupled circuit.The output of described photoelectric coupled circuit is connected with the count pulse input pin of single machine unit; The output reference positive pole of the output voltage signal low pass filter of the one termination current sampling circuit of described R14, a current sampling signal input of another termination electric energy computation chip U3 of resistance R14; The output reference negative pole of the output voltage signal low pass filter in the one termination current sampling circuit of described resistance R15, the current sampling signal input pin of another termination electric energy computation chip U3 of resistance R15; The output reference positive pole of the output signal low pass filter of the one termination voltage sampling circuit of described resistance R16, one of tested voltage input end of another termination electric energy computation chip U3 of resistance R16; The output signal low pass filter output reference negative pole of the one termination voltage sampling circuit of described resistance R17, the tested voltage input end two of another termination electric energy computation chip U3 of resistance R17.The active power output of the one termination electric energy computation chip U3 of described resistance R18, the positive pole of light-emitting diode D1 in another termination photoelectric coupled circuit of resistance R18; The positive pole of the one termination 5V power supply of described resistance R19, the collector output of photoelectrical coupler in another termination photoelectric coupled circuit of resistance R19.One termination of described resistance R20 connects the active power output verification end of electric energy computation chip U3, the positive pole of another termination 5V power supply of resistance R20.Described electrochemical capacitor C11, C13, electric capacity C12 and C14 is in parallel, the positive pole of electrochemical capacitor C11, one end of C12, the positive pole of C13 and one end of C14 connect the positive pole of 5V power supply respectively, the negative pole of electrochemical capacitor C11, the other end of C12, the negative pole of electrochemical capacitor C13 and the other end of electric capacity C14 connect the negative pole of 5V power supply respectively, the positive pole of described electrochemical capacitor C15 connects the positive pole of 5V power supply, the negative pole of electrochemical capacitor C15 connects the negative pole of 5V power supply, the reference voltage input of the one termination electric energy computation chip of described electric capacity C16, the negative pole of another termination 5V power supply of electric capacity C16, one end of described electric capacity C17 connects the clock source output of electric energy computation chip U3 and one end of passive crystal oscillator Y1 respectively, the negative pole of another termination 5V power supply of electric capacity C17, the clock source input of the one termination electric energy computation chip U3 of described electric capacity C18 and the passive crystal oscillator Y1 other end, the negative pole of another termination 5V power supply of electric capacity C18, described electric capacity C19, C20, C21 is in parallel, one end of electric capacity C19, one end of C20 and one end of C21 connect the active power of output checkout terminal of electric energy computation chip U3 respectively, the other end of electric capacity C19, the other end of C20 and the other end of C21 connect the negative pole of 5V power supply respectively.This electric energy computation chip U3 adopts the chip ADE7755 of ADI company of the U.S., wherein CF (22 pin) exports the pulse be directly proportional to electrical power, by this pulse through photoelectric coupled circuit, be linked into the count pulse input pin of single machine unit, by simple programming metrical pulse frequency, the current electrical power collected can be conversed.
See Fig. 2, the data of electrical quantity send takes power carrier mode, and therefore described parameter transfer circuit comprises power carrier interface circuit and power carrier signal treatment circuit; Described power carrier interface circuit comprises coupling circuit, data transmit circuit and data receiver circuit.The coupling transformer T10 high pressure winding switching power end of described coupling circuit, the data input pin to be sent of described data transmit circuit connects the data modulated signal output in power carrier signal treatment circuit.The data output end of described data receiver circuit connects the external data modulation signal input in the data modem circuitry in power carrier signal treatment circuit, the pin 3 of the coupling transformer T10 in described coupling circuit is connected to the modulation signal output in power carrier data modem circuitry by data transmit circuit, in coupling circuit, the secondary end of coupling transformer T10 is connected to the modulation signal input in power carrier data modem circuitry by data receiver circuit.Diode D9, D10 in this coupling circuit are mainly used in clamper, to prevent excessive surge current input.
See Fig. 2, described data receiver circuit comprises electric capacity C22, C23, C24, diode D3, D4, inductance L 5 and resistance R21.Described electric capacity C22, C23 and inductance L 5 form antiresonant circuit, one end of electric capacity C22, one end of one end of C23 and one end difference connecting resistance R21 of inductance L 5, the other end of electric capacity C22, the earth terminal AGND of the other end of C23 and the other end difference connection circuit plate of inductance L 5, coupling transformer T10 low pressure winding in another termination coupling circuit of described resistance R21 secondary, described diode D3 negative pole, the positive pole of diode D4 connects one end of electric capacity C24 respectively, the whole pole of diode D3, the earth terminal AGND of the negative pole difference connection circuit plate of diode D4, modulation signal input in another termination power line carrier, PLC data modem circuitry of electric capacity C24.The antiresonant circuit working point frequency that in data receiver circuit, electric capacity C22, C23 and inductance L 5 form is f=120khz, there is the frequency-selecting effect to 120khz signal, to realize amplifying the small-signal of input, thus improve the sensitivity of Received signal strength output.
See Fig. 2, described data transmit circuit comprises diode D5, D6, D7, D8, electric capacity C25, C26, C27, inductance L 6, resistance R23, R24, triode T6, T7, T8, T9.Described diode D5 and D6 forms amplitude limiter circuit, the negative pole of diode D5 connects the positive pole of 9V power supply, the positive pole of diode D5 connects the negative pole of diode D6, the positive pole of diode D6 connects the negative pole of 9V power supply, the negative pole of described diode D7 connects the emitter of triode T8 and the positive pole of 9V power supply respectively, the positive pole of described diode D8 connects the emitter of triode T9 and the negative pole of 9V power supply respectively, the negative pole of diode D8 connects the base stage of triode T9, one end of the one termination inductance L 6 of described electric capacity C25, coupling transformer T10's in another termination coupling circuit of described inductance L 6 is secondary, the positive pole of another terminating diode D5 of electric capacity C25, one end of the one terminating resistor R24 of described electric capacity C26, the other end of electric capacity C26 connects the modulation signal output in the power carrier data modem circuitry in one end of electric capacity C27 and power carrier signal treatment circuit respectively, one end of the other end connecting resistance R23 of described electric capacity C27, another termination triode T9 of described resistance R23 base stage, the base stage of described triode T6 connects the collector electrode of triode T8, the collector electrode of triode T6 connects the positive pole of diode D5, the emitter of triode T6 connects the positive pole of 9V power supply, the base stage of described triode T7 connects the collector electrode of triode T9, the emitter of the collector connecting transistor T9 of triode T7, the emitter of triode T7 connects the collector electrode of triode T6, the base stage of described triode T8 connects the positive pole of diode D7.Electric capacity C25 in this data transmit circuit and inductance L 6 are for adjusting emission current and waveform, reduce C25, increase L6 is by reduction emission current and improves waveform, otherwise increase emission current is increased wave distortion, and adjusting C25 and L6 will affect transmitting power and the oneself power consumption of coil simultaneously.Four triodes T6, T7, T8, T9 realize protecting step by step, and four diodes D5, D6, D7, D8 play a protective role.
See Fig. 2, described power carrier signal treatment circuit comprises signal madulation and demodulation chip U4, electric capacity C29, C30, C31, C33, C34, C35, electrochemical capacitor C32, resistance R25, R26, passive crystal oscillator Y2 and Y3.One end of described electric capacity C29 and one end of electric capacity C30 connect 5V power cathode respectively, another termination signal madulation of electric capacity C29 and the crystal oscillator input of demodulation chip U4, another termination signal madulation of electric capacity C30 and the clock source input of demodulation chip U4, the two ends of described passive crystal oscillator Y2 connect respectively signal madulation and demodulation chip U4 clock source constrained input end, described electric capacity C31 and electrochemical capacitor C32 is in parallel, one end of electric capacity C31 and the positive pole of electrochemical capacitor C32 connect the positive pole of 5V power supply, the other end of electric capacity C31 and the negative pole of electrochemical capacitor C32 connect the negative pole of 5V power supply, the operating voltage of described signal madulation and demodulation chip U4 inputs the positive pole of termination 5V power supply, one end of described electric capacity C33 and one end of electric capacity C34 connect the negative pole of 5V power supply respectively, the input of another termination signal madulation of electric capacity C33 and the crystal oscillator of demodulation chip U4, the output of another termination signal madulation of electric capacity C34 and the crystal oscillator of demodulation chip U4, the two ends of described passive crystal oscillator Y3 connect input and the output of the crystal oscillator of signal madulation and demodulation chip U4 respectively, the one termination signal madulation of described electric capacity C35 and the power supply power-fail of demodulation chip U4 monitor external input terminals, the negative pole of another termination 9V power supply of electric capacity C35, the one termination signal madulation of described resistance R24 and the power supply power-fail of demodulation chip U4 monitor external input terminals, the positive pole of another termination 9V power supply of resistance R24, the one termination signal madulation of described resistance R26 and the power supply power-fail of demodulation chip U4 monitor external input terminals, another termination of resistance R26 connects the negative pole of 9V power supply, the electrification reset of described signal madulation and demodulation chip U4 and the electrification reset end of watchdog reset termination single-chip microcomputer, the house dog counter O reset input of signal madulation and demodulation chip U4 connects the conventional data input/output terminal of single-chip microcomputer, the universal serial bus input end of clock of signal madulation and demodulation chip U4 meets the I of single-chip microcomputer
2c universal serial bus clock signal terminal, the serial bus data input/output terminal of signal madulation and demodulation chip U4 meets the I of single-chip microcomputer
2c serial bus data signal end, the transmitting-receiving control input end of signal madulation and demodulation chip U4 connects the conventional data input/output terminal of single-chip microcomputer, the data transmit-receive input/output terminal of signal madulation and demodulation chip U4 connects the conventional data input/output terminal of single-chip microcomputer, the interrupt signal input of the external interrupt 0 of the data syn-chronization termination single-chip microcomputer of signal madulation and demodulation chip U4, the power supply power-fail indication output end of signal madulation and demodulation chip U4 connects the interrupt signal input of the external interrupt 1 of single-chip microcomputer.During work, after signal madulation and demodulation chip U4 receive data message, after internal circuit process, demodulate data bit data flow, and export through RXD_TXD, PFD pin synchronism output low level simultaneously, single machine unit of making a gift to someone produces interrupts, and notice single machine unit reads in data; When data such as having current flow, voltage, power need to send, ATmega32L single-chip microcomputer just exports data to signal madulation and demodulation chip U4 from SDA, SDL two pins, and then data are sent after ovennodulation, receives for receiving terminal.
See Fig. 1, owing to there is a large amount of interference signals in digital ballast, and disturb with " conduction " and " radiation " two kinds of peripherad power consumption equipments of mode, and be used for the top of street lamp and space due to HID digital ballast, so the input of described rectification circuit is provided with EMI filter circuit suppress " conducted interference "; The input of described EMI filter circuit is connected with power supply, namely EMI filter circuit input with flow power line with 220V and be connected, the output of EMI filter circuit is connected with the input of rectification circuit.
See Fig. 2, described EMI filter circuit adopts compound filter design, comprises electric capacity C36, C37, C38, C39, C40, resistance R27, common mode inductance L7, L8, and diode rectifier bridge T10.One end of described electric capacity C36, one end of electric capacity C37 and the input of common mode inductance L7 connect the current input terminal of current sampling circuit respectively with reference to positive pole with reference to positive pole, the other end of described electric capacity C37, one end of electric capacity C38 is connected with reference to negative pole with the input of common mode inductance L7, the other end of electric capacity C36, the other end earth connection incoming end PE respectively of electric capacity C38, one end of described electric capacity C39, one end of resistance R27 and the output of common mode inductance L7 connect the reference positive pole of the input of common mode inductance L8 respectively with reference to positive pole, the other end of electric capacity C39, the other end of resistance R27 and the output of common mode inductance L7 connect the input of common mode inductance L8 respectively with reference to negative pole with reference to negative pole, the output of described common mode inductance L8 connects 1 pin of diode rectifier bridge T10 with reference to positive pole, the output of common mode inductance L8 connects 2 pin of diode rectifier bridge T10 with reference to negative pole.In the design, electric capacity C37, C39 due to for a long time, bear the effect of supply voltage continuously, " X level " electric capacity be adopted; Electric capacity C36, C38 are ground capacities, can bear when fault " " electric current, therefore " Y level " electric capacity will be adopted.And want to bear 2 times of supply voltages when digital ballast voltage-withstand test between earthing of casing point and power line and add 1000V, the experiment that 20mA lasts 1min and do not puncture; Meanwhile, in figure, ground wire incoming end PE operationally must keep good earth, and such guarantee EMI filter circuit is in the performance of mains input side.
Meanwhile, at present, if existing HID digital ballast Electro Magnetic Compatibility is not high enough, product work will be unstable, causes data communication function to lose efficacy or produce error code in the process of transmission.Therefore, in order to make this digital ballast, there is sufficiently high Electro Magnetic Compatibility, need to do further EMC design work to the PCB of this digital ballast, we adopt AnsoftDesigner software to set up the simulation model of PCB and to carry out EMC analysis, and concrete steps are as follows:
Step one, in the ConceptHDL of CadencePSD software kit, draw this digital ballast PCB schematic diagram;
Step 2, the Allegro generation pcb map utilized in CadencePSD software kit, after generating pcb map, in Allegro, convert the storage format of generated pcb map in Ansoftdesigner software acceptable DXF form, the Solid simulation model setting up PCB for next step in Ansoftdesigner is prepared;
Step 3, in Ansoftdesigner, generate printed board physical model for emulating;
Step 4, set various analysis condition in software;
Step 5, after Ansoftdesigner is parsed, result to be processed, carry out PCB Optimal improvements according to analysis result.Way is: the holding wire suitably in adjustment electric current field pattern and E, H near-field pattern and the position of senser (as signal madulation and demodulation chip U4 and Chip Microcomputer A tmega32L), make it away from above-mentioned two places; The cabling of adjustment inverter circuit high frequency pumping, does appropriate movement by its edge toward pcb board, away from the holding wire be easily disturbed, and tries one's best level and smooth and reduces bent angle, suitably increasing trace width.
See Fig. 1, Fig. 2, ID digital ballast of the present utility model can realize the precise acquisition of electrical quantity, possesses real-time electrical quantity collection, the function such as transmission, external control order accurately receive, and can realize timely protection in case of a fault; And design finally by the high electrical-magnetic compatibility perfect to system PCB, define the digital ballast with high electrical-magnetic compatibility.This HID digital ballast has the power factor up to more than 0.99, be low to moderate the oneself power consumption of 3%, complete the brightness adjustment control of power output setting ratio value (0% ~ 100%), communication data accurately, stable operating state, and reaching the useful life of 10 years, its power saving rate can reach more than 40%, is the first-selection of the novel green power supply of energy-conserving and environment-protective.
Above content is in conjunction with concrete preferred implementation further detailed description of the utility model, can not assert that concrete enforcement of the present utility model is confined to these explanations.For the utility model person of an ordinary skill in the technical field, without departing from the concept of the premise utility, can also make some simple deduction or replace, said structure all should be considered as belonging to protection range of the present utility model.
Claims (10)
1. an intelligent HID digital ballast, comprise rectification circuit, circuit of power factor correction, timing dimming circuit, protective circuit, half-bridge output circuit, HID light source and start-up circuit, the input of described rectification circuit is connected with power supply, the output of rectification circuit is connected with the input of circuit of power factor correction, the output of described circuit of power factor correction is connected with the input of timing dimming circuit, the output of described timing dimming circuit is connected with the input of half-bridge output circuit, the output of described half-bridge output circuit is connected with the input of HID light source and start-up circuit respectively, the output of described start-up circuit is connected with HID light source, simultaneously, current output line in half-bridge output circuit is by being connected with the input of protective circuit after series resistance, the output of described protective circuit is connected with the control end of timing dimming circuit, it is characterized in that: also include voltage sampling circuit, current sampling circuit, power measurement circuit, parameter transfer circuit and single machine unit, the input of described voltage sampling circuit is connected with power supply, voltage sampling circuit output is connected with single machine unit with power measurement circuit respectively, the input of described current sampling circuit is connected with power supply, the output of current sampling circuit is connected with single machine unit with power measurement circuit respectively, the output of described power measurement circuit is connected with single machine unit, described parameter transfer circuit is connected with single machine unit, described single machine unit is connected with start-up circuit with timing dimming circuit respectively.
2. the intelligent HID digital ballast of one according to claim 1, is characterized in that: described voltage sampling circuit comprises resistance R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, voltage sample chip U1, double diode T1, T2, electric capacity C1, C2, C3, C4, C5 and inductance L 1, the current input terminal of the one termination voltage sample chip U1 of L2, described resistance R4, the other end of resistance R4 and R3, R2, R1, R8, R7, R6 and R5 connects successively, the input side of another termination rectification circuit of resistance R5, and the current output terminal of described voltage sample chip U1 connects the input side of rectification circuit, described double diode T1, T2 is respectively three terminal device, and 1 pin of double diode T1 is connected with 1 pin of T2, and 2 pin of T1 are connected with 2 pin of T2, and 3 pin of T1 are connected with one end of inductance L 1, and 3 pin of T2 are connected with one end of inductance L 2, described inductance C1, C2, C3, C4 and inductance L 1, L2 forms pi type filter, and described resistance R10 and electric capacity C5 forms RC low pass filter, and one end one end of connecting resistance R10 and other end of inductance L 1 respectively of described resistance R9, the other end of resistance R9 connects the other end of L2 and one end of C5 respectively.
3. the intelligent HID digital ballast of one according to claim 1, is characterized in that: described current sampling circuit comprises current sample chip U2, electric capacity C6, C7, C8, C9, C10, inductance L 3, L4, double diode T3, T4, resistance R11, R12, R13, described double diode T3, T4 is respectively three terminal device, 1 pin of double diode T3 is connected with 1 pin of T4, 2 pin of T3 are connected with 2 pin of T4, the input pin tap 220V AC power input line of described current sample chip U2, an output of current sample chip U2 connects 3 pin of double diode T3 and one end of inductance L 3 respectively, another output of sampling A/D chip U2 connects 3 pin of double diode T4 and one end of inductance L 4, described electric capacity C6 respectively, C7, C8, C9 and inductance L 3, L4 forms pi type filter, and described resistance R13 and electric capacity C10 form low pass filter, and described R11 and R12 is in parallel, the other end of inductance L 3 respectively with one end of R11, one end of R12 is connected with one end of resistance R13, the other end of inductance L 4 respectively with the other end of R11, the other end of R12 is connected with one end of electric capacity C10.
4. the intelligent HID digital ballast of one according to claim 1, it is characterized in that: described power measurement circuit comprises electric energy computation chip U3, resistance R14, R15, R16, R17, R18, R19, R20, electrochemical capacitor C11, C13, C15, electric capacity C123, C14, C16, C17, C18, C19, C20, C21, passive crystal oscillator Y1 and photoelectric coupled circuit, the output of described photoelectric coupled circuit is connected with the count pulse input pin of single machine unit, the output of the output voltage signal low pass filter of the one termination current sampling circuit of described R14 is with reference to positive pole, a current sampling signal input of another termination electric energy computation chip U3 of resistance R14 is with reference to positive pole, the output of the output voltage signal low pass filter in the one termination current sampling circuit of described resistance R15 is with reference to negative pole, the current sampling signal input of another termination electric energy computation chip U3 of resistance R15 is with reference to negative pole, the output of the output signal low pass filter of the one termination voltage sampling circuit of described resistance R16 is with reference to positive pole, the tested voltage input end of another termination electric energy computation chip U3 of resistance R16 is with reference to positive pole, the output signal low pass filter output of the one termination voltage sampling circuit of described resistance R17 is with reference to negative pole, the reference negative pole of the tested voltage input end of another termination electric energy computation chip U3 of resistance R17, the active power output of the one termination electric energy computation chip U3 of described resistance R18, the positive pole of light-emitting diode D1 in another termination photoelectric coupled circuit of resistance R18, the positive pole of the one termination 5V power supply of described resistance R19, the collector output of photoelectrical coupler in another termination photoelectric coupled circuit of resistance R19, one termination of described resistance R20 connects the active power output verification end of electric energy computation chip U3, the positive pole of another termination 5V power supply of resistance R20, described electrochemical capacitor C11, C13, electric capacity C12 and C14 is in parallel, the positive pole of electrochemical capacitor C11, one end of C12, the positive pole of C13 and one end of C14 connect the positive pole of 5V power supply respectively, the negative pole of electrochemical capacitor C11, the other end of C12, the negative pole of electrochemical capacitor C13 and the other end of electric capacity C14 connect the negative pole of 5V power supply respectively, the positive pole of described electrochemical capacitor C15 connects the positive pole of 5V power supply, the negative pole of electrochemical capacitor C15 connects the negative pole of 5V power supply, the reference voltage input of the one termination electric energy computation chip of described electric capacity C16, the negative pole of another termination 5V power supply of electric capacity C16, one end of described electric capacity C17 connects the clock source output of electric energy computation chip U3 and one end of passive crystal oscillator Y1 respectively, the negative pole of another termination 5V power supply of electric capacity C17, the clock source input of the one termination electric energy computation chip U3 of described electric capacity C18 and the passive crystal oscillator Y1 other end, the negative pole of another termination 5V power supply of electric capacity C18, described electric capacity C19, C20, C21 is in parallel, one end of electric capacity C19, one end of C20 and one end of C21 connect the active power of output checkout terminal of electric energy computation chip U3 respectively, the other end of electric capacity C19, the other end of C20 and the other end of C21 connect the negative pole of 5V power supply respectively.
5. the intelligent HID digital ballast of one according to claim 1, it is characterized in that: described parameter transfer circuit comprises power carrier interface circuit and power carrier signal treatment circuit, described power carrier interface circuit comprises coupling circuit, data transmit circuit and data receiver circuit, the coupling transformer T10 high pressure winding switching power end of described coupling circuit, the data input pin to be sent of described data transmit circuit connects the data modulated signal output in power carrier signal treatment circuit, the data output end of described data receiver circuit connects the external data modulation signal input in the data modem circuitry in power carrier signal treatment circuit, the pin 3 of the coupling transformer T10 in described coupling circuit is connected to the modulation signal output in power carrier data modem circuitry by data transmit circuit, in coupling circuit, the secondary end of coupling transformer T10 is connected to the modulation signal input in power carrier data modem circuitry by data receiver circuit.
6. the intelligent HID digital ballast of one according to claim 5, it is characterized in that: described data receiver circuit comprises electric capacity C22, C23, C24, diode D3, D4, inductance L 5 and resistance R21, described electric capacity C22, C23 and inductance L 5 form antiresonant circuit, one end of electric capacity C22, one end of one end of C23 and one end difference connecting resistance R21 of inductance L 5, the other end of electric capacity C22, the earth terminal AGND of the other end of C23 and the other end difference connection circuit plate of inductance L 5, coupling transformer T10 low pressure winding in another termination coupling circuit of described resistance R21 secondary, described diode D3 negative pole, the positive pole of diode D4 connects one end of electric capacity C24 respectively, the whole pole of diode D3, the earth terminal AGND of the negative pole difference connection circuit plate of diode D4, modulation signal input in another termination power line carrier, PLC data modem circuitry of electric capacity C24.
7. the intelligent HID digital ballast of one according to claim 5, it is characterized in that: described data transmit circuit comprises diode D5, D6, D7, D8, electric capacity C25, C26, C27, inductance L 6, resistance R23, R24, triode T6, T7, T8, T9, described diode D5 and D6 forms amplitude limiter circuit, the negative pole of diode D5 connects the positive pole of 9V power supply, the positive pole of diode D5 connects the negative pole of diode D6, the positive pole of diode D6 connects the negative pole of 9V power supply, the negative pole of described diode D7 connects the emitter of triode T8 and the positive pole of 9V power supply respectively, the positive pole of described diode D8 connects the emitter of triode T9 and the negative pole of 9V power supply respectively, the negative pole of diode D8 connects the base stage of triode T9, one end of the one termination inductance L 6 of described electric capacity C25, coupling transformer T10's in another termination coupling circuit of described inductance L 6 is secondary, the positive pole of another terminating diode D5 of electric capacity C25, one end of the one terminating resistor R24 of described electric capacity C26, the other end of electric capacity C26 connects the modulation signal output in the power carrier data modem circuitry in one end of electric capacity C27 and power carrier signal treatment circuit respectively, one end of the other end connecting resistance R23 of described electric capacity C27, another termination triode T9 of described resistance R23 base stage, the base stage of described triode T6 connects the collector electrode of triode T8, the collector electrode of triode T6 connects the positive pole of diode D5, the emitter of triode T6 connects the positive pole of 9V power supply, the base stage of described triode T7 connects the collector electrode of triode T9, the emitter of the collector connecting transistor T9 of triode T7, the emitter of triode T7 connects the collector electrode of triode T6, the base stage of described triode T8 connects the positive pole of diode D7.
8. the intelligent HID digital ballast of one according to claim 5, it is characterized in that: described power carrier signal treatment circuit comprises signal madulation and demodulation chip U4, electric capacity C29, C30, C31, C33, C34, C35, electrochemical capacitor C32, resistance R25, R26, passive crystal oscillator Y2 and Y3, one end of described electric capacity C29 and one end of electric capacity C30 connect 5V power cathode respectively, another termination signal madulation of electric capacity C29 and the crystal oscillator input of demodulation chip U4, another termination signal madulation of electric capacity C30 and the clock source input of demodulation chip U4, the two ends of described passive crystal oscillator Y2 connect respectively signal madulation and demodulation chip U4 clock source constrained input end, described electric capacity C31 and electrochemical capacitor C32 is in parallel, one end of electric capacity C31 and the positive pole of electrochemical capacitor C32 connect the positive pole of 5V power supply, the other end of electric capacity C31 and the negative pole of electrochemical capacitor C32 connect the negative pole of 5V power supply, the operating voltage of described signal madulation and demodulation chip U4 inputs the positive pole of termination 5V power supply, one end of described electric capacity C33 and one end of electric capacity C34 connect the negative pole of 5V power supply respectively, the input of another termination signal madulation of electric capacity C33 and the crystal oscillator of demodulation chip U4, the output of another termination signal madulation of electric capacity C34 and the crystal oscillator of demodulation chip U4, the two ends of described passive crystal oscillator Y3 connect input and the output of the crystal oscillator of signal madulation and demodulation chip U4 respectively, the one termination signal madulation of described electric capacity C35 and the power supply power-fail of demodulation chip U4 monitor external input terminals, the negative pole of another termination 9V power supply of electric capacity C35, the one termination signal madulation of described resistance R24 and the power supply power-fail of demodulation chip U4 monitor external input terminals, the positive pole of another termination 9V power supply of resistance R24, the one termination signal madulation of described resistance R26 and the power supply power-fail of demodulation chip U4 monitor external input terminals, another termination of resistance R26 connects the negative pole of 9V power supply, the electrification reset of described signal madulation and demodulation chip U4 and the electrification reset end of watchdog reset termination single-chip microcomputer, the house dog counter O reset input of signal madulation and demodulation chip U4 connects the conventional data input/output terminal of single-chip microcomputer, the universal serial bus input end of clock of signal madulation and demodulation chip U4 meets the I of single-chip microcomputer
2c universal serial bus clock signal terminal, the serial bus data input/output terminal of signal madulation and demodulation chip U4 meets the I of single-chip microcomputer
2c serial bus data signal end, the transmitting-receiving control input end of signal madulation and demodulation chip U4 connects the conventional data input/output terminal of single-chip microcomputer, the data transmit-receive input/output terminal of signal madulation and demodulation chip U4 connects the conventional data input/output terminal of single-chip microcomputer, the interrupt signal input of the external interrupt 0 of the data syn-chronization termination single-chip microcomputer of signal madulation and demodulation chip U4, the power supply power-fail indication output end of signal madulation and demodulation chip U4 connects the interrupt signal input of the external interrupt 1 of single-chip microcomputer.
9. the intelligent HID digital ballast of one according to claim 1, it is characterized in that: the input of described rectification circuit is provided with EMI filter circuit, the input of described EMI filter circuit is connected with power supply, and the output of EMI filter circuit is connected with the input of rectification circuit.
10. the intelligent HID digital ballast of one according to claim 9, it is characterized in that: described EMI filter circuit comprises electric capacity C36, C37, C38, C39, C40, resistance R27, common mode inductance L7, L8, with diode rectifier bridge T10, one end of described electric capacity C36, one end of electric capacity C37 and the input of common mode inductance L7 connect the current input terminal of current sampling circuit respectively with reference to positive pole with reference to positive pole, the other end of described electric capacity C37, one end of electric capacity C38 is connected with reference to negative pole with the input of common mode inductance L7, the other end of electric capacity C36, the other end earth connection incoming end PE respectively of electric capacity C38, one end of described electric capacity C39, one end of resistance R27 and the output of common mode inductance L7 connect the reference positive pole of the input of common mode inductance L8 respectively with reference to positive pole, the other end of electric capacity C39, the other end of resistance R27 and the output of common mode inductance L7 connect the input of common mode inductance L8 respectively with reference to negative pole with reference to negative pole, the output of described common mode inductance L8 connects 1 pin of diode rectifier bridge T10 with reference to positive pole, the output of common mode inductance L8 connects 2 pin of diode rectifier bridge T10 with reference to negative pole.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104981084A (en) * | 2015-07-10 | 2015-10-14 | 武汉电力设备厂 | Intelligent HID digital ballast |
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| CN104981084A (en) * | 2015-07-10 | 2015-10-14 | 武汉电力设备厂 | Intelligent HID digital ballast |
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