CN102034345B - Twisted pair carrier communication circuit for automatic meter reading system and method thereof - Google Patents
Twisted pair carrier communication circuit for automatic meter reading system and method thereof Download PDFInfo
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Abstract
The invention provides a twisted pair carrier communication circuit for an automatic meter reading system, comprising a receiving circuit and a transmitting circuit, wherein the receiving circuit comprises a signal coupling circuit, a signal amplification circuit, a 50KHz band-pass filter circuit, a full-wave rectifier circuit, a three-order low-pass filter circuit and a hysteresis comparison and output circuit; the transmitting circuit comprises a band-pass filter, a signal transmitting circuit and a signal amplification transmitting circuit with a transmitting enable end. When the circuit is used, generated or received carrier communication signals meet all the requirements for modulating signal and demodulating signal parameters in a IEC62056-31 criterion. Meanwhile, the circuit has the advantages of simple structure and high safety and credibility and accords with the requirements of each electromagnetic compatibility experiment of an electric energy meter.
Description
Technical field
The present invention is when in the electric power system local area network (LAN) electric energy meter being carried out automatic copy reading, employed twisted-pair feeder carrier signal transmitting-receiving hardware circuit.Signal parameter after the circuit modulation /demodulation meets the requirement for EURIDIS and TIC signal of communication fully.
Background technology
The communication function of intelligent electric meter and the establishment of Automatic meter reading system receive much concern always and pay attention to.The nineties in last century, adopt the kilowatt meter reading-out system of EURIDIS bus to introduce China.It is a kind of efficient, the scheme of checking meter cheaply.Electric energy meter is connected to be fixed on by the EURIDIS bus and is easy to copy and accept on the locational magnetic coupler, and the person of checking meter only needs handheld terminal is connected with coupler can realize that the information that all is connected electric energy meter with coupler copies and accepts.
The EURIDIS kilowatt meter reading-out system has following characteristics:
(1) opening: the EURIDIS agreement meets the IEC62056-31 standard, guarantees opening and the interoperability of different manufacturers equipment room;
(2) convenience: the EURIDIS kilowatt meter reading-out system has been saved the time of copying and accepting greatly, and 100 ammeters can be copied in 5 minutes.
(3) popularity: the EURIDIS system has operated tens days under the popularization of company of group of Electricite De France (ERDF), during reliably performance of system obtained the approval of ERDF and promoted energetically.The EURIDIS system is used by increasing countries such as West Europe at present.
(4) communication medium: adopt twisted-pair feeder 50kHz carrier communication mode, stronger anti-interference and farther transmission range when guaranteeing the signal transmission;
(5) traffic rate: the standard of the up-to-date proposition of ERDF has been brought up to 9600bps to communication speed;
(6) confidentiality: in order to prevent third-party manipulative communications deception and the monitoring to communicating by letter, whole EURIDIS communication adopts the AES128 cryptographic algorithm that communication data is carried out encryption and decryption.
Therefore, the EURIDIS kilowatt meter reading-out system satisfies the demand for development of current intelligent grid Automatic meter reading system fully.The IEC62056-31 standard has very strict requirement for the carrier signal of EURIDIS system, no matter be to transmission rate, signal frequency or signal amplitude, the parameters such as duty ratio have strict requirement, also these are realized articulating the information copy reading of ammeter efficiently so that the EURIDIS system can be reliable just.Since to the strict demand of carrier signal parameter, so that the realization complicated on the EURIDIS hardware circuit is difficult, the at present domestic hardware circuit that does not also satisfy preferably the ERDF requirement.
Summary of the invention
What the present invention will solve is the problems referred to above that prior art exists, and aims to provide a kind of modulation-demo-demodulation method that satisfies simultaneously the hardware circuit of EURIDIS and the requirement of TIC signal of communication.
The technical scheme that addresses the above problem employing is as follows: be used for the twisted-pair carrier communication circuit of Automatic meter reading system, comprise receiving circuit and transtation mission circuit, it is characterized in that described receiving circuit comprises:
Signal coupling circuit receives the EURIDIS carrier signal, through the carrier signal after straight of output behind capacitor C 6 isolated DCs and the coupling transformer T1;
Signal amplification circuit is amplified to the saturated rear output of amplitude with what signal coupling circuit was exported every straight rear carrier signal;
The 50kHz bandwidth-limited circuit, the interference signal of all frequencies in the saturated carrier signal of filtered signal amplifying circuit output except 50kHz;
Full-wave rectifying circuit carries out full-wave rectification with the carrier signal after the filtering interfering of 50kHz bandwidth-limited circuit output, output direct current carrier signal;
Three rank low-pass filter circuits carry out low-pass filtering to the direct current carrier signal of full-wave rectifying circuit output, become approximate square-wave signal;
Stagnant chain rate reaches output circuit, and the approximate square-wave signal that three rank low-pass filter circuits are exported stagnates chain rate, exports preferably square-wave signal;
Described transtation mission circuit comprises:
Band pass filter generates the square-wave signal of 50kHz and is used for the 50kHz sinusoidal signal that carrier wave sends;
Signal sending circuit uses analog switch that the 50kHz sinusoidal signal of band pass filter output is switched, and realizes 0,1 transmission of carrier signal;
The signal that band sends Enable Pin amplifies transtation mission circuit, and the carrier signal of the output of signal sending circuit is sent on the EURIDIS connecting line through amplifying circuit and signal coupling circuit.
Twisted-pair carrier communication circuit for Automatic meter reading system of the present invention uses this circuit to produce or the carrier communication signal that receives satisfies in the IEC62056-31 standard of all requirements to(for) modulation signal and restituted signal parameter.Wherein EURIDIS communication can be sent out and can receive for half-duplex circuit; TIC is unidirectional, sends out only, can not receive.Simultaneously, circuit structure of the present invention is simple, and is safe and reliable, meets each electromagnetic compatibility requirement of experiment of electric energy meter.
According to the present invention, described signal coupling circuit comprises capacitor C 6, capacitor C 8, capacitor C 21, diode D154, diode D155, resistance R 14, resistance R 28 and coupling transformer T1, described capacitor C 8 one termination EURIDIS input 1 end, one end of the end of the other end connecting resistance R28 of capacitor C 8 and the former limit of coupling transformer T1 winding, another termination EURIDIS of resistance R 28 inputs the other end of 2 ends and the former limit of coupling transformer T1 winding, the end of one termination capacitor C21 of coupling transformer T1 secondary winding and an end of resistance R 14, the other end and the signal ground of another termination capacitor C 21 of coupling transformer T1 secondary winding, one end of another termination capacitor C 6 of resistance R 14, the anode of another terminating diode D154 of capacitor C 6 and the negative electrode of diode D155, also be signal output part simultaneously, the negative electrode of diode D154 connects power positive end, the plus earth of diode D155.
According to the present invention, described signal amplification circuit comprises capacitor C 1, capacitor C 101, resistance R 1, resistance R 2 and an operational amplifier, one end of described capacitor C 1 is input, the end of other end connecting resistance R1, the input negative terminal of one end of another termination capacitor C 101 of resistance R 1, an end of resistance R 2 and operational amplifier, the other end of the other end connecting resistance R2 of capacitor C 101 and the output of operational amplifier, the positive termination signal ground of the input of operational amplifier.
According to the present invention, described 50kHz bandwidth-limited circuit comprises resistance R 156, resistance R 151, resistance R 157, capacitor C 150, capacitor C 151 and an operational amplifier, described resistance R 156 1 ends are input, the end of other end connecting resistance R157, one end of capacitor C 150 and an end of capacitor C 151, the end of the other end connecting resistance R151 of capacitor C 150 and the input negative terminal of operational amplifier, the other end of another termination capacitor C 151 of resistance R 151 and the output of operational amplifier, also be signal output part simultaneously, the positive termination signal ground of the other end of resistance R 157 and the input of operational amplifier.
According to the present invention, described full-wave rectifying circuit comprises resistance R 152, resistance R 150, resistance R 158, diode D150, diode D151, the first operational amplifier, resistance R 170, resistance R 160, resistance R 161, diode D152, diode D153, the second operational amplifier, resistance R 154 and the 3rd operational amplifier, one end of described resistance R 152 is input, the end of other end connecting resistance R150, the input negative terminal of the negative electrode of diode D150 and the first operational amplifier, the anode of another terminating diode D151 of resistance R 150 and an end of resistance R 158, the anode of diode D150 connects the negative electrode of diode D151 and the output of the first operational amplifier, the positive termination signal ground of the input of the first operational amplifier; Resistance R 170 ends are input, the input negative terminal of the end of other end connecting resistance R160, diode D152 negative electrode and the second operational amplifier, another terminating diode D153 anode of resistance R 160 and an end of resistance R 161, the anode of diode D152 connects the negative electrode of diode D153 and the output of the second operational amplifier, the positive termination signal ground of the input of the second operational amplifier; The other end of the other end connecting resistance R161 of resistance R 158, an end of resistance R 154 and the input negative terminal of the 3rd operational amplifier, the output of another termination the 3rd operational amplifier of resistance R 154, the positive termination signal ground of the input of the 3rd operational amplifier.
According to the present invention, described three rank low-pass filter circuits comprise resistance R 3, resistance R 165, capacitor C 2, capacitor C 154, resistance R 166, capacitor C 156, capacitor C 153 and an operational amplifier, one end of described resistance R 3 is input, the end of other end connecting resistance R165 and an end of capacitor C 2, the end of the other end connecting resistance R166 of resistance R 165 and an end of capacitor C 154, input negative terminal and the output of another termination operational amplifier of capacitor C 154, one end of another termination capacitor C 156 of resistance R 166 and the input anode of operational amplifier, another termination signal ground of capacitor C 2 and capacitor C 156, capacitor C 153 two ends connect respectively power positive end and ground.
According to the present invention, described stagnant chain rate reaches output circuit and comprises resistance R 163, resistance R 162, resistance R 171, an operational amplifier, resistance R 5, resistance R 4, resistance R 29, resistance R 101, diode D1, diode D2, diode D3 and a triode, one end of described resistance R 163 is input, the input anode of another termination operational amplifier, one termination power anode of resistance R 162, the end of other end connecting resistance R171 and the input negative terminal of operational amplifier, the end of the output connecting resistance R4 of operational amplifier and an end of resistance R 5, the anode of another terminating diode D1 of resistance R 5, the negative electrode of diode D1 connects the anode of diode D2, the negative electrode of diode D2 connects the anode of diode D3, the end of the negative electrode connecting resistance R29 of diode D3 and the base stage of triode, the collector electrode of triode connects an end of EURIDIS RXD signal and resistance R 101, the other end of resistance 171, the other end of resistance R 4, the other end of resistance R 29 and the grounded emitter of triode, another termination power positive end of resistance R 101.
According to the present invention, described band pass filter comprises resistance R 16, resistance R 17, resistance R 18, capacitor C 22, capacitor C 23, capacitor C 24 and an operational amplifier, the square-wave signal of one termination 50kHz of described resistance R 17, one end of the end of other end connecting resistance R18, an end of capacitor C 22 and capacitor C 23, the end of the other end connecting resistance R16 of capacitor C 22 and the input negative terminal of operational amplifier, the other end of another termination capacitor C 23 of resistance R 161 and the output of operational amplifier, the positive termination signal ground of the input of operational amplifier.The square-wave signal of described 50kHz input is external signal, perhaps produces by 555 timers by telecommunication circuit of the present invention is inner.
According to the present invention, described signal sending circuit can directly adopt analog switching circuit according to different control signals, connects analog switching circuit after also can overturning to level first again.When adopting latter's structure, this signal sending circuit comprises two level reverse circuit and analog switching circuits that structure is identical, and wherein two level reverse circuits are respectively applied to connect EURIDIS TXD and TIC TXD.A typical execution mode, described level reverse circuit for connecting EURIDIS TXD comprises resistance R 19, resistance R 20, resistance R 21 and a triode, one termination EURIDIS TXD signal of described resistance R 19, the base stage of other end connecting resistance R21 and triode, one termination power anode of resistance R 20, the collector electrode of another termination triode and the input of analog switching circuit, the other end of resistance R 21 and the grounded emitter of triode.
According to the present invention, the signal amplification transtation mission circuit that described band sends Enable Pin comprises resistance R 10, resistance R 11, capacitor C 28 capacitor C 6, resistance R 14 and signal coupling circuit, one end of described resistance R 10 is input, the input negative terminal of the end of other end connecting resistance R11, an end of capacitor C 28 and operational amplifier, the other end of another termination capacitor C 28 of resistance R 11, the output of operational amplifier and the input of signal coupling circuit, the positive termination signal ground of the input of operational amplifier.Signal coupling circuit in described signal coupling circuit and the described receiving circuit shares same circuit.
As a further improvement on the present invention, telecommunication circuit employing contact pin type interface of the present invention and ammeter are interconnected, patch simple, safe and reliable.
The present invention also will provide a kind of twisted-pair carrier communication method for Automatic meter reading system, comprises the receiving demodulation flow process and sends the modulation flow process, it is characterized in that described receiving demodulation flow process carries out according to the following steps:
Receive the interchange carrier signal on the EURIDIS bus, coupling transformer output is every straight rear carrier signal;
Be amplified to the saturated rear output of amplitude with described every straight rear carrier signal;
The interference signal of all frequencies in the saturated carrier signal of filtering except 50kHz;
Carrier signal after the described filtering interfering of 50kHz is carried out full-wave rectification, output direct current carrier signal;
Described direct current carrier signal is carried out low-pass filtering, become approximate square-wave signal;
Described approximate square-wave signal is stagnated chain rate, export preferably square-wave signal;
Described transmission modulation flow process is carried out according to the following steps:
The square-wave signal of 50kHz is generated the 50kHz sinusoidal signal that is used for the carrier wave transmission;
Use analog switch that described 50kHz sinusoidal signal is switched, the direct current carrier signal after the output modulation;
Direct current carrier signal after the described modulation is converted to the interchange carrier signal by the operational amplification circuit with ena-bung function;
Described interchange carrier signal is outputed to the EURIDIS bus through coupling transformer.
Description of drawings
The invention will be further described below in conjunction with drawings and Examples.
Fig. 1 is the parameter characteristic figure of carrier envelope.
Fig. 2 is the signal coupling circuit figure of receiving circuit of the present invention.
Fig. 3 is the signal amplification circuit figure of receiving circuit of the present invention.
Fig. 4 is the 50kHz bandwidth-limited circuit of receiving circuit of the present invention.
Fig. 5 is the full-wave rectifying circuit figure of receiving circuit of the present invention.
Fig. 6 is three rank low-pass filter circuit figure of receiving circuit of the present invention.
Fig. 7 is that the stagnant chain rate of receiving circuit of the present invention reaches output circuit figure.
Fig. 8 is the band pass filter circuit figure of transtation mission circuit of the present invention.
Fig. 9 is the signal sending circuit figure of transtation mission circuit of the present invention.
Figure 10 is the signal amplification transtation mission circuit figure that the band of transtation mission circuit of the present invention sends Enable Pin.
Figure 11 is that receiving circuit of the present invention is to the demodulation flow chart of carrier signal.
Figure 12 is that transtation mission circuit of the present invention is to the modulation flow chart of digital communication signal.
Embodiment
Twisted-pair carrier communication circuit for Automatic meter reading system of the present invention comprises receiving circuit and transtation mission circuit.Wherein EURIDIS communication can be sent out and can receive for half-duplex circuit; TIC communication is sent out only for unidirectional, can not receive.The TIC circuit is identical with the EURIDIS transtation mission circuit.
1.EURIDIS receiving circuit:
(1) signal coupling circuit;
With reference to Fig. 2, described signal coupling circuit comprises capacitor C 6, capacitor C 8, capacitor C 21, diode D154, diode D155, resistance R 14, resistance R 28 and coupling transformer T1, described capacitor C 8 one termination EURIDIS input 1 end, one end of the end of the other end connecting resistance R28 of capacitor C 8 and the former limit of coupling transformer T1 winding, another termination EURIDIS of resistance R 28 inputs the other end of 2 ends and the former limit of coupling transformer T1 winding, the end of one termination capacitor C21 of coupling transformer T1 secondary winding and an end of resistance R 14, the other end and the signal ground of another termination capacitor C 21 of coupling transformer T1 secondary winding, one end of another termination capacitor C 6 of resistance R 14, the anode of another terminating diode D154 of capacitor C 6 and the negative electrode of diode D155, also be signal output part simultaneously, the negative electrode of diode D154 connects power positive end, the plus earth of diode D155.
The EURIDIS carrier signal enters receiving circuit by coupling transformer, capacitor C 6 isolated DCs, diode D154, D155 play the voltage protective effect, capacitor C 21 and coupling coil inductance be at 50kHz point parallel resonance, signal by the time can not produce phase shift.C8 is safety electric capacity, and protection module EURIDIS line is connected with the 220V alternating current unintentionally.For satisfy in the standard to have input impedance under the 50kHz of Source Site require (resistance〉20k, capacitive reactance is greater than 100k(30pF during capacitive)), satisfy simultaneously the signal amplitude through coupling transformer output, through the conversion of coupling transformer two ends parameter and test, select electric capacity 33nF, resistance 47K.
(2) signal amplification circuit;
With reference to Fig. 3, the TL084 chip that described signal amplification circuit adopts TI company to produce, comprise capacitor C 1, capacitor C 101, resistance R 1, resistance R 2 and an operational amplifier, one end of described capacitor C 1 is input, the end of other end connecting resistance R1, the input negative terminal of one end of another termination capacitor C 101 of resistance R 1, an end of resistance R 2 and operational amplifier, the other end of the other end connecting resistance R2 of capacitor C 101 and the output of operational amplifier, the positive termination signal ground of the input of operational amplifier.
Signal amplification circuit amplifies the AC signal that receives, and the carrier signal amplitude after the amplification just reaches the saturated output valve of amplifier, so that the low-pass filtering of rear end produces preferably square wave.Because the amplifier power supply is unidirectional+9V power supply, and our EURIDIS signal is for exchanging carrier signal, so the amplifier positive pole meets SGND(+4.5V).
(3) 50kHz bandwidth-limited circuit;
With reference to Fig. 4, described 50kHz bandwidth-limited circuit comprises resistance R 156, resistance R 151, resistance R 157, capacitor C 150, capacitor C 151 and an operational amplifier, described resistance R 156 1 ends are input, the end of other end connecting resistance R157, one end of capacitor C 150 and an end of capacitor C 151, the end of the other end connecting resistance R151 of capacitor C 150 and the input negative terminal of operational amplifier, the other end of another termination capacitor C 151 of resistance R 151 and the output of operational amplifier, also be signal output part simultaneously, the positive termination signal ground of the other end of resistance R 157 and the input of operational amplifier.
The filtering of 50kHz bandwidth-limited circuit receives the interference signal of all frequencies except 50kHz in the signal.
(4) full-wave rectifying circuit;
With reference to Fig. 5, described full-wave rectifying circuit comprises resistance R 152, resistance R 150, resistance R 158, diode D150, diode D151, the first operational amplifier, resistance R 170, resistance R 160, resistance R 161, diode D152, diode D153, the second operational amplifier, resistance R 154 and the 3rd operational amplifier, one end of described resistance R 152 is input, the end of other end connecting resistance R150, the input negative terminal of the negative electrode of diode D150 and the first operational amplifier, the anode of another terminating diode D151 of resistance R 150 and an end of resistance R 158, the anode of diode D150 connects the negative electrode of diode D151 and the output of the first operational amplifier, the positive termination signal ground of the input of the first operational amplifier; Resistance R 170 ends are input, the input negative terminal of the end of other end connecting resistance R160, diode D152 negative electrode and the second operational amplifier, another terminating diode D153 anode of resistance R 160 and an end of resistance R 161, the anode of diode D152 connects the negative electrode of diode D153 and the output of the second operational amplifier, the positive termination signal ground of the input of the second operational amplifier; The other end of the other end connecting resistance R161 of resistance R 158, an end of resistance R 154 and the input negative terminal of the 3rd operational amplifier, the output of another termination the 3rd operational amplifier of resistance R 154, the positive termination signal ground of the input of the 3rd operational amplifier.
Full-wave rectifying circuit carries out full-wave rectification to the EURIDIS carrier signal that receives, the output direct current signal.
(5) three rank low-pass filter circuits;
With reference to Fig. 6, described three rank low-pass filter circuits comprise resistance R 3, resistance R 165, capacitor C 2, capacitor C 154, resistance R 166, capacitor C 156, capacitor C 153 and an operational amplifier, one end of described resistance R 3 is input, the end of other end connecting resistance R165 and an end of capacitor C 2, the end of the other end connecting resistance R166 of resistance R 165 and an end of capacitor C 154, input negative terminal and the output of another termination operational amplifier of capacitor C 154, one end of another termination capacitor C 156 of resistance R 166 and the input anode of operational amplifier, another termination signal ground of capacitor C 2 and capacitor C 156, capacitor C 153 two ends connect respectively power positive end and ground.
The direct current signal of three rank low-pass filter circuits after to rectification carries out low-pass filtering, and the carrier signal of the 50kHz sine that receives becomes approximate square-wave signal after filtering.
(6) stagnant chain rate reaches output circuit;
With reference to Fig. 7, described stagnant chain rate reaches output circuit and comprises resistance R 163, resistance R 162, resistance R 171, an operational amplifier, resistance R 5, resistance R 4, resistance R 29, resistance R 101 and diode D1, diode D2, diode D3 and a triode, one end of described resistance R 163 is input, the input anode of another termination operational amplifier, one termination power anode of resistance R 162, the end of other end connecting resistance R171 and the input negative terminal of operational amplifier, the end of the output connecting resistance R4 of operational amplifier and an end of resistance R 5, the anode of another terminating diode D1 of resistance R 5, the negative electrode of diode D1 connects the anode of diode D2, the negative electrode of diode D2 connects the anode of diode D3, the end of the negative electrode connecting resistance R29 of diode D3 and the base stage of triode, the collector electrode of triode connects an end of EURIDIS RXD signal and resistance R 101, the other end of resistance 171, the other end of resistance R 4, the other end of resistance R 29 and the grounded emitter of triode, another termination power positive end of resistance R 101.
Stagnant chain rate reaches output circuit filtered approximate square-wave signal is stagnated chain rate, export preferably square-wave signal, here definite duty ratio that needs to guarantee output square wave high-low level of standard comparative level is near 1:1, so R162 and R171 requirement service precision are 1% resistance.Because EURIDIS requires have carrier signal to be output as " 0 ", carrierfree is " 1 ", so use triode 8050 negates once.Diode D1, D2, D3 reduces to 0V with the low level that comparator is exported square wave.
2.EURIDIS transtation mission circuit (the TIC transtation mission circuit is identical with the EURIDIS transtation mission circuit):
(1) band pass filter;
With reference to Fig. 8, described band pass filter comprises resistance R 16, resistance R 17, resistance R 18, capacitor C 22, capacitor C 23, capacitor C 24 and an operational amplifier, the square-wave signal of one termination 50kHz of described resistance R 17, one end of the end of other end connecting resistance R18, an end of capacitor C 22 and capacitor C 23, the end of the other end connecting resistance R16 of capacitor C 22 and the input negative terminal of operational amplifier, the other end of another termination capacitor C 23 of resistance R 161 and the output of operational amplifier, the positive termination signal ground of the input of operational amplifier.
The square-wave signal of 50kHz generates behind band pass filter and is used for the 50kHz sinusoidal signal that carrier wave sends.Square-wave signal in the present embodiment needs the outside to provide, and also can be revised as inside modules and produce square-wave signal by 555 timers.
(2) signal sending circuit;
With reference to Fig. 9, described signal sending circuit comprises two level reverse circuit and analog switching circuits that structure is identical, and wherein two level reverse circuits are respectively applied to connect EURIDIS TXD and TIC TXD.Described level reverse circuit for connecting EURIDIS TXD comprises resistance R 19, resistance R 20, resistance R 21 and a triode, one termination EURIDIS TXD signal of described resistance R 19, the base stage of other end connecting resistance R21 and triode, one termination power anode of resistance R 20, the collector electrode of another termination triode and the input of analog switching circuit, the other end of resistance R 21 and the grounded emitter of triode.
The HEF4066 chip that analog switch adopts PHILIPS Co. to produce switches the 50kHz signal.When wherein switch controlling signal was high level, output i.e. input (50kHz sinusoidal signal), when switching signal is low level, and output 0V.Use triode that digital sending signal is carried out the level upset, then carry out the output of 50kHz signaling switch, final output effect has carrier wave output for " 0 ", the output of " 1 " carrierfree.
(3) band sends the signal amplification transtation mission circuit of Enable Pin.
With reference to Figure 10, described band sends signal amplification circuit and the signal coupling circuit of Enable Pin, wherein amplifying circuit adopts the TLC083 chip that TI company produces, comprise resistance R 10, resistance R 11, capacitor C 28 capacitor C 6 and resistance R 14, one end of described resistance R 10 is input, the input negative terminal of the end of other end connecting resistance R11, an end of capacitor C 28 and operational amplifier, the other end of another termination capacitor C 28 of resistance R 11, the output of operational amplifier and the input of signal coupling circuit, the positive termination signal ground of the input of operational amplifier.
Carrier signal after analog switch switches sends on the EURIDIS connecting line finally by amplifying circuit (amplifier adopts the TLC083 of TI company) and coupling transformer.Because EURIDIS is half-duplex communication circuit, so during transmitted signal, the Enable Pin of amplifier enables; When receiving signal, amplifier does not enable, and output is high-impedance state, receiving circuit is not exerted an influence.
Because the switching of analog switch, the carrier signal edge of output has switch noise, needs to adjust capacitor C 28 here and capacitance C6 drops to noise minimum.
This module can be finished the modulation and demodulation work of 50kHz carrier signal with after electric energy meter is connected, and realizes the functions such as communication and automatic data logging by the EURIDIS bus.
Parameter request for EURIDIS and TIC carrier signal is as follows:
The parameter characteristic of carrier envelope is with reference to Fig. 1.
The carrier transmission signal parameter requires with reference to table 1.
Table 1
Simultaneously require as follows for the digital signal that receives and receiving system itself:
1, the digital signal that receives will satisfy the high-low level duty ratio near 1:1;
2, all can receive for the carrier signal of carrier amplitude at 1.5V-8.5V;
3, all can receive for the carrier signal of carrier frequency at 47.75K-52.5K;
4, receiver is that the persistent signal of 0.25V is insensitive for the peak value between the 1kHz-1MHz;
5, receiver is that the 20V pulse signal of 5uS is insensitive for width.
The twisted-pair carrier communication circuit part design parameter actual measurement of Automatic meter reading system of the present invention is as follows:
The Euridis modem trainup, transmission rate 9600bps sends carrier signal part of detecting data with reference to table 2.
Table 2
Euridis modem trainup transmission rate 9600 receives the positive negative level duration of signal testing part, and unit is uS, referring to table 3.
Table 3
The interface of hardware module of the present invention is referring to table 4.
Table 4
Twisted-pair carrier communication method for Automatic meter reading system of the present invention comprises the receiving demodulation flow process and sends the modulation flow process.
With reference to Figure 11, described receiving demodulation flow process is carried out according to the following steps:
Receive the interchange carrier signal on the EURIDIS bus, coupling transformer output is every straight rear carrier signal;
Be amplified to the saturated rear output of amplitude with described every straight rear carrier signal;
The interference signal of all frequencies in the saturated carrier signal of filtering except 50kHz;
Carrier signal after the described filtering interfering of 50kHz is carried out full-wave rectification, output direct current carrier signal;
Described direct current carrier signal is carried out low-pass filtering, become approximate square-wave signal;
Described approximate square-wave signal is stagnated chain rate, export preferably square-wave signal;
With reference to Figure 12, described transmission modulation flow process is carried out according to the following steps:
The square-wave signal of 50kHz is generated the 50kHz sinusoidal signal that is used for the carrier wave transmission;
Use analog switch that described 50kHz sinusoidal signal is switched, the direct current carrier signal after the output modulation;
Direct current carrier signal after the described modulation is converted to the interchange carrier signal by the operational amplification circuit with ena-bung function;
Described interchange carrier signal is outputed to the EURIDIS bus through coupling transformer.
What should be understood that is: above-described embodiment is just to explanation of the present invention, rather than limitation of the present invention, and any innovation and creation that do not exceed in the connotation scope of the present invention all fall within protection scope of the present invention.
Claims (6)
1. be used for the twisted-pair carrier communication circuit of Automatic meter reading system, comprise receiving circuit and transtation mission circuit, it is characterized in that described receiving circuit comprises:
Signal coupling circuit receives the EURIDIS carrier signal, through the carrier signal after straight of output behind capacitor C 6 isolated DCs and the coupling transformer T1; Described signal coupling circuit comprises capacitor C 6, capacitor C 8, capacitor C 21, diode D154, diode D155, resistance R 14, resistance R 28 and coupling transformer T1, described capacitor C 8 one termination EURIDIS input 1 end, one end of the end of the other end connecting resistance R28 of capacitor C 8 and the former limit of coupling transformer T1 winding, another termination EURIDIS of resistance R 28 inputs the other end of 2 ends and the former limit of coupling transformer T1 winding, the end of one termination capacitor C21 of coupling transformer T1 secondary winding and an end of resistance R 14, the other end and the signal ground of another termination capacitor C 21 of coupling transformer T1 secondary winding, one end of another termination capacitor C 6 of resistance R 14, the anode of another terminating diode D154 of capacitor C 6 and the negative electrode of diode D155, also be signal output part simultaneously, the negative electrode of diode D154 connects power positive end, the plus earth of diode D155;
Signal amplification circuit is amplified to the saturated rear output of amplitude with what signal coupling circuit was exported every straight rear carrier signal; Described signal amplification circuit comprises capacitor C 1, capacitor C 101, resistance R 1, resistance R 2 and an operational amplifier, one end of described capacitor C 1 is input, the end of other end connecting resistance R1, the input negative terminal of one end of another termination capacitor C 101 of resistance R 1, an end of resistance R 2 and operational amplifier, the other end of the other end connecting resistance R2 of capacitor C 101 and the output of operational amplifier, the positive termination signal ground of the input of operational amplifier;
The 50kHz bandwidth-limited circuit, the interference signal of all frequencies in the saturated carrier signal of filtered signal amplifying circuit output except 50kHz; Described 50kHz bandwidth-limited circuit comprises resistance R 156, resistance R 151, resistance R 157, capacitor C 150, capacitor C 151 and an operational amplifier, described resistance R 156 1 ends are input, the end of other end connecting resistance R157, one end of capacitor C 150 and an end of capacitor C 151, the end of the other end connecting resistance R151 of capacitor C 150 and the input negative terminal of operational amplifier, the other end of another termination capacitor C 151 of resistance R 151 and the output of operational amplifier, also be signal output part simultaneously, the positive termination signal ground of the other end of resistance R 157 and the input of operational amplifier;
Full-wave rectifying circuit carries out full-wave rectification with the carrier signal after the filtering interfering of 50kHz bandwidth-limited circuit output, output direct current carrier signal; Described full-wave rectifying circuit comprises resistance R 152, resistance R 150, resistance R 158, diode D150, diode D151, the first operational amplifier, resistance R 170, resistance R 160, resistance R 161, diode D152, diode D153, the second operational amplifier, resistance R 154 and the 3rd operational amplifier, one end of described resistance R 152 is input, the end of other end connecting resistance R150, the input negative terminal of the negative electrode of diode D150 and the first operational amplifier, the anode of another terminating diode D151 of resistance R 150 and an end of resistance R 158, the anode of diode D150 connects the negative electrode of diode D151 and the output of the first operational amplifier, the positive termination signal ground of the input of the first operational amplifier; Resistance R 170 ends are input, the input negative terminal of the end of other end connecting resistance R160, diode D152 negative electrode and the second operational amplifier, another terminating diode D153 anode of resistance R 160 and an end of resistance R 161, the anode of diode D152 connects the negative electrode of diode D153 and the output of the second operational amplifier, the positive termination signal ground of the input of the second operational amplifier; The other end of the other end connecting resistance R161 of resistance R 158, an end of resistance R 154 and the input negative terminal of the 3rd operational amplifier, the output of another termination the 3rd operational amplifier of resistance R 154, the positive termination signal ground of the input of the 3rd operational amplifier;
Three rank low-pass filter circuits carry out low-pass filtering to the direct current carrier signal of full-wave rectifying circuit output, become approximate square-wave signal; Described three rank low-pass filter circuits comprise resistance R 3, resistance R 165, capacitor C 2, capacitor C 154, resistance R 166, capacitor C 156, capacitor C 153 and an operational amplifier, one end of described resistance R 3 is input, the end of other end connecting resistance R165 and an end of capacitor C 2, the end of the other end connecting resistance R166 of resistance R 165 and an end of capacitor C 154, input negative terminal and the output of another termination operational amplifier of capacitor C 154, one end of another termination capacitor C 156 of resistance R 166 and the input anode of operational amplifier, another termination signal ground of capacitor C 2 and capacitor C 156, capacitor C 153 two ends connect respectively power positive end and ground;
Stagnant chain rate reaches output circuit, and the approximate square-wave signal that three rank low-pass filter circuits are exported stagnates chain rate, exports preferably square-wave signal; Described stagnant chain rate reaches output circuit and comprises resistance R 163, resistance R 162, resistance R 171, an operational amplifier, resistance R 5, resistance R 4, resistance R 29, resistance R 101, diode D1, diode D2, diode D3 and a triode, one end of described resistance R 163 is input, the input anode of another termination operational amplifier, one termination power anode of resistance R 162, the end of other end connecting resistance R171 and the input negative terminal of operational amplifier, the end of the output connecting resistance R4 of operational amplifier and an end of resistance R 5, the anode of another terminating diode D1 of resistance R 5, the negative electrode of diode D1 connects the anode of diode D2, the negative electrode of diode D2 connects the anode of diode D3, the end of the negative electrode connecting resistance R29 of diode D3 and the base stage of triode, the collector electrode of triode connects an end of EURIDIS RXD signal and resistance R 101, the other end of resistance 171, the other end of resistance R 4, the other end of resistance R 29 and the grounded emitter of triode, another termination power positive end of resistance R 101;
Described transtation mission circuit comprises:
Band pass filter generates the square-wave signal of 50kHz and is used for the 50kHz sinusoidal signal that carrier wave sends; Described band pass filter comprises resistance R 16, resistance R 17, resistance R 18, capacitor C 22, capacitor C 23, capacitor C 24 and an operational amplifier, the square-wave signal of one termination 50kHz of described resistance R 17, one end of the end of other end connecting resistance R18, an end of capacitor C 22 and capacitor C 23, the end of the other end connecting resistance R16 of capacitor C 22 and the input negative terminal of operational amplifier, the other end of another termination capacitor C 23 of resistance R 61 and the output of operational amplifier, the positive termination signal ground of the input of operational amplifier;
Signal sending circuit uses analog switch that the 50kHz sinusoidal signal of band pass filter output is switched, and realizes 0,1 transmission of carrier signal; Described signal sending circuit comprises two level reverse circuit and analog switching circuits that structure is identical, and wherein two level reverse circuits are respectively applied to connect EURIDIS TXD and TIC TXD;
The signal that band sends Enable Pin amplifies transtation mission circuit, and the carrier signal of the output of signal sending circuit is sent on the EURIDIS connecting line through amplifying circuit and signal coupling circuit; The signal amplification transtation mission circuit that described band sends Enable Pin comprises resistance R 10, resistance R 11, capacitor C 28 capacitor C 6, resistance R 14 and signal coupling circuit, one end of described resistance R 10 is input, the input negative terminal of the end of other end connecting resistance R11, an end of capacitor C 28 and operational amplifier, the other end of another termination capacitor C 28 of resistance R 11, the output of operational amplifier and the input of signal coupling circuit, the positive termination signal ground of the input of operational amplifier.
2. the twisted-pair carrier communication circuit for Automatic meter reading system as claimed in claim 1 is characterized in that signal coupling circuit and the signal coupling circuit in the transtation mission circuit in the described receiving circuit shares same circuit.
3. the twisted-pair carrier communication circuit for Automatic meter reading system as claimed in claim 1 is characterized in that the square-wave signal of described 50kHz input is external signal, perhaps produces by 555 timers by telecommunication circuit is inner.
4. the twisted-pair carrier communication circuit for Automatic meter reading system as claimed in claim 1, it is characterized in that described level reverse circuit for connecting EURIDIS TXD comprises resistance R 19, resistance R 20, resistance R 21 and a triode, one termination EURIDIS TXD signal of described resistance R 19, the base stage of other end connecting resistance R21 and triode, one termination power anode of resistance R 20, the collector electrode of another termination triode and the input of analog switching circuit, the other end of resistance R 21 and the grounded emitter of triode.
5. such as any one described twisted-pair carrier communication circuit for Automatic meter reading system of claim 1-4, it is characterized in that telecommunication circuit employing contact pin type interface and ammeter are interconnected.
6. the twisted-pair carrier communication method that is used for Automatic meter reading system comprises the receiving demodulation flow process and sends the modulation flow process, it is characterized in that described receiving demodulation flow process carries out according to the following steps:
Receive the interchange carrier signal on the EURIDIS bus, coupling transformer output is every straight rear carrier signal;
Be amplified to the saturated rear output of amplitude with described every straight rear carrier signal;
The interference signal of all frequencies in the saturated carrier signal of filtering except 50kHz;
Carrier signal after the described filtering interfering of 50kHz is carried out full-wave rectification, output direct current carrier signal;
Described direct current carrier signal is carried out low-pass filtering, become approximate square-wave signal;
Described approximate square-wave signal is stagnated chain rate, export preferably square-wave signal;
Described transmission modulation flow process is carried out according to the following steps:
The square-wave signal of 50kHz is generated the 50kHz sinusoidal signal that is used for the carrier wave transmission;
Use analog switch that described 50kHz sinusoidal signal is switched, the direct current carrier signal after the output modulation;
Direct current carrier signal after the described modulation is converted to the interchange carrier signal by the operational amplification circuit with ena-bung function;
Described interchange carrier signal is outputed to the EURIDIS bus through coupling transformer.
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| CN103281094B (en) * | 2013-05-27 | 2016-05-11 | 珠海精讯电子科技有限公司 | Based on the plug and play module of hybrid modulation mode power carrier communication |
| CN105033779B (en) * | 2014-09-01 | 2018-01-30 | 哈尔滨工业大学深圳研究生院 | The dynamic tracking and matching device of Ultrasonic machining system |
| CN104617900B (en) * | 2015-01-19 | 2017-12-08 | 信阳农林学院 | A kind of network signal transmits amplifying circuit |
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Address after: Zhengtai Instrument Measurement Industrial Park, No.1 Liangce Road, Beibaixiang Town, Leqing City, Wenzhou City, Zhejiang Province, 325603 Patentee after: ZHEJIANG CHINT INSTRUMENT & METER Co.,Ltd. Address before: 325603 Wenzhou Daqiao Industrial Park, Yueqing City, Wenzhou City, Zhejiang Province Patentee before: ZHEJIANG CHINT INSTRUMENT & METER Co.,Ltd. |