CN204945710U - A kind of driver control circuit - Google Patents
A kind of driver control circuit Download PDFInfo
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- CN204945710U CN204945710U CN201520633773.3U CN201520633773U CN204945710U CN 204945710 U CN204945710 U CN 204945710U CN 201520633773 U CN201520633773 U CN 201520633773U CN 204945710 U CN204945710 U CN 204945710U
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- data processing
- processing management
- control circuit
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- management cpu
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Abstract
The utility model discloses a kind of driver control circuit, comprising: data processing management central processor CPU, motor control unit, signal input-output unit and communication interface; Data processing management CPU is connected with personal computer PC by communication interface.Motor control unit comprises multiple independently control single chip computer, is connected with data processing management CPU respectively by serial peripheral equipment interface SPI bus and UART Universal Asynchronous Receiver Transmitter URAT serial ports.Signal input-output unit is connected with data processing management CPU.By scheme of the present utility model, the control of multiple motor action can be realized.
Description
Technical field
The utility model relates to drived control field, particularly relates to a kind of driver control circuit.
Background technology
Along with the fast development of control technology, present stage, the requirement of New Type Numerical Control System standardization, flexibility has impelled the proposition of explorative system concept in modern control system.And next-generation drive corresponding should turn to target with open, hardware can realize one or more coordinate axis positions, speed and trace track and control.
Summary of the invention
In order to solve the problem, the utility model proposes a kind of driver control circuit, the control of multiple motor action can be realized.
In order to achieve the above object, the utility model proposes a kind of driver control circuit, this control circuit comprises: data processing management central processor CPU, motor control unit, signal input-output unit and communication interface.
Data processing management CPU is connected with personal computer PC by communication interface.
Motor control unit comprises multiple independently control single chip computer, is connected with data processing management CPU respectively by serial peripheral equipment interface SPI bus and UART Universal Asynchronous Receiver Transmitter URAT serial ports.
Signal input-output unit is connected with data processing management CPU.
Preferably, data processing management CPU is STM32F207ZET6 single-chip microcomputer.
Preferably, signal input-output unit comprises: Puled input unit, analog input unit, digital quantity input block and digital output unit.
Puled input unit for receive frequency be the four tunnel differential received chips of 1M.
Analog input unit comprises operational amplification circuit and input resistance; The input impedance of input resistance is 20K Ω.
Digital quantity input block and digital output unit are connected between data processing management CPU and peripherals respectively by light-coupled isolation mode; Wherein, digital quantity input block and digital output unit are connected to the universal input/output GPIO pin of data processing management CPU.
Preferably,
Puled input unit comprises 4 Puled input interfaces; Analog input unit comprises 4 analog input interfaces; Digital quantity input block comprises 8 digital input interfaces; Digital output unit comprises 16 digital output interfaces.
Preferably, communication interface comprises: RS232 interface, RS485 interface and Ethernet interface.
Preferably,
Data processing management CPU is connected with PC by Ethernet interface.
Preferably, control circuit also comprises touch-screen; Touch-screen is connected with data processing management CPU by RS485 interface.
Preferably, data processing management CPU is connected with host computer by RS232 interface.
Preferably, multiple independently control single chip computer is 4.
Compared with prior art, the utility model comprises: data processing management CPU is connected with personal computer PC by communication interface.Motor control unit comprises multiple independently control single chip computer, is connected with data processing management CPU respectively by serial peripheral equipment interface SPI bus and UART Universal Asynchronous Receiver Transmitter URAT serial ports.Signal input-output unit is connected with data processing management CPU.By scheme of the present utility model, the control of multiple motor action can be realized.
Accompanying drawing explanation
Be described the accompanying drawing in the utility model embodiment below, the accompanying drawing in embodiment is for further understanding of the present utility model, is used from explanation the utility model, does not form the restriction to the utility model protection domain with instructions one.
Fig. 1 is driver control circuit composition frame chart of the present utility model;
Fig. 2 is the driver control circuit composition structural representation of the utility model embodiment.
Embodiment
For the ease of the understanding of those skilled in the art, below in conjunction with accompanying drawing, the utility model will be further described, can not be used for limiting protection domain of the present utility model.
In order to achieve the above object, the utility model proposes a kind of driver control circuit 01, as shown in Figure 1 and Figure 2, this control circuit comprises: data processing management central processor CPU 02, motor control unit 03, signal input-output unit 04 and communication interface 05.
Data processing management CPU02 is connected with personal computer PC by communication interface 05.
Preferably, data processing management CPU is STM32F207ZET6 single-chip microcomputer.
In the utility model embodiment, data processing management CPU02 adopts clock frequency can reach the STM32F207ZET6 single-chip microcomputer of 120M, and floating-point operation supported by this single-chip microcomputer, and kernel is the Cortex-M3 of ARM.Sheet have spi bus communication interface, serial communication interface and GPIO pin; For connecting from different sheet external equipment.Communication module integrated on sheet can directly be connected with external communication.
Motor control unit 03 comprises multiple independently control single chip computer, is connected with data processing management CPU02 respectively by serial peripheral equipment interface SPI bus and UART Universal Asynchronous Receiver Transmitter URAT serial ports.
Preferably, multiple independently control single chip computer is 4.
In the utility model embodiment, the quantity of the control single chip computer that motor control unit 03 comprises can carry out according to concrete control needs increasing or reducing, such as, when we need four axles to drive, 4 control single chip computers can be selected, each control single chip computer is responsible for the drived control of an axle respectively, these four control single chip computers and data processing management CPU02 collaborative work, and the independence that can realize four axles controls and four-axle linked control.In like manner, when we need two axles to drive, can also select 2 control single chip computers, these two control single chip computers and data processing management CPU02 collaborative work, the independence realizing diaxon controls and two-axle interlocking control.Particularly, which action each axle has needed can come according to specific needs specifically to define, different process actions can adopt independently control single chip computer respectively, and, this control single chip computer is only responsible for the action control of axle, other some state acquisitions and alerting signal process are completed by data processing management CPU02, can reduce interference problem each other so greatly.
In addition, in the utility model embodiment, when selecting data processing management CPU02 to be STM32F207ZET6 single-chip microcomputer, owing to carrying spi bus communication interface and serial communication interface in its sheet, above-mentioned multiple independently control single chip computers, can be connected with data processing management CPU02 respectively by spi bus and URAT serial ports.Here multiple independently control single chip computer difference SPI communication modes is connected with data processing management CPU02, acyclic exchanges data can be completed with data processing management CPU02, and communication speed is 10M, ensure that the real-time of data, realize accuracy of action and rapidity better further, complete some the periodic exchanges data with data processing management CPU02 by URAT serial communication simultaneously.
Signal input-output unit 04 is connected with data processing management CPU02.
Preferably, signal input-output unit 04 comprises: Puled input unit, analog input unit, digital quantity input block and digital output unit.
The four tunnel differential received chips of Puled input unit to be receive frequency be 1M, support that orthogonal pulses input mode and direction add the input mode of pulse, can achieve a butt joint with domestic and international most of system, as new generation, Siemens.
Analog input unit is used for, by amplifier, external voltage is converted into the acceptable voltage of CPU.Analog input unit comprises operational amplification circuit and input resistance; The input impedance of this input resistance is 20K Ω; Analog input unit supports that 0 ~ 10V inputs with the analog voltage of-10V ~+10V.
Digital quantity input block and digital output unit are connected between data processing management CPU02 and peripherals respectively by light-coupled isolation mode, and light-coupled isolation mode well solves external power source and some electromagnetic interference problems.Wherein, digital quantity input block and digital output unit are connected to the universal input/output GPIO pin of data processing management CPU.
Preferably,
Puled input unit comprises 4 Puled input interfaces, supports 4 road pulse input signals; Analog input unit comprises 4 analog input interfaces, supports 4 road analog input information number; Digital quantity input block comprises 8 digital input interfaces, supports 8 railway digital input signals; Digital output unit comprises 16 digital output interfaces, supports 16 railway digital output signals.
Preferably, communication interface 05 comprises: RS232 interface, RS485 interface and Ethernet interface.Abundant communication interface ensure that dirigibility that the utility model applies, convenience, reliability.
Preferably,
Data processing management CPU02 is connected with PC by Ethernet interface.
Preferably, control circuit also comprises touch-screen; Touch-screen is connected with data processing management CPU02 by RS485 interface.
Preferably, data processing management CPU is connected with host computer by RS232 interface.
Compared with prior art, the utility model comprises: data processing management CPU is connected with personal computer PC by communication interface.Motor control unit comprises multiple independently control single chip computer, is connected with data processing management CPU respectively by serial peripheral equipment interface SPI bus and UART Universal Asynchronous Receiver Transmitter URAT serial ports.Signal input-output unit is connected with data processing management CPU.By scheme of the present utility model, the control of multiple motor action can be realized.
It should be noted that; above-described embodiment is only understand for the ease of those skilled in the art; be not limited to protection domain of the present utility model; under the prerequisite not departing from inventive concept of the present utility model, any apparent replacement and improvement etc. that those skilled in the art make the utility model are all within protection domain of the present utility model.
Claims (9)
1. a driver control circuit, is characterized in that, described control circuit comprises: data processing management central processor CPU, motor control unit, signal input-output unit and communication interface;
Described data processing management CPU is connected with personal computer PC by described communication interface;
Described motor control unit comprises multiple independently control single chip computer, is connected with described data processing management CPU respectively by serial peripheral equipment interface SPI bus and UART Universal Asynchronous Receiver Transmitter URAT serial ports;
Described signal input-output unit is connected with described data processing management CPU.
2. control circuit as claimed in claim 1, it is characterized in that, described data processing management CPU is STM32F207ZET6 single-chip microcomputer.
3. control circuit as claimed in claim 1, it is characterized in that, described signal input-output unit comprises: Puled input unit, analog input unit, digital quantity input block and digital output unit;
Described Puled input unit for receive frequency be the four tunnel differential received chips of 1M;
Described analog input unit comprises operational amplification circuit and input resistance; The input impedance of described input resistance is 20K Ω;
Described digital quantity input block and described digital output unit are connected between described data processing management CPU and peripherals respectively by light-coupled isolation mode; Wherein, described digital quantity input block and described digital output unit are connected to the universal input/output GPIO pin of described data processing management CPU.
4. control circuit as claimed in claim 3, is characterized in that,
Described Puled input unit comprises 4 Puled input interfaces; Described analog input unit comprises 4 analog input interfaces; Described digital quantity input block comprises 8 digital input interfaces; Described digital output unit comprises 16 digital output interfaces.
5. control circuit as claimed in claim 1, it is characterized in that, described communication interface comprises: RS232 interface, RS485 interface and Ethernet interface.
6. control circuit as claimed in claim 5, is characterized in that,
Described data processing management CPU is connected with described PC by described Ethernet interface.
7. control circuit as claimed in claim 5, it is characterized in that, described control circuit also comprises touch-screen; Described touch-screen is connected with described data processing management CPU by described RS485 interface.
8. control circuit as claimed in claim 5, is characterized in that, described data processing management CPU is connected with host computer by described RS232 interface.
9. control circuit as claimed in claim 1, it is characterized in that, described multiple independently control single chip computer is 4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520633773.3U CN204945710U (en) | 2015-08-20 | 2015-08-20 | A kind of driver control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520633773.3U CN204945710U (en) | 2015-08-20 | 2015-08-20 | A kind of driver control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204945710U true CN204945710U (en) | 2016-01-06 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201520633773.3U Expired - Fee Related CN204945710U (en) | 2015-08-20 | 2015-08-20 | A kind of driver control circuit |
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| CN (1) | CN204945710U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109859905A (en) * | 2019-03-24 | 2019-06-07 | 杭州三普机械有限公司 | A kind of high-speed knitter intelligent controller |
-
2015
- 2015-08-20 CN CN201520633773.3U patent/CN204945710U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109859905A (en) * | 2019-03-24 | 2019-06-07 | 杭州三普机械有限公司 | A kind of high-speed knitter intelligent controller |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160106 Termination date: 20200820 |
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| CF01 | Termination of patent right due to non-payment of annual fee |