CN204925176U - Semiconductor chip tests punch block with compound coaxial configuration - Google Patents
Semiconductor chip tests punch block with compound coaxial configuration Download PDFInfo
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- CN204925176U CN204925176U CN201520667941.0U CN201520667941U CN204925176U CN 204925176 U CN204925176 U CN 204925176U CN 201520667941 U CN201520667941 U CN 201520667941U CN 204925176 U CN204925176 U CN 204925176U
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- probe
- punch block
- insulation
- chip
- signal transmissions
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- 238000012360 testing method Methods 0.000 title claims abstract description 54
- 239000004065 semiconductor Substances 0.000 title claims abstract description 22
- 150000001875 compounds Chemical class 0.000 title claims abstract description 16
- 239000000523 sample Substances 0.000 claims abstract description 81
- 230000008054 signal transmission Effects 0.000 claims abstract description 43
- 239000007769 metal material Substances 0.000 claims abstract description 10
- 238000009413 insulation Methods 0.000 claims description 45
- 239000011810 insulating material Substances 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 5
- 229920003023 plastic Polymers 0.000 claims description 4
- 239000004033 plastic Substances 0.000 claims description 4
- 238000010998 test method Methods 0.000 abstract description 2
- 238000007711 solidification Methods 0.000 abstract 1
- 230000008023 solidification Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 description 8
- 238000005259 measurement Methods 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000002131 composite material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000013011 mating Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
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- Measuring Leads Or Probes (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The utility model discloses a semiconductor chip tests punch block with compound coaxial configuration, including punch block main part, one or a plurality of signal transmission probes, probe layer board, insulating reactance control circle down, wherein the punch block main part with the probe layer board is the metal material to surface in this metal material is provided with the insulating layer, the punch block main part the probe layer board all is provided with at least one and is used for fixing the signal needle cave of signal transmission probe, lower insulating reactance control circle solidification in the lower part of probe layer board, each be equipped with one or a plurality of insulating position circles on the signal transmission probe. The utility model discloses it keeps the coaxial configuration to make between chip contact point and the test line board contact point of signal transmission probe to thereby the test of the chip of hyperfrequency is guaranteed in the loss that improves the electrical property of chip testing punch block in test procedure.
Description
Technical field
The utility model relates to semiconductor and art of electrical connectors field, relates to a kind of semiconductor die testing punch block with compound co-axial structure specifically.
Background technology
In semiconductor manufacturing industry, semi-conductor chip need carry out electric performance test, whether meets the requirement of electric property with checking chip.In chip testing process, electric current and signal need realize connecting between chip and measurement circuit plate and transmission by electrical connections, chip testing frame is indispensable a kind of connecting test device in whole test macro, traditional chip test needle frame comprises the chip positioning plate made with high-strength composite insulating material, punch block main body, the spring probe that probe holding plate and high-conductive metal material make.
In recent years, along with its main operational speed goes of semi-conductor chip is fast, requires that chip test needle frame can meet the requirement of high-frequency test, such as, be greater than the test of the signal chip of 50 Gigahertzs.One of the scheme solving high-speed chip test is the controllable reactance chip testing frame adopting coaxial configuration, and it to comprise on chip positioning plate, ground connection copper billet, probe holding plate, spring probe under holding plate, probe.Keep special ratios between the external diameter of spring probe and the pin hole internal diameter of copper billet, thus ensure that the reactance of input and output matches to reduce the loss of high frequency electrical signal in transmitting procedure.But the signal probe of Signal transmissions can not contact ground connection copper billet to avoid electric signal short circuit.Therefore the location-plate up and down of probe must adopt non-conductive composite plastics material with the position of fixed signal probe to avoid short circuit, but owing to adopting insulating material, the upper and lower location-plate of probe defines non-coaxial structure, thus produce not mating of reactance, cause electric signal a large amount of loss in transmitting procedure, especially in ultra-high frequency signal transmission.Therefore, the test probe carriage of this coaxial configuration can only be applied to ~ the chip testing of 20 Gigahertzs.
Therefore, inventor of the present utility model needs a kind of new technology of design badly to improve its problem.
Utility model content
The utility model aims to provide a kind of semiconductor die testing punch block with compound co-axial structure, it can make to keep coaxial configuration between the chip contact of Signal transmissions probe and measurement circuit plate contact point, to improve the electrical property loss of chip test needle frame in test process thus to ensure the test of the chip of ultrahigh frequency (as 50 Gigahertzs).
For solving the problems of the technologies described above, the technical solution of the utility model is:
A kind of semiconductor die testing punch block with compound co-axial structure, comprise punch block main body, one or more Signal transmissions probe, probe supporting plate, lower insulation reactance control loop, wherein said punch block main body and described probe supporting plate are metal material, and the surface of this metal material is provided with insulation course.
Described punch block main body, described probe supporting plate are provided with at least one for fixing the signal pin cave of described Signal transmissions probe, described lower insulation reactance control loop is solidificated in the bottom of probe supporting plate, and Signal transmissions probe described in each is provided with one or more insulation centring ring.
Preferably, the upper insulation reactance control loop be solidificated in above described punch block main body is also comprised.
Preferably, described Signal transmissions probe comprises sleeve, upper insulation centring ring, lower insulation centring ring, is arranged on the upper testing needle in sleeve, spring and lower testing needle from top to down.
The sleeve of described Signal transmissions probe arranges the first groove, and described upper insulation centring ring is arranged in described first groove.
The sleeve of described Signal transmissions probe arranges the second groove, and described lower insulation centring ring is arranged in described second groove.
Preferably, described upper insulation reactance control loop adopts resistivity >10
11the insulating material of ohm is fixed on the signal pin cave inside surface of punch block main body.
Preferably, described lower insulation reactance control loop adopts resistivity >10
11the insulation organic plastic material of ohm is fixed on the signal pin cave inside surface of probe supporting plate.
Adopt technique scheme, the utility model at least comprises following beneficial effect:
The semiconductor die testing punch block with compound co-axial structure described in the utility model, Signal transmissions probe head portion contacts with chip pin, in high frequency chip test, require that Signal transmissions probe matches to control reactance in certain value (as 50 ohm, 45 ohm etc.) with signal pin cave physical dimension.The punch block main body of metal and probe supporting plate are all connected with putting electrical ground.Signal transmissions probe is placed in the location of signal pin cave domestic demand machinery to avoid skidding off and offset bore center.Lower insulation reactance control loop is solidificated in the signal pin cave of probe supporting plate.There is the function of the reactance at holding signal transmission probe location and this position of control.Because the external diameter of Signal transmissions probe and the internal diameter in signal pin cave meet certain ratio, whole punch block from chip pin contact point to Signal transmissions probe contact point all there is controlled reactance.Match with corresponding input signal reactance simultaneously, substantially improve the electrical loss in test process of chip test needle frame, thus improve the electrical property of chip test needle frame entirety, to meet the test request of chip travelling speed more than 50 Gigahertzs.
Accompanying drawing explanation
Fig. 1 is the structural representation with the semiconductor die testing punch block of compound co-axial structure described in the utility model;
Fig. 2 is the structural representation with the semiconductor die testing punch block of compound co-axial structure described in the utility model.
Wherein: 1 chip, 2. punch block main body, 3. Signal transmissions probe, 4. probe supporting plate, 5. time insulation reactance control loop, 6. on insulate reactance control loop, 7. to insulate centring ring.
Embodiment
Below in conjunction with drawings and Examples, the utility model is further illustrated.
As shown in Figure 1, for meeting a kind of semiconductor die testing punch block with compound co-axial structure of the present utility model, comprise punch block main body 2, one or more Signal transmissions probe 3 (the present embodiment is preferably 2 as illustrating), probe supporting plate 4, lower insulation reactance control loop 5, semi-conductor chip location-plate (omitting in accompanying drawing), wherein said punch block main body 2, described probe supporting plate 4 are metal material, and the surface of this metal material are provided with insulation course.For fixed chip 1 on semi-conductor chip location-plate, below punch block main body 2, be provided with measurement circuit plate, because measurement circuit plate is not the innovative point of the present embodiment, therefore do not embody in the accompanying drawings, ask those skilled in the art to know.
Described punch block main body 2, described probe supporting plate 4 are provided with at least one for fixing the signal pin cave of described Signal transmissions probe 3, described lower insulation reactance control loop 5 is solidificated in the bottom of probe supporting plate 4, and described lower insulation reactance control loop 5 is for the center of holding signal transmission probe 3 in signal pin cave.Signal transmissions probe 3 described in each is provided with one or more insulation centring ring 7 (the present embodiment is preferably 2, i.e. upper insulation centring ring and lower insulation centring ring).This insulation centring ring not only can transmit probe 3 in center, signal pin cave by holding signal, the precompression of dynamic pin under can also producing probe.
Preferably, as shown in Figure 2, the present embodiment also comprises the upper insulation reactance control loop 6 be solidificated in above described punch block main body 2.It has following function: avoid Signal transmissions probe 3 to contact the particle foreign material produced with chip pin and fall in signal pin cave; Control the reactance at this position; Locate to guarantee that Signal transmissions probe 3 is in center to Signal transmissions probe 3.Those skilled in the art can select according to the user demand of reality, and the present embodiment does not limit this.
Preferably, described Signal transmissions probe 3 comprises sleeve, upper insulation centring ring, lower insulation centring ring, is arranged on the upper testing needle in sleeve, spring and lower testing needle from top to down;
The sleeve of described Signal transmissions probe 3 arranges the first groove, and described upper insulation centring ring is arranged in described first groove;
The sleeve of described Signal transmissions probe 3 arranges the second groove, and described lower insulation centring ring is arranged in described second groove.
Preferably, described upper insulation reactance control loop 6 adopts resistivity >10
11the insulating material of ohm is fixed on the signal pin cave inside surface of punch block main body 2.
Preferably, described lower insulation reactance control loop 5 adopts resistivity >10
11the insulation organic plastic material of ohm is fixed on the signal pin cave inside surface of probe supporting plate 4.It can be selected according to the concrete method of testing of chip, and the present embodiment does not limit this.
Preferably, described punch block main body 2 and described probe supporting plate 4 are equipped with grounding pin cave, described grounding pin cave inside surface does not arrange insulation course, to keep the excellent electric contact of the metallic matrix of grounded probe and described punch block main body 2 and described probe supporting plate 4.
The principle of work of the present embodiment is: Signal transmissions probe 3 head portion contacts with chip pin, in high frequency chip test, require that Signal transmissions probe 3 matches to control reactance in certain value (as 50 ohm, 45 ohm etc.) with signal pin cave physical dimension.The punch block main body 2 of metal and probe supporting plate 4 are all connected with putting electrical ground.Signal transmissions probe 3 is placed in the location of signal pin cave domestic demand machinery to avoid skidding off and offset bore center.Lower insulation reactance control loop 5 is solidificated in the signal pin cave of probe supporting plate 4.There is the function of the reactance at holding signal transmission probe 3 position and this position of control.Because the external diameter of Signal transmissions probe 3 and the internal diameter in signal pin cave meet certain ratio, whole punch block all has controlled reactance from chip pin contact point to Signal transmissions probe 3 contact points.Match with corresponding input signal reactance simultaneously, substantially improve the electrical loss in test process of chip test needle frame, thus improve the electrical property of chip test needle frame entirety, to meet the test request of chip travelling speed more than 50 Gigahertzs.
A kind of semiconductor die testing punch block with compound co-axial structure described in the present embodiment, because its chip test needle frame adopts metallic conductor to add the structure of insulation course, metal material is as ground connection thus make to keep coaxial configuration between the chip contact of Signal transmissions probe 3 and measurement circuit plate contact point, to improve the test that the electrical property of chip test needle frame in test process ensures the chip of ultrahigh frequency (as 50 Gigahertzs).
Above an embodiment of the present utility model has been described in detail, but described content is only the preferred embodiment that the utility model is created, and can not be considered to for limiting practical range of the present utility model.All any equivalent variations done according to the utility model application range, all should still be within patent covering scope of the present utility model.
Claims (5)
1. one kind has the semiconductor die testing punch block of compound co-axial structure, it is characterized in that: comprise punch block main body, one or more Signal transmissions probe, probe supporting plate, lower insulation reactance control loop, wherein said punch block main body and described probe supporting plate are metal material, and the surface of this metal material is provided with insulation course;
Described punch block main body, described probe supporting plate are provided with at least one for fixing the signal pin cave of described Signal transmissions probe, described lower insulation reactance control loop is solidificated in the bottom of probe supporting plate, and Signal transmissions probe described in each is provided with one or more insulation centring ring.
2. there is the semiconductor die testing punch block of compound co-axial structure as claimed in claim 1, it is characterized in that: also comprise the upper insulation reactance control loop be solidificated in above described punch block main body.
3. there is the semiconductor die testing punch block of compound co-axial structure as claimed in claim 2, it is characterized in that: described Signal transmissions probe comprises sleeve, upper insulation centring ring, lower insulation centring ring, be arranged on the upper testing needle in sleeve, spring and lower testing needle from top to down;
The sleeve of described Signal transmissions probe arranges the first groove, and described upper insulation centring ring is arranged in described first groove;
The sleeve of described Signal transmissions probe arranges the second groove, and described lower insulation centring ring is arranged in described second groove.
4. there is the semiconductor die testing punch block of compound co-axial structure as claimed in claim 3, it is characterized in that: described upper insulation reactance control loop adopts resistivity >10
11the insulating material of ohm is fixed on the signal pin cave inside surface of punch block main body.
5. there is the semiconductor die testing punch block of compound co-axial structure as claimed in claim 4, it is characterized in that: described lower insulation reactance control loop adopts resistivity >10
11the insulation organic plastic material of ohm is fixed on the signal pin cave inside surface of probe supporting plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520667941.0U CN204925176U (en) | 2015-08-31 | 2015-08-31 | Semiconductor chip tests punch block with compound coaxial configuration |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520667941.0U CN204925176U (en) | 2015-08-31 | 2015-08-31 | Semiconductor chip tests punch block with compound coaxial configuration |
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| Publication Number | Publication Date |
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| CN204925176U true CN204925176U (en) | 2015-12-30 |
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| CN201520667941.0U Active CN204925176U (en) | 2015-08-31 | 2015-08-31 | Semiconductor chip tests punch block with compound coaxial configuration |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106802391A (en) * | 2017-03-24 | 2017-06-06 | 深圳市斯纳达科技有限公司 | Arrangement for testing integrated circuit and its electric conductor component |
| CN106826123A (en) * | 2017-02-16 | 2017-06-13 | 苏州微缜电子科技有限公司 | A kind of processing technology of metal insulation chip test needle frame |
| CN110247218A (en) * | 2019-07-03 | 2019-09-17 | 法特迪精密科技（苏州）有限公司 | A kind of hyperfrequency socket for inspection suitable for integrated circuit |
| CN110726917A (en) * | 2019-09-25 | 2020-01-24 | 苏州韬盛电子科技有限公司 | Semiconductor test socket with hybrid coaxial structure and preparation method thereof |
-
2015
- 2015-08-31 CN CN201520667941.0U patent/CN204925176U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106826123A (en) * | 2017-02-16 | 2017-06-13 | 苏州微缜电子科技有限公司 | A kind of processing technology of metal insulation chip test needle frame |
| CN106802391A (en) * | 2017-03-24 | 2017-06-06 | 深圳市斯纳达科技有限公司 | Arrangement for testing integrated circuit and its electric conductor component |
| CN110247218A (en) * | 2019-07-03 | 2019-09-17 | 法特迪精密科技（苏州）有限公司 | A kind of hyperfrequency socket for inspection suitable for integrated circuit |
| CN110726917A (en) * | 2019-09-25 | 2020-01-24 | 苏州韬盛电子科技有限公司 | Semiconductor test socket with hybrid coaxial structure and preparation method thereof |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |