CN204906181U - Voltage gear control circuit - Google Patents
Voltage gear control circuit Download PDFInfo
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- CN204906181U CN204906181U CN201520688870.2U CN201520688870U CN204906181U CN 204906181 U CN204906181 U CN 204906181U CN 201520688870 U CN201520688870 U CN 201520688870U CN 204906181 U CN204906181 U CN 204906181U
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- voltage
- dividing potential
- potential drop
- level
- control circuit
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Abstract
The utility model discloses a voltage gear control circuit, include: charge pump, partial pressure system, comparator and power, the partial pressure system includes: by the one -level partial pressure branch road that at least one one -level partial pressure impedance component is established ties and is formed, the head end of one -level partial pressure branch road is as the input of partial pressure system, at least one N channel metal oxide semiconductor type field effect transistor, second grade partial pressure branch road by at least one second grade partial pressure impedance component series connection formation, at least one P channel metal oxide semiconductor type field effect transistor, the earth impedance component, the end of second grade partial pressure branch road passes through earth impedance component ground connection, and the output of conduct partial pressure system, the input of charge pump and power and partial pressure system links to each other respectively, and the output of partial pressure system and the inverting input of comparator end are connected, and invariable reference voltage is connected to the non inverting input end of comparator, and the messenger that the charge pump is connected to the output can hold. The utility model discloses a voltage gear control circuit output voltage scope is big, and with low costs.
Description
Technical field
The utility model embodiment relates to electronic circuit technology, particularly relates to a kind of voltage gear control circuit.
Background technology
The advantages such as it is comparatively large that data storage type flash memory (NANDFlash) has capacity, and speed of rewriting is fast, are applicable to the storage of mass data, thus in the industry cycle obtain and apply more and more widely.
The programming of NANDFlash and erasing need 30V high pressure, and provide NANDFlash programme and erasing time required voltage circuit in, usual use P-channel metal-oxide-semiconductor type field effect transistor (PMOS), but based on current technique, the cost manufacturing the PMOS of withstand voltage 30V is very high.
Utility model content
The utility model provides a kind of voltage gear control circuit, large to realize output voltage range, reduces costs.
The utility model embodiment provides a kind of voltage gear control circuit, comprising: charge pump, voltage divider system, comparator and power supply, and described voltage divider system comprises:
To be connected the one-level dividing potential drop branch road formed by least one one-level dividing potential drop impedance component, the impedor head end of each one-level dividing potential drop is as an one-level dividing point, and the head end of described one-level dividing potential drop branch road is as the input of described voltage divider system;
At least one N NMOS N-channel MOS N type field effect transistor NMOS, the drain electrode of described NMOS tube is connected with described electric charge delivery side of pump, the grid of described NMOS tube is connected with one-level control signal output, and the source electrode of each described NMOS tube is connected with each described one-level dividing point one_to_one corresponding;
To be connected the secondary dividing potential drop branch road formed by least one secondary dividing potential drop impedance component, the impedor head end of each secondary dividing potential drop is as a secondary dividing point;
At least one P-channel metal-oxide-semiconductor type field effect transistor PMOS, the drain electrode of each described PMOS is connected with each described secondary dividing point one_to_one corresponding, the grid of described PMOS is connected with Two-stage control signal output part, and the source electrode of each described PMOS is connected with the end of described one-level dividing potential drop branch road respectively;
Impedance ground element, the end of described secondary dividing potential drop branch road by described impedance ground element ground, and as the output of described voltage divider system;
Described charge pump, be connected respectively with the input of described power supply with described voltage divider system, the output of described voltage divider system is connected with the inverting input of described comparator, and the in-phase input end of described comparator connects constant reference voltage, and output connects the Enable Pin of described charge pump.
Further, described voltage gear control circuit, also comprises:
Not gate, the output of described comparator is connected by the Enable Pin of described not gate with described charge pump, and accordingly, the output of described voltage divider system is connected with the in-phase input end of described comparator, and the inverting input of described comparator connects constant reference voltage.
Further, the impedor impedance value of single described one-level dividing potential drop is more than or equal to the impedor impedance value sum of all secondary dividing potential drops;
Impedance ground element is equal with the impedor impedance value of single secondary dividing potential drop.
Further, described NMOS tube is depletion type NMOS tube, withstand voltage more than 30V;
Described PMOS is depletion type PMOS, withstand voltage more than 7V.
Further, described voltage gear control circuit, also comprises:
Front end impedance component, between the head end being connected to described electric charge delivery side of pump and described one-level dividing potential drop branch road.
Further, described one-level dividing potential drop impedance component, secondary dividing potential drop impedance component, impedance ground element comprise following at least one:
Resistance, diode, MOS type field effect transistor.
Further, the resistance of one-level divider resistance is 50K ohm;
The resistance of secondary divider resistance is 10K ohm;
The resistance of earth resistance is 10K ohm.
Further, described one-level dividing potential drop impedance component is identical with the impedor type in described front end;
Described secondary dividing potential drop impedance component is identical with the type of described impedance ground element.
Further, the magnitude of voltage of described constant reference voltage is 1V.
The utility model, by two-stage dividing potential drop branch road, does not need the PMOS using high cost, solves the problem that voltage gear control circuit manufacturing cost is high, realizes the effect reduced costs.
Accompanying drawing explanation
Fig. 1 is the structural representation of the voltage gear control circuit of prior art;
Fig. 2 is the circuit diagram of voltage divider system in a kind of voltage gear control circuit in the utility model embodiment one;
Fig. 3 is the structural representation of a kind of voltage gear control circuit in the utility model embodiment two;
Fig. 4 is the circuit diagram of voltage divider system in a kind of voltage gear control circuit in the utility model embodiment three.
Embodiment
Below in conjunction with drawings and Examples, the utility model is described in further detail.Be understandable that, specific embodiment described herein only for explaining the utility model, but not to restriction of the present utility model.It also should be noted that, for convenience of description, illustrate only the part relevant to the utility model in accompanying drawing but not entire infrastructure.
Embodiment one
Fig. 1 is the structural representation of the voltage gear control circuit of prior art, and as shown in Figure 1, voltage gear control circuit comprises: charge pump, voltage divider system, comparator and power supply.
Wherein, charge pump, is connected with voltage divider system respectively with power supply, for exporting the output voltage VH higher than supply voltage, outputs to the input of voltage divider system;
Voltage divider system, for exporting the low-voltage component VDIV being proportional to charge pump output voltage VH, the output of voltage divider system connects the inverting input of comparator;
The in-phase input end of comparator connects constant reference voltage VREF, and output connects the Enable Pin EN of charge pump, for controlling the start and stop of charge pump according to the magnitude of voltage magnitude relationship of low-voltage component VDIV and constant reference voltage VREF;
Power supply is connected to the input of charge pump, for charge pump is powered.
Voltage divider system controls the proportionality coefficient μ of low-voltage component VDIV and charge pump output voltage VH.When charge pump output voltage VH equals the target voltage of voltage divider system control, low-voltage component VDIV equals constant reference voltage VREF.When charge pump output voltage VH is greater than target voltage, low-voltage component VDIV is greater than constant reference voltage VREF, and comparator output low level is to the Enable Pin of charge pump, and charge pump quits work, and its output voltage VH maintains target voltage; When charge pump output voltage VH is less than target voltage, low-voltage component VDIV is less than constant reference voltage VREF, and comparator exports the Enable Pin of high level to charge pump, and charge pump starts, and its output voltage VH continues to promote, until it reaches target voltage.Example, when the proportionality coefficient μ of low-voltage component VDIV and charge pump output voltage VH is 0.1, charge pump output voltage VH=VREF/ μ=10VREF.
The circuit diagram of voltage divider system in a kind of voltage gear control circuit that Fig. 2 provides for the present embodiment, as shown in Figure 2, preferably, one-level dividing potential drop impedance component, secondary dividing potential drop impedance component and impedance ground element are resistance, i.e. one-level divider resistance, secondary divider resistance and earth resistance.One-level divider resistance R1, R2, R3 and R4 are composed in series one-level dividing potential drop branch road, first section of each one-level divider resistance as an one-level dividing point, example, the resistance of each one-level divider resistance is 50K ohm; Secondary divider resistance R5, R6, R7, R8 and R9 are composed in series secondary dividing potential drop branch road, the head end of each secondary divider resistance is as a secondary dividing point, the end of secondary dividing potential drop branch road is connected with earth resistance R10, example, the resistance of each secondary divider resistance and earth resistance is 10K ohm.
NMOS tube Q1, Q2, Q3 are connected with each one-level dividing point one_to_one corresponding with the source electrode of Q4, grid connects one-level control signal output MSB<1:4> respectively, drain electrode is all connected with electric charge delivery side of pump, and example, the withstand voltage of NMOS tube is 30V.Preferably, the digital signal of one-level control signal to be the amplitude of oscillation be 0 ~ VH, VH is charge pump output voltage, one-level control signal is combined by digital decoder and level shifting circuit and produces, when the output of one-level control signal is 0, the NMOS tube of its correspondence turns off, when one-level control signal exports as VH, and the NMOS tube conducting of its correspondence.PMOS U1, U2, U3, U4 are connected with each secondary dividing point one_to_one corresponding with the drain electrode of U5, grid connects Two-stage control signal output part LSB<1:5> respectively, source electrode is all connected with the end of one-level dividing potential drop branch road, example, and the withstand voltage of PMOS is 7V.Preferably, the digital signal of one-level control signal to be the amplitude of oscillation be 0 ~ VH, VH is charge pump output voltage, one-level control signal is combined by digital decoder and level shifting circuit and produces, when the output of one-level control signal is 0, the NMOS tube of its correspondence turns off, when one-level control signal exports as VH, and the NMOS tube conducting of its correspondence.Preferably, the digital signal of Two-stage control signal to be the amplitude of oscillation be 0 ~ RSW, RSW is the magnitude of voltage of one-level dividing potential drop branch road end, Two-stage control signal is also combined by digital decoder and level shifting circuit and produces, when the output of Two-stage control signal is 0, the PMOS conducting of its correspondence, when Two-stage control signal exports as RSW, the PMOS of its correspondence turns off.In the present embodiment, the output MSB<1:4> of one-level control signal has one to export VH at every turn, meanwhile, the output LSB<1:5> of Two-stage control signal has one to export RSW at every turn.
Preferably, the magnitude of voltage of constant reference voltage VREF is 1V.Example, export 0 when MSB<1> exports VH, MSB<2:4>, only have Q1 conducting in NMOS tube, the one-level control signal gating fundamental voltage of 22 ~ 26V; Export RSW when LSB<2> exports 0, MSB<2:4>, only have U2 conducting in PMOS, Two-stage control signal coordinates with one-level control signal selects charge pump output voltage to be 25V.Now, one-level dividing potential drop branch road terminal voltage value is 5V, does not exceed PMOS withstand voltage 7V.Divide pressure-controlled by two-stage, can coordinate between selection 11 ~ 26V, step-length is the output voltage of a magnitude of voltage as charge pump of 1V.
The technical scheme of the present embodiment, divides pressure-controlled by two-stage, solves in voltage control circuit the problem that the cost that uses high pressure resistant PMOS to cause is higher, reaches the effect reduced costs.
Embodiment two
The structural representation of a kind of voltage gear control circuit that Fig. 3 provides for the present embodiment, on the basis of technique scheme, a kind of voltage gear control circuit that the present embodiment provides, comprise not gate, the output of comparator is connected with the Enable Pin of charge pump by not gate, accordingly, the output of voltage divider system is connected with the in-phase input end of comparator, and the inverting input of comparator connects constant reference voltage.
As shown in Figure 3, the output of comparator is connected with the Enable Pin of charge pump by not gate, and when can avoid circuit working, the interference of other signals of telecommunication, makes system works more stable.
Embodiment three
The circuit diagram of voltage divider system in a kind of voltage gear control circuit that Fig. 4 provides for the present embodiment, on the basis of above-described embodiment, voltage gear control circuit, also comprises: front end impedance component, between the head end being connected to electric charge delivery side of pump and one-level dividing potential drop branch road.Be connected into front end impedance component voltage gear control circuit to be compared be not connected into front end impedor voltage gear control circuit to export wider voltage range.Accordingly, the output MSB<1:4> of one-level control signal has one export VH or export 0 at every turn, and the output LSB<1:5> of Two-stage control signal has one to export RSW at every turn.
Preferably, front end impedance component is front end resistance R11, example, front end resistance R11 resistance is 50K ohm, constant reference voltage VREF is 1V, the output MSB<1:4> of one-level control signal exports 0, NMOS tube all turns off, the output LSB<1> of Two-stage control signal exports 0, LSB<2:5> exports RWS, U1 conducting is only had in PMOS, one-level point pressure-controlled coordinates with an one-level point pressure-controlled selects charge pump output voltage to be 31V.
By being connected into front end impedance component, adding the output combination of one-level control signal, making the output area of voltage gear control circuit wider.
Note, above are only preferred embodiment of the present utility model and institute's application technology principle.Skilled person in the art will appreciate that the utility model is not limited to specific embodiment described here, various obvious change can be carried out for a person skilled in the art, readjust and substitute and protection range of the present utility model can not be departed from.Therefore, although be described in further detail the utility model by above embodiment, but the utility model is not limited only to above embodiment, when not departing from the utility model design, can also comprise other Equivalent embodiments more, and scope of the present utility model is determined by appended right.
Claims (9)
1. a voltage gear control circuit, comprising: charge pump, voltage divider system, comparator and power supply, is characterized in that:
Described voltage divider system comprises:
To be connected the one-level dividing potential drop branch road formed by least one one-level dividing potential drop impedance component, the impedor head end of each one-level dividing potential drop is as an one-level dividing point, and the head end of described one-level dividing potential drop branch road is as the input of described voltage divider system;
At least one N NMOS N-channel MOS N type field effect transistor NMOS, the drain electrode of described NMOS tube is connected with described electric charge delivery side of pump, the grid of described NMOS tube is connected with one-level control signal output, and the source electrode of each described NMOS tube is connected with each described one-level dividing point one_to_one corresponding;
To be connected the secondary dividing potential drop branch road formed by least one secondary dividing potential drop impedance component, the impedor head end of each secondary dividing potential drop is as a secondary dividing point;
At least one P-channel metal-oxide-semiconductor type field effect transistor PMOS, the drain electrode of each described PMOS is connected with each described secondary dividing point one_to_one corresponding, the grid of described PMOS is connected with Two-stage control signal output part, and the source electrode of each described PMOS is connected with the end of described one-level dividing potential drop branch road respectively;
Impedance ground element, the end of described secondary dividing potential drop branch road by described impedance ground element ground, and as the output of described voltage divider system;
Described charge pump, be connected respectively with the input of described power supply with described voltage divider system, the output of described voltage divider system is connected with the inverting input of described comparator, and the in-phase input end of described comparator connects constant reference voltage, and output connects the Enable Pin of described charge pump.
2. voltage gear control circuit according to claim 1, is characterized in that, also comprise:
Not gate, the output of described comparator is connected by the Enable Pin of described not gate with described charge pump, and accordingly, the output of described voltage divider system is connected with the in-phase input end of described comparator, and the inverting input of described comparator connects constant reference voltage.
3. voltage gear control circuit according to claim 1 and 2, is characterized in that:
The impedor impedance value of single described one-level dividing potential drop is more than or equal to the impedor impedance value sum of all secondary dividing potential drops;
Impedance ground element is equal with the impedor impedance value of single secondary dividing potential drop.
4. voltage gear control circuit according to claim 3, is characterized in that:
Described NMOS tube is depletion type NMOS tube, withstand voltage more than 30V;
Described PMOS is depletion type PMOS, withstand voltage more than 7V.
5. voltage gear control circuit according to claim 1 and 2, is characterized in that, also comprise:
Front end impedance component, between the head end being connected to described electric charge delivery side of pump and described one-level dividing potential drop branch road.
6. the voltage gear control circuit according to any one of claim 1,2,4, is characterized in that, described one-level dividing potential drop impedance component, secondary dividing potential drop impedance component, impedance ground element comprise following at least one:
Resistance, diode, MOS type field effect transistor.
7. voltage gear control circuit according to claim 6, is characterized in that:
The resistance of one-level divider resistance is 50K ohm;
The resistance of secondary divider resistance is 10K ohm;
The resistance of earth resistance is 10K ohm.
8. voltage gear control circuit according to claim 6, is characterized in that:
Described one-level dividing potential drop impedance component is identical with the impedor type in described front end;
Described secondary dividing potential drop impedance component is identical with the type of described impedance ground element.
9. the voltage gear control circuit according to any one of claim 1,2,4,7,8, is characterized in that:
The magnitude of voltage of described constant reference voltage is 1V.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520688870.2U CN204906181U (en) | 2015-09-07 | 2015-09-07 | Voltage gear control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520688870.2U CN204906181U (en) | 2015-09-07 | 2015-09-07 | Voltage gear control circuit |
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| Publication Number | Publication Date |
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| CN204906181U true CN204906181U (en) | 2015-12-23 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201520688870.2U Withdrawn - After Issue CN204906181U (en) | 2015-09-07 | 2015-09-07 | Voltage gear control circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106505851A (en) * | 2015-09-07 | 2017-03-15 | 北京兆易创新科技股份有限公司 | A kind of voltage gear control circuit |
-
2015
- 2015-09-07 CN CN201520688870.2U patent/CN204906181U/en not_active Withdrawn - After Issue
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106505851A (en) * | 2015-09-07 | 2017-03-15 | 北京兆易创新科技股份有限公司 | A kind of voltage gear control circuit |
| CN106505851B (en) * | 2015-09-07 | 2019-03-22 | 北京兆易创新科技股份有限公司 | A kind of voltage gear control circuit |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20151223 Effective date of abandoning: 20190322 |