CN204721219U - A kind of dc-dc chip - Google Patents
A kind of dc-dc chip Download PDFInfo
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- CN204721219U CN204721219U CN201520211353.6U CN201520211353U CN204721219U CN 204721219 U CN204721219 U CN 204721219U CN 201520211353 U CN201520211353 U CN 201520211353U CN 204721219 U CN204721219 U CN 204721219U
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- power tube
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Abstract
The utility model discloses a kind of dc-dc chip.A kind of dc-dc chip comprises enable control circuit, band-gap reference circuit, pierce circuit, error amplifier, PWM comparator, control logic, Power MOSFET, slope equalizer, current sample amplifier circuit, burst mode control circuit and overvoltage and detects.A kind of dc-dc chip utilizing the utility model to provide can stable DC output voltage, and efficiency is up to more than 92%.
Description
Technical field
The utility model relates to integrated circuit technique, refers more particularly to a kind of dc-dc chip.
Background technology
In order to obtain stable VD, devise dc-dc chip.
Summary of the invention
The utility model aims to provide a kind of dc-dc chip.
A kind of dc-dc chip, comprises enable control circuit, band-gap reference circuit, pierce circuit, error amplifier, PWM comparator, control logic, Power MOSFET, slope equalizer, current sample amplifier circuit, burst mode control circuit and overvoltage and detects:
The input termination Enable Pin EN of described enable control circuit, output controls described control logic; When Enable Pin EN connects high level, circuit normally works; When EN ground connection, circuit is in closed condition, and circuit does not work;
Described band-gap reference circuit is used for producing the bandgap voltage reference of chip internal; There is provided 0.85V, 0.8V, 0.3V reference voltage, as the reference voltage of other circuit, the accuracy of these voltages directly affects the voltage accuracy of DC-DC output;
Described pierce circuit provides internal clock frequencies 1.5MHz, and as internal synchronizing clock.Produce sawtooth waveforms simultaneously, be supplied to PWM comparator and provide ramp signal for slope compensation circuit; Frequency of oscillation can be regulated by feedback voltage V FB, carries out frequency shift; When VFB voltage lower than 0.3 time, frequency of oscillation drops to 1/7 of fixed frequency 1.5MHz, is 210KHz, to ensure that inductive current has time enough to decay, prevents wild effect from occurring; When VFB voltage rise is to more than 0.3V, frequency of oscillation will rise to 1.5MHz gradually;
The difference of output feedack voltage VFB and benchmark voltage 0.8V carries out amplifying and feeding back by described error amplifier, ensures precision of voltage regulation during stable state;
Described PWM comparator the voltage error signal that error amplifier exports is added with inductive current sampled signal and slope compensation signal the voltage obtained compare, export corresponding pulse-width signal, thus control the duty ratio of power tube, reach the object of regulation output voltage;
Described control logic realizes the logic control function of system, processes each module logic signal controlling power tube operating state, produces power tube and controls signal to driver module;
Described Power MOSFET is to prevent power tube and lock-in tube conducting simultaneously and damaged;
The function of described slope equalizer is that the current detection signal of ramp signal to current feedback loop utilizing oscillator module to produce compensates; The object of slope-compensation eliminates the shortcoming such as open-loop unstable, subharmonic vibration occurred when duty ratio is greater than 50% in current-mode DC-DC converter;
Described current sample amplifier circuit is indirectly sampled to power tube M1 by sampling pipe M2 and controls the conducting state of power tube M1;
Described burst mode control circuit is when load is lighter, in order to improve conversion efficiency; Circuit is when sleep state, and quiescent current is very little; And under light load conditions, circuit keeps the time in a sleep state relatively long, so just greatly reduce the power consumption of chip, improve conversion efficiency; Each accident is sustainable several cycle under underload, the degree light according to load, and the lasting cycle is different; Whether enter accident, be whether reach more than burst thresholding according to the output voltage of error amplifier, burst comparator is overturn;
It is to prevent output voltage from having excessive overshoot that described overvoltage detects; When the threshold value of output voltage higher than setting, when feedback voltage V FB is higher than 0.85V, overvoltage crowbar can rapid switch-off power pipe M1, prevents continuation from providing electric current to load.
When exporting with ground short circuit, now protecting feedback voltage V FB is zero, and oscillator frequency drops to 1/7 of nominal value immediately, is 210KHz.This frequency can ensure that inductive current has the more time to decay, thus anti-locking system instability out of control.
In normal operating conditions, oscillator triggered RS flip-flop, make power tube M1 in the equal conducting of each cycle, input power is by power tube M1 externally inductance output current, and meanwhile, sampling pipe and sampling resistor are sampled to inductive current, the inductance peak current threshold voltage of sampled voltage and current comparator compares, once reach this threshold voltage, output signal and rest-set flip-flop device is resetted, thus switch-off power pipe.The difference of output voltage feedback signal VFB and reference voltage 0.8V, amplifies through error amplifier the error voltage signal obtained and determines inductance peak current thresholding.When chip load increases, then feedback voltage V FB can be caused lower than reference voltage 0.8V, thus output voltage error amplifier and peak current threshold voltage are raised, until average inductor current is mated with new load current; Vice versa, if now underload, the output of error amplifier reaches the threshold voltage of burst module, will enter burst mode.When power tube turns off, afterflow is carried out in lock-in tube conducting, until enter next cycle, has Dead Time to produce to prevent wasting On current therebetween.
The change of power tube current will be reflected to the change of power tube control signal duty ratio by current comparator; And load variation amount will cause the change of feedback voltage V FB, the change of feedback voltage, by being caused the change of power tube peak current threshold level by error amplifier, will be reflected as the change of power tube control signal duty ratio eventually through current comparator.In a word, in this feedback control system, input voltage change, load variations and other any change all will be reflected to the change of power tube control signal duty ratio, thus the conducting of control power tube and deadline are to reach the object of voltage stabilizing.By emulation and flow, this chip most effective to more than 92%, has good load current step transient response.
Accompanying drawing explanation
Fig. 1 is the internal circuit diagram of a kind of dc-dc chip of the present utility model.
When Fig. 2 is the input voltage 2.7 ~ 5.5V utilizing dc-dc chip of the present utility model, output voltage is the application circuit of 3.3V.
Embodiment
Below in conjunction with accompanying drawing, the utility model content is further illustrated.
A kind of dc-dc chip, as shown in Figure 1, comprise enable control circuit, band-gap reference circuit, pierce circuit, error amplifier, PWM comparator, control logic, Power MOSFET, slope equalizer, current sample amplifier circuit, burst mode control circuit and overvoltage to detect:
The input termination Enable Pin EN of described enable control circuit, output controls described control logic; When Enable Pin EN connects high level, circuit normally works; When EN ground connection, circuit is in closed condition, and circuit does not work;
Described band-gap reference circuit is used for producing the bandgap voltage reference of chip internal; There is provided 0.85V, 0.8V, 0.3V reference voltage, as the reference voltage of other circuit, the accuracy of these voltages directly affects the voltage accuracy of DC-DC output;
Described pierce circuit provides internal clock frequencies 1.5MHz, and as internal synchronizing clock; Produce sawtooth waveforms simultaneously, be supplied to PWM comparator and provide ramp signal for slope compensation circuit; Frequency of oscillation can be regulated by feedback voltage V FB, carries out frequency shift; When VFB voltage lower than 0.3 time, frequency of oscillation drops to 1/7 of fixed frequency 1.5MHz, is 210KHz, to ensure that inductive current has time enough to decay, prevents wild effect from occurring; When VFB voltage rise is to more than 0.3V, frequency of oscillation will rise to 1.5MHz gradually;
The difference of output feedack voltage VFB and benchmark voltage 0.8V carries out amplifying and feeding back by described error amplifier, ensures precision of voltage regulation during stable state;
Described PWM comparator the voltage error signal that error amplifier exports is added with inductive current sampled signal and slope compensation signal the voltage obtained compare, export corresponding pulse-width signal, thus control the duty ratio of power tube, reach the object of regulation output voltage;
Described control logic realizes the logic control function of system, processes each module logic signal controlling power tube operating state, produces power tube and controls signal to driver module;
Described Power MOSFET is to prevent power tube and lock-in tube conducting simultaneously and damaged;
The function of described slope equalizer is that the current detection signal of ramp signal to current feedback loop utilizing oscillator module to produce compensates; The object of slope-compensation eliminates the shortcoming such as open-loop unstable, subharmonic vibration occurred when duty ratio is greater than 50% in current-mode DC-DC converter;
Described current sample amplifier circuit is indirectly sampled to power tube M1 by sampling pipe M2 and controls the conducting state of power tube M1;
Described burst mode control circuit is when load is lighter, in order to improve conversion efficiency; Circuit is when sleep state, and quiescent current is very little; And under light load conditions, circuit keeps the time in a sleep state relatively long, so just greatly reduce the power consumption of chip, improve conversion efficiency; Each accident is sustainable several cycle under underload, the degree light according to load, and the lasting cycle is different; Whether enter accident, be whether reach more than burst thresholding according to the output voltage of error amplifier, burst comparator is overturn;
It is to prevent output voltage from having excessive overshoot that described overvoltage detects; When the threshold value of output voltage higher than setting, when feedback voltage V FB is higher than 0.85V, overvoltage crowbar can rapid switch-off power pipe M1, prevents continuation from providing electric current to load.
When exporting with ground short circuit, now protecting feedback voltage V FB is zero, and oscillator frequency drops to 1/7 of nominal value immediately, is 210KHz.This frequency can ensure that inductive current has the more time to decay, thus anti-locking system instability out of control.
When being illustrated in figure 2 input voltage 2.7 ~ 5.5V, output voltage is the application circuit of 3.3V.
In normal operating conditions, oscillator triggered RS flip-flop, make power tube M1 in the equal conducting of each cycle, input power is by power tube M1 externally inductance output current, and meanwhile, sampling pipe and sampling resistor are sampled to inductive current, the inductance peak current threshold voltage of sampled voltage and current comparator compares, once reach this threshold voltage, output signal and rest-set flip-flop device is resetted, thus switch-off power pipe.The difference of output voltage feedback signal VFB and reference voltage 0.8V, amplifies through error amplifier the error voltage signal obtained and determines inductance peak current thresholding.When chip load increases, then feedback voltage V FB can be caused lower than reference voltage 0.8V, thus output voltage error amplifier and peak current threshold voltage are raised, until average inductor current is mated with new load current; Vice versa, if now underload, the output of error amplifier reaches the threshold voltage of burst module, will enter burst mode.When power tube turns off, afterflow is carried out in lock-in tube conducting, until enter next cycle, has Dead Time to produce to prevent wasting On current therebetween.
The change of power tube current will be reflected to the change of power tube control signal duty ratio by current comparator; And load variation amount will cause the change of feedback voltage V FB, the change of feedback voltage, by being caused the change of power tube peak current threshold level by error amplifier, will be reflected as the change of power tube control signal duty ratio eventually through current comparator.In a word, in this feedback control system, input voltage change, load variations and other any change all will be reflected to the change of power tube control signal duty ratio, thus the conducting of control power tube and deadline are to reach the object of voltage stabilizing.By emulation and flow, this chip most effective to more than 92%, has good load current step transient response.
Claims (1)
1. a dc-dc chip, it is characterized in that, comprise enable control circuit, band-gap reference circuit, pierce circuit, error amplifier, PWM comparator, control logic, Power MOSFET, slope equalizer, current sample amplifier circuit, burst mode control circuit and overvoltage and detect:
The input termination Enable Pin EN of described enable control circuit, output controls described control logic; When Enable Pin EN connects high level, circuit normally works; When EN ground connection, circuit is in closed condition, and circuit does not work;
Described band-gap reference circuit is used for producing the bandgap voltage reference of chip internal; There is provided 0.85V, 0.8V, 0.3V reference voltage, as the reference voltage of other circuit, the accuracy of these voltages directly affects the voltage accuracy of DC-DC output;
Described pierce circuit provides internal clock frequencies 1.5MHz, and as internal synchronizing clock; Produce sawtooth waveforms simultaneously, be supplied to PWM comparator and provide ramp signal for slope compensation circuit; Frequency of oscillation can be regulated by feedback voltage V FB, carries out frequency shift; When VFB voltage lower than 0.3 time, frequency of oscillation drops to 1/7 of fixed frequency 1.5MHz, is 210KHz, to ensure that inductive current has time enough to decay, prevents wild effect from occurring; When VFB voltage rise is to more than 0.3V, frequency of oscillation will rise to 1.5MHz gradually;
The difference of output feedack voltage VFB and benchmark voltage 0.8V carries out amplifying and feeding back by described error amplifier, ensures precision of voltage regulation during stable state;
Described PWM comparator the voltage error signal that error amplifier exports is added with inductive current sampled signal and slope compensation signal the voltage obtained compare, export corresponding pulse-width signal, thus control the duty ratio of power tube, reach the object of regulation output voltage;
Described control logic realizes the logic control function of system, processes each module logic signal controlling power tube operating state, produces power tube and controls signal to driver module;
Described Power MOSFET is to prevent power tube and lock-in tube conducting simultaneously and damaged;
The function of described slope equalizer is that the current detection signal of ramp signal to current feedback loop utilizing oscillator module to produce compensates; The object of slope-compensation eliminates the shortcoming such as open-loop unstable, subharmonic vibration occurred when duty ratio is greater than 50% in current-mode DC-DC converter;
Described current sample amplifier circuit is indirectly sampled to power tube M1 by sampling pipe M2 and controls the conducting state of power tube M1;
Described burst mode control circuit is when load is lighter, in order to improve conversion efficiency; Circuit is when sleep state, and quiescent current is very little; And under light load conditions, circuit keeps the time in a sleep state relatively long, so just greatly reduce the power consumption of chip, improve conversion efficiency; Each accident is sustainable several cycle under underload, the degree light according to load, and the lasting cycle is different; Whether enter accident, be whether reach more than burst thresholding according to the output voltage of error amplifier, burst comparator is overturn;
It is to prevent output voltage from having excessive overshoot that described overvoltage detects; When the threshold value of output voltage higher than setting, when feedback voltage V FB is higher than 0.85V, overvoltage crowbar can rapid switch-off power pipe M1, prevents continuation from providing electric current to load.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520211353.6U CN204721219U (en) | 2015-04-09 | 2015-04-09 | A kind of dc-dc chip |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520211353.6U CN204721219U (en) | 2015-04-09 | 2015-04-09 | A kind of dc-dc chip |
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| CN204721219U true CN204721219U (en) | 2015-10-21 |
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| CN201520211353.6U Expired - Fee Related CN204721219U (en) | 2015-04-09 | 2015-04-09 | A kind of dc-dc chip |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105553260A (en) * | 2016-01-26 | 2016-05-04 | 昆山龙腾光电有限公司 | Program control voltage adjustment circuit |
| CN107465357A (en) * | 2016-06-02 | 2017-12-12 | 快捷韩国半导体有限公司 | Control the output voltage for power converter |
| CN109494990A (en) * | 2019-01-03 | 2019-03-19 | 深圳市基准半导体有限公司 | A method of load transient response speed is improved using the variable Boost DC-DC of changeable frequency and mutual conductance |
| CN109932569A (en) * | 2019-03-29 | 2019-06-25 | 深圳市明微电子股份有限公司 | Signal dutyfactor detection circuit and signal dutyfactor detection method |
| CN111162677A (en) * | 2018-11-07 | 2020-05-15 | 罗姆股份有限公司 | Power supply control device and LLC resonant converter |
| CN112363561A (en) * | 2020-11-05 | 2021-02-12 | 上海艾为电子技术股份有限公司 | Linear voltage regulator and soft start method thereof |
| CN114995550A (en) * | 2022-07-14 | 2022-09-02 | 西安交通大学 | On-chip fully-integrated temperature regulation and control system framework |
-
2015
- 2015-04-09 CN CN201520211353.6U patent/CN204721219U/en not_active Expired - Fee Related
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105553260A (en) * | 2016-01-26 | 2016-05-04 | 昆山龙腾光电有限公司 | Program control voltage adjustment circuit |
| CN105553260B (en) * | 2016-01-26 | 2018-04-24 | 昆山龙腾光电有限公司 | A kind of program-controlled voltage adjustment circuit |
| CN107465357A (en) * | 2016-06-02 | 2017-12-12 | 快捷韩国半导体有限公司 | Control the output voltage for power converter |
| CN107465357B (en) * | 2016-06-02 | 2021-06-22 | 快捷韩国半导体有限公司 | Controlling output voltage for power converter |
| CN111162677A (en) * | 2018-11-07 | 2020-05-15 | 罗姆股份有限公司 | Power supply control device and LLC resonant converter |
| CN111162677B (en) * | 2018-11-07 | 2023-11-28 | 罗姆股份有限公司 | Power supply control device and LLC resonant converter |
| CN109494990A (en) * | 2019-01-03 | 2019-03-19 | 深圳市基准半导体有限公司 | A method of load transient response speed is improved using the variable Boost DC-DC of changeable frequency and mutual conductance |
| CN109932569A (en) * | 2019-03-29 | 2019-06-25 | 深圳市明微电子股份有限公司 | Signal dutyfactor detection circuit and signal dutyfactor detection method |
| CN109932569B (en) * | 2019-03-29 | 2023-09-22 | 深圳市明微电子股份有限公司 | Signal duty cycle detection circuit and signal duty cycle detection method |
| CN112363561A (en) * | 2020-11-05 | 2021-02-12 | 上海艾为电子技术股份有限公司 | Linear voltage regulator and soft start method thereof |
| CN112363561B (en) * | 2020-11-05 | 2022-11-15 | 上海艾为电子技术股份有限公司 | Linear voltage regulator and soft start method thereof |
| CN114995550A (en) * | 2022-07-14 | 2022-09-02 | 西安交通大学 | On-chip fully-integrated temperature regulation and control system framework |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20151021 Termination date: 20160409 |