CN204633918U - A kind of circuit module analog image being converted to binary digital image - Google Patents
A kind of circuit module analog image being converted to binary digital image Download PDFInfo
- Publication number
- CN204633918U CN204633918U CN201520312146.XU CN201520312146U CN204633918U CN 204633918 U CN204633918 U CN 204633918U CN 201520312146 U CN201520312146 U CN 201520312146U CN 204633918 U CN204633918 U CN 204633918U
- Authority
- CN
- China
- Prior art keywords
- pin
- analog
- module
- connects
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Image Processing (AREA)
Abstract
The utility model discloses a kind of circuit module analog image being converted to binary digital image, the gray proces of image is carried out by the effect of hardware circuit, this gray level image is the information of applicable computer disposal, the row field of original analogue video is synchronously separated by the synchronous groove of this novel identification video, adopts comparator to compare analog signal output simultaneously.Reconcile the comparative voltage of comparator by potentiometer, change output signal.Thus realize the digitlization of analog video signal.This is novel primarily of video signal input terminal, row field separation module, voltage comparison module, main controller module, storage element, and lead-out terminal is formed.This novel analog video signal that computer can be difficult to directly process converts the digital video signal that computer can directly process to, and also have switching rate fast, frame density is high, low in energy consumption, by the advantage of manual adjustments video gradation ratio.
Description
Technical field
The utility model relates to a kind of analog video hardware binarization circuit module, can convert analog video signal to digital video signal fast, is applied to Car license recognition, numeral identifies.
Background technology
Daily life often runs into the occasion needing computer disposal video, computer cannot direct treatment of simulated vision signal, the method of current conversion is all generally adopt analog-to-digital conversion, although such process greatly remains the information of original image, but the processing time is longer and process is complicated, the data volume of generation is also how thereupon also high to the capacity requirement of memory cell.And some digital image processing field do not need gray level image, only need a binary picture, the advantage comparing gray level image binary picture is that the data volume produced is little, and process is simple.
Summary of the invention
The technical problems to be solved in the utility model is to provide a kind of analog video hardware binarization circuit module, is separated by the row field signal of analog video signal, realizes the digitlization of analog video signal, and realize hardware adjustments contrast with video content signal.Image data amount after this resume module is little, and computer disposal is convenient, and picture noise is little, convenient storage, only just can Storage and Processing by one-dimension array.
For reaching above-mentioned purpose, a kind of circuit module analog image being converted to binary digital image of the utility model, comprise video access terminal, described video access terminal connected row field separation module and hardware binarization module respectively, described row field separation module is connected main control module respectively with described hardware binarization module, described main control module and memory module are connected, and described main control module also controls graphical information and exports.
Wherein said main control module comprises main control chip STM32F030F4P6, described row field separation module is row field signal separator LM1881, hardware binarization module comprises computing comparator AD8032, physical circuit connects: analog video inputs to the 3rd pin of AD8032, connect the base stage of Q7 through R71 simultaneously, emitter meets potentiometer R73, and inputs to the 2nd pin of IC; 1st pin is by R72 pull-up positive source, and the 1st pin is digital signal output pin, and C71 forms decoupling capacitance; Vision signal connects by C61 the 2nd pin that R62 meets LM1881; 2nd pin connects C62 and connects in analog, and also in analog, the 8th pin connects positive source to the 4th pin of IC, and the 6th pin meets R63 and upper C63 connects in analog, the defeated outbound signal of the 1st pin of IC, the 7th pin output field signal, connects in analog and digitally with L61 inductance; Video signal input terminal connects in analog through R61; Respectively, the 1st pin of AD8032 connects MCU the 9th pin, and the 2nd pin connects MCU the 8th pin, and the 1st and 8 pin of LM1881 connect the 10th pin and 11 pin of MCU respectively in the signal access of MCU; The connection of minimum system is: in crystal oscillator module, two pins of Y1 have met two electric capacity C5, C6 respectively, then are connected with microprocessor, another pole ground connection of electric capacity, and reference voltage is made up of the I/O port of one end ground connection one termination microprocessor of R24.BOOT pin one termination R21, a termination R22 directly connects positive source, and shunt capacitance is C7, C4 respectively.
The operation principle of system receives incoming video signal by analog video receiving terminal, then shunt to analog video capable field separation module, synchronously analog video signal is flowed to comparison circuit, carry out synchronous compare, allow vision signal and we regulate setting voltage contrast, then transferred out by amplifier, final realization converts analog signal to digital signal, then main control chip utilizes I/O port to read the digital signal of amplifier output, utilize the middle fracture of main control chip to gather the row signal of analog signal simultaneously, field signal, after Master control chip processing process, send PC to by USB interface again process.
The utility model circuit module difference from prior art is that the utility model achieves following technique effect:
(1) the utility model adopts based on 32 low-power chip-STM32F030F4P6 of Cortex-M0 kernel is main control chip, meeting while system real time requirement requires MCU processing speed, has fully taken into account the requirement of power consumption and cost;
(2) the utility model pcb board structure is simple, and circuit is distinct, compact, directly can be inserted on PC and complete work for the treatment of;
(3) the utility model adopts LM1881 as the row field signal separator of analog video signal, and this chip has the advantages such as volume is little, precision is high, antijamming capability is strong;
(4) the utility model adopts USB interface as the interface to PC conveying signal, decreases the distance between transmitting terminal and PC, decreases the interference of EMC and EMI to signal, also have the advantage of compact, easy to operate saving installing space simultaneously with this interface;
(5) the utility model adopts AD8032 as computing comparator, this amplifier is a single-power voltage feedback-type amplifier, there is high speed characteristics, small signal bandwidth is 80 MHz, slew rate is 30 V/ μ s, settling time is 125 ns, and realizing above characteristic only needs to adopt+5 V single power supplies, and power consumption is less than 4.0 mW.This low power consumption characteristic can in the situation of not sacrificing dynamic property operating time of downward grow tall speed, battery power supply system;
(6) power supply that the utility model adopts is held from PC, gives modules by USB interface power distribution.Because computer power is relative to ripple, less and power is comparatively large, decreases this novel production and design cost.
Below in conjunction with accompanying drawing, the utility model is described in further detail.
Accompanying drawing explanation
Fig. 1 is the utility model main control chip and peripheral circuit, row field split circuit, comparison circuit;
Fig. 2 is the utility model building-block of logic.
Embodiment
Under in conjunction with the accompanying drawings and embodiments, to above-mentioned being described in more detail with other technical characteristic and advantage of the utility model.
Shown in Fig. 1, all peripheral hardwares of the present utility model all connect with main control chip.In crystal oscillator module, two pins of Y1 have met two electric capacity C5, C6 respectively, then are connected with microprocessor, another pole ground connection of electric capacity, and reference voltage is made up of the I/O port of one end ground connection one termination microprocessor of R24.BOOT pin one termination R21, a termination R22 directly connects positive source, and shunt capacitance is C7, C4 respectively.
Be row field separation module shown in Fig. 1, its implementation utilizes LM1881 as separation core, and vision signal connects by C61 the 2nd pin that R62 meets LM1881.2nd pin connects C62 and connects in analog, and also in analog, the 8th pin connects positive source to the 4th pin of IC, and the 6th pin meets R63 and upper C63 connects in analog, the defeated outbound signal of the 1st pin of IC, the 7th pin output field signal, connects in analog and digitally with L61 inductance.Video signal input terminal connects in analog through R61.
Figure 1 shows that comparison circuit module, analog video inputs to the 3rd pin of AD8032, and connect the base stage of Q7 through R71, emitter meets potentiometer R73, and inputs to the 2nd pin of IC simultaneously.1st pin is by R72 pull-up positive source, and the 1st pin is digital signal output pin, and C71 forms decoupling capacitance.
It is structured flowchart shown in 2, each several part is: data flow is by video input terminal, and point two-way, a road is to row field separation module, one tunnel is to comparison circuit, the function of row field separation module is the row signal and the field signal that extract video, and flow to main control chip, the effect of another road analog video signal flows to comparison circuit, the relatively gray value of analog video, regulate ratio-voltage by potentiometer, change gray scales, realizes digitlization.Flow to main control chip process, then after main control chip processing, turn USB through serial ports and send to PC end to carry out processing again.
Upper described embodiment is only be described preferred implementation of the present utility model; not scope of the present utility model is limited; under the prerequisite not departing from the utility model design spirit; the various distortion that those of ordinary skill in the art make the technical solution of the utility model and improvement, all should fall in protection range that the utility model claims determine.
Claims (2)
1. analog image is converted to the circuit module of binary digital image by one kind, it is characterized in that: comprise video access terminal, described video access terminal connected row field separation module and hardware binarization module respectively, described row field separation module is connected main control module respectively with described hardware binarization module, described main control module and memory module are connected, and described main control module also controls graphical information and exports.
2. a kind of circuit module analog image being converted to binary digital image according to claim 1, it is characterized in that: described main control module comprises main control chip STM32F030F4P6, described row field separation module is row field signal separator LM1881, hardware binarization module comprises computing comparator AD8032, physical circuit connects: analog video inputs to the 3rd pin of AD8032, connect the base stage of Q7 through R71, emitter meets potentiometer R73, and inputs to the 2nd pin of IC simultaneously; 1st pin is by R72 pull-up positive source, and the 1st pin is digital signal output pin, and C71 forms decoupling capacitance; Vision signal connects by C61 the 2nd pin that R62 meets LM1881; 2nd pin connects C62 and connects in analog, and also in analog, the 8th pin connects positive source to the 4th pin of IC, and the 6th pin meets R63 and upper C63 connects in analog, the defeated outbound signal of the 1st pin of IC, the 7th pin output field signal, connects in analog and digitally with L61 inductance; Video signal input terminal connects in analog through R61; Respectively, the 1st pin of AD8032 connects MCU the 9th pin, and the 2nd pin connects MCU the 8th pin, and the 1st and 8 pin of LM1881 connect the 10th pin and 11 pin of MCU respectively in the signal access of MCU; The connection of minimum system is: in crystal oscillator module, two pins of Y1 have met two electric capacity C5, C6 respectively, be connected with microprocessor again, another pole ground connection of electric capacity, reference voltage is made up of the I/O port of one end ground connection one termination microprocessor of R24, BOOT pin one termination R21, one termination R22 directly connects positive source, and shunt capacitance is C7, C4 respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520312146.XU CN204633918U (en) | 2015-05-15 | 2015-05-15 | A kind of circuit module analog image being converted to binary digital image |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520312146.XU CN204633918U (en) | 2015-05-15 | 2015-05-15 | A kind of circuit module analog image being converted to binary digital image |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204633918U true CN204633918U (en) | 2015-09-09 |
Family
ID=54052896
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520312146.XU Expired - Fee Related CN204633918U (en) | 2015-05-15 | 2015-05-15 | A kind of circuit module analog image being converted to binary digital image |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204633918U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109460205A (en) * | 2018-11-06 | 2019-03-12 | 沈阳天眼智云信息科技有限公司 | The generation and display methods and system of data and curves |
-
2015
- 2015-05-15 CN CN201520312146.XU patent/CN204633918U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109460205A (en) * | 2018-11-06 | 2019-03-12 | 沈阳天眼智云信息科技有限公司 | The generation and display methods and system of data and curves |
| CN109460205B (en) * | 2018-11-06 | 2021-09-10 | 沈阳天眼智云信息科技有限公司 | Data curve generation and display method and system |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103618860B (en) | A kind of analog-digital converter for imageing sensor | |
| CN204633918U (en) | A kind of circuit module analog image being converted to binary digital image | |
| CN106535412A (en) | Digital-analogue dimming circuit with shared port | |
| CN106603077B (en) | A kind of Approach by inchmeal fully differential analog-digital converter and its workflow | |
| CN105118441A (en) | LED display screen control card for asynchronous control system | |
| CN102832947B (en) | For 20 galvanometer digital-to-analogue conversion plate of laser marking machine | |
| CN201298810Y (en) | Electrification sequence control circuit of chip voltages | |
| CN101409550A (en) | Control circuit and method for output voltage turning rate | |
| CN201837915U (en) | Embedded card module processor based on PC (personal computer)/104 bus | |
| CN203872057U (en) | DC power convertor board | |
| CN204390466U (en) | Operational order collection plate | |
| CN203117265U (en) | Novel voltage detection circuit | |
| CN209488466U (en) | A kind of power supply circuit for intelligent gateway | |
| CN209326625U (en) | A kind of communication of insulator chain obliquity sensor and power supply device | |
| CN204331383U (en) | A kind of IT intelligent control system | |
| CN220455736U (en) | Automatic voltage regulation executing terminal | |
| CN205123854U (en) | Multichannel audio video collecting mechanism | |
| CN201251513Y (en) | Multi-channel signal generator insert | |
| CN205608145U (en) | Charactron data acquisition instrument and collection system | |
| CN203799372U (en) | Configurable analog quantity output bus drive control module | |
| CN104661362A (en) | Dedicated chip for lighting control | |
| CN203055149U (en) | Multi-parameter data acquisition unit | |
| CN109951066B (en) | Series power supply circuit, method and computing equipment | |
| CN102946193B (en) | Method for increasing comparison speed of comparator circuit and comparator circuit | |
| CN203243433U (en) | Data conversion device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150909 Termination date: 20180515 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |