CN204517766U - A kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit - Google Patents
A kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit Download PDFInfo
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- CN204517766U CN204517766U CN201520199044.1U CN201520199044U CN204517766U CN 204517766 U CN204517766 U CN 204517766U CN 201520199044 U CN201520199044 U CN 201520199044U CN 204517766 U CN204517766 U CN 204517766U
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Abstract
The utility model discloses a kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit, described feedback loop comprises common-mode signal sample circuit, reference voltage source, first order differential comparison amplifying circuit and second level amplification driving circuit, two inputs of common-mode signal sample circuit are connected respectively with two outputs of resistive source load differential mode amplification circuit, the output that is averaged of this sample circuit is connected with the input of first order differential comparison amplifying circuit, reference voltage source is connected with another input of first order differential comparison amplifying circuit, the Single-end output of first order differential comparison amplifying circuit is connected with the input of second level amplification driving circuit.The utility model can maximize the gain of common mode feedback loop and guarantee its stability under the condition not increasing current drain, thus maximize and stablize output common mode DC working point, effectively increase the dynamic range of output difference sub-signal and suppression power supply, common mode clutter noise on holding wire.
Description
Technical field
The utility model relates to a kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit.
Background technology
Various with in the high-impedance differential output amplifier of current source load, common mode feedback loop has become an auxiliary circuit that must put, effectively increase the dynamic range of output difference sub-signal for locking output common mode DC point and suppress common mode clutter noise on power supply/ground/holding wire, and the effect producing these effects depends primarily on the gain of common mode feedback loop, gain is larger, and effect is better.The common mode feedback loop that the various high-impedance differential amplifying circuit with current source load adopts at present is the stability guaranteeing common mode feedback loop, common-mode feedback electricity loop often adopts the single-stage amplifying circuit only with a single dominant pole, because the loop gain that exists of multiple the limits in higher-frequency place often obtains lower in case self-oscillation, this weakens the effect of common mode feedback loop.
The locking realizing current source load high-impedance differential amplifying circuit output common mode signal mainly contains three kinds of common mode feedback loops, and one is the switched-capacitor CMFB loop being applicable to discrete-time circuits; Two is the differential difference common mode feedback loops being applicable to circuit continuous time; Three is that the resistance being also applicable to circuit continuous time is averaged common mode feedback loop.
Continuous time circuit differential difference common mode feedback loop and resistance be averaged common mode feedback loop and respectively possess some good points and weakness, " IEEE Circuits and Systems journal II: analog and digital signal process " (IEEE TRANSACTION ON CIRCUITS AND SYSTEMS-II:ANALOG AND DIGITAL SIGNAL PROCESSING of the 47 volume fourth phase in 2000, VOL. 47, NO. 4, APRIL 2000) in " being applied to the continuous time common-mode feedback of high impedance current pattern " (A Continuous-Time Common-Mode Feedback Circuit (CMFB) for High-Impedance Current Mode Application) of delivering solve the problem of differential difference common mode feedback loop high-gain and loop stability contradiction well, the utility model is then attempted to solve the problem that resistance is averaged common mode feedback loop high-gain and loop stability contradiction, be illustrated in figure 1 with current source is that the high-impedance differential amplifying circuit of load and current general single-stage amplify low gain common mode feedback loop module map, this single-stage amplifies low gain common mode feedback loop only a low frequency dominant pole, all the other limits are all at extremely high frequency place, stability is generally fine.
Utility model content
The purpose of this utility model is to overcome the deficiencies in the prior art, a kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit is provided, the utility model can maximize the gain of common mode feedback loop and guarantee its stability under the condition not increasing current drain, thus maximize and stablize output common mode DC working point, effectively increase output difference sub-signal dynamic range and effectively suppress power supply, common mode clutter noise on holding wire.
The purpose of this utility model is achieved through the following technical solutions: a kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit, it comprises two-stage plus and blowup circuit and one-level RC filter circuit, it comprises common-mode signal sample circuit, reference voltage source, first order differential comparison amplifying circuit and second level amplification driving circuit, two inputs of common-mode signal sample circuit are connected with the output of high impedance current source load differential mode amplification circuit, the output that is averaged of this sample circuit is connected with the input of first order differential comparison amplifying circuit, reference voltage source is connected with another input of first order differential comparison amplifying circuit, the Single-end output of first order differential comparison amplifying circuit is connected with the input of second level amplification driving circuit, the amplifier tube of second level amplification driving circuit is the high impedance current source load of differential amplifier circuit, the differential load of second level amplification driving circuit is the amplification of high impedance current source load differential mode amplification circuit to pipe.
Described sample circuit is resistance average sample circuit, it is made up of the first resistance R1 and the second resistance R2, resistance R1 is connected with the difference output end of differential amplifier circuit respectively with one end of resistance R2, and the other end of resistance R1 and resistance R2 is connected and exports sampled signal.
Described first order differential comparison amplifying circuit is primarily of the 5th metal-oxide-semiconductor M5, 6th metal-oxide-semiconductor M6, 7th metal-oxide-semiconductor M7, 8th metal-oxide-semiconductor M8, 9th metal-oxide-semiconductor M9 and the tenth metal-oxide-semiconductor M10 forms, 5th metal-oxide-semiconductor M5, 6th metal-oxide-semiconductor M6 is that the differential amplification of first order differential comparison amplifying circuit is to pipe, the output of sample circuit is connected with the grid of the 6th metal-oxide-semiconductor M6, output and the source electrode of the 5th metal-oxide-semiconductor M5 are connected with the input of second level amplification driving circuit, the grid of the 5th metal-oxide-semiconductor M5 is connected with reference voltage, 7th metal-oxide-semiconductor M7, 8th metal-oxide-semiconductor M8 forms circuit mirror current, the grid of the 8th metal-oxide-semiconductor M8 is connected with reference current source with after drain interconnects, 7th metal-oxide-semiconductor M7 is the tail current source of differential amplifier circuit, 9th metal-oxide-semiconductor M9 and the tenth metal-oxide-semiconductor M10 is the mirror current source load of first order differential comparison amplifying circuit, differential signal is converted to single-ended signal.
Described second level amplification driving circuit is primarily of the 3rd metal-oxide-semiconductor M3, 4th metal-oxide-semiconductor M4, first resistance R1, second resistance R2, first load capacitance Cload1, second load capacitance Cload2, first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 forms, 3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4 is the current source load of differential amplifier circuit, 3rd metal-oxide-semiconductor M3 is connected with the output of first order differential comparison amplifying circuit respectively with the grid of the 4th metal-oxide-semiconductor M4, the source electrode of the 3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4 is connected to ground, 3rd metal-oxide-semiconductor M3 is connected with the drain electrode of differential amplification to pipe first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 of high impedance current source load differential mode amplification circuit respectively with the drain electrode of the 4th metal-oxide-semiconductor M4, first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 is the current source load of second level differential amplification to pipe, the output of high impedance current source load differential mode amplification circuit is also connected with one end of differential amplification capacitive load CLOAD1 and CLOAD2 respectively, the other end of CLOAD1 and CLOAD2 is connected to ground.
Also comprise Miller feedback capacity C0 between sample circuit and the 3rd metal-oxide-semiconductor, ensure that when little sampling resistor two-stage amplifies the stability of high-gain common mode feedback loop, then do not need Miller feedback capacity C0 when large sampling resistor.
Described common mode feedback loop is applicable to the high impedance current source load artifact fraction differential mode amplification circuit not with tail current source, is also applicable to the high impedance current source load differential formula differential mode amplification circuit being with tail current source.
The beneficial effects of the utility model are: the utility model provides a kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit, the utility model can maximize the gain of common mode feedback loop and guarantee its stability under the condition not increasing current drain, thus maximize and stablize output common mode DC working point, effectively increase output difference sub-signal dynamic range and effectively suppress power supply, common mode clutter noise on holding wire.
Accompanying drawing explanation
Fig. 1 is be that the high-impedance differential amplifying circuit of load and current general single-stage amplify low gain common mode feedback loop module map with current source;
Fig. 2 is be that under the high-impedance differential amplifying circuit of load and little sampling resistor condition of the present utility model, secondary amplifies high-gain common mode feedback loop with current source;
Fig. 3 is be that under the high-impedance differential amplifying circuit of load and little sampling resistor condition of the present utility model, secondary amplifies the equivalent electric circuit of high-gain common mode feedback loop to common-mode signal with current source;
Fig. 4 is be that under the high-impedance differential amplifying circuit of load and large sampling resistor condition of the present utility model, secondary amplifies high-gain common mode feedback loop with current source
Fig. 5 is be that under the high-impedance differential amplifying circuit of load and large sampling resistor condition of the present utility model, secondary amplifies the equivalent electric circuit of high-gain common mode feedback loop to common-mode signal with current source.
Embodiment
Below in conjunction with accompanying drawing, the technical solution of the utility model is described in further detail, but protection range of the present utility model is not limited to the following stated.
As shown in Figure 2, a kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit, it comprises two-stage plus and blowup circuit and one-level RC filter circuit, it comprises common-mode signal sample circuit, reference voltage source, first order differential comparison amplifying circuit and second level amplification driving circuit, two inputs of common-mode signal sample circuit are connected with the output of high impedance current source load differential mode amplification circuit, the output that is averaged of this sample circuit is connected with the input of first order differential comparison amplifying circuit, reference voltage source is connected with another input of first order differential comparison amplifying circuit, the Single-end output of first order differential comparison amplifying circuit is connected with the input of second level amplification driving circuit, the amplifier tube of second level amplification driving circuit is the high impedance current source load of differential amplifier circuit, the differential load of second level amplification driving circuit is the amplification of high impedance current source load differential mode amplification circuit to pipe.
Described sample circuit is resistance average sample circuit, it is made up of the first resistance R1 and the second resistance R2, resistance R1 is connected with the difference output end of differential amplifier circuit respectively with one end of resistance R2, and the other end of resistance R1 and resistance R2 is connected and exports sampled signal.
Described first order differential comparison amplifying circuit is primarily of the 5th metal-oxide-semiconductor M5, 6th metal-oxide-semiconductor M6, 7th metal-oxide-semiconductor M7, 8th metal-oxide-semiconductor M8, 9th metal-oxide-semiconductor M9 and the tenth metal-oxide-semiconductor M10 forms, 5th metal-oxide-semiconductor M5, 6th metal-oxide-semiconductor M6 is that the differential amplification of first order differential comparison amplifying circuit is to pipe, the output of sample circuit is connected with the grid of the 6th metal-oxide-semiconductor M6, output and the source electrode of the 5th metal-oxide-semiconductor M5 are connected with the input of second level amplification driving circuit, the grid of the 5th metal-oxide-semiconductor M5 is connected with reference voltage, 7th metal-oxide-semiconductor M7, 8th metal-oxide-semiconductor M8 forms circuit mirror current, the grid of the 8th metal-oxide-semiconductor M8 is connected with reference current source with after drain interconnects, 7th metal-oxide-semiconductor M7 is the tail current source of differential amplifier circuit, 9th metal-oxide-semiconductor M9 and the tenth metal-oxide-semiconductor M10 is the mirror current source load of first order differential comparison amplifying circuit, differential signal is converted to single-ended signal.
Described second level amplification driving circuit is primarily of the 3rd metal-oxide-semiconductor M3, 4th metal-oxide-semiconductor M4, first resistance R1, second resistance R2, first load capacitance Cload1, second load capacitance Cload2, first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 forms, 3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4 is the current source load of differential amplifier circuit, 3rd metal-oxide-semiconductor M3 is connected with the output of first order differential comparison amplifying circuit respectively with the grid of the 4th metal-oxide-semiconductor M4, the source electrode of the 3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4 is connected to ground, 3rd metal-oxide-semiconductor M3 is connected with the drain electrode of differential amplification to pipe first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 of high impedance current source load differential mode amplification circuit respectively with the drain electrode of the 4th metal-oxide-semiconductor M4, first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 is the current source load of second level differential amplification to pipe, the output of high impedance current source load differential mode amplification circuit is also connected with one end of differential amplification capacitive load CLOAD1 and CLOAD2 respectively, the other end of CLOAD1 and CLOAD2 is connected to ground.Also comprise Miller feedback capacity C0 between sample circuit and the 3rd metal-oxide-semiconductor, ensure that when little sampling resistor two-stage amplifies the stability of high-gain common mode feedback loop, then do not need Miller feedback capacity C0 when large sampling resistor.
As shown in Figure 3 be that under the high impedance differential mode amplification circuit of load and little sampling resistor condition of the present utility model, secondary amplifies the equivalent electric circuit of high-gain common mode feedback loop to common-mode signal with current source, this equivalent electric circuit has three important limits, 1. limit drains at the tenth metal-oxide-semiconductor M10,2. limit drains at the 3rd metal-oxide-semiconductor M3, limit is 3. at the grid of the 6th metal-oxide-semiconductor M6, when not having a building-out capacitor C0,1. 2. two limits are respectively the first order and second level amplifying circuit two and export high resistant limits, 3. limit is output limit (R1+R2)/(R1*R2*Cgs6) of the single order RC filter circuit that sample resistance R1//R2 and M6 grid capacitance Cgs6 is formed, here the signal 3. located of limit is supposed mainly from limit 2., this limit is that in the utility model patent, circuit diagram 3 is compared the peculiar limit that general secondary plus and blowup circuit has more, if any differential output impedance designing requirement, the selection of sample resistance R1 and R2 should make R1+R2 equal the design differential output impedance of single-stage high-impedance differential amplifying circuit.These three limits are usually close to each other, are difficult to produce enough phase margins, directly can affect the stability of loop, and when not having building-out capacitor C0, under high-gain condition, this loop usually very easily meets oscillating condition thus free oscillation occurs.After using Miller feedback capacity C0,1. limit is pulled to more low frequency or become dominant pole near zero-frequency place, the gain-frequency characterisitic of the secondary high-gain common mode feedback loop that it is leading as shown in Figure 3 and unity gain bandwidth or gain bandwidth product GBW.2. limit is then pulled to and becomes non-dominant pole away from limit higher frequency place 1., and the selection of C0 value and the design of this common mode feedback loop should make limit to be 2. on complex frequency plane negative frequency axle about 3xGBW or farther place to guarantee that this high-gain common mode feedback loop has enough phase margins; The design alternative of the selection of resistance R1 and R2 and the M6 grid capacitance of this common mode feedback loop should make to make non-dominant pole 3. be in about 3xGBW or farther place on complex frequency plane negative frequency axle or Left half-plane, should be the smaller the better from the selection of stability sample resistance R1 and R2, to guarantee that this high-gain common mode feedback loop has enough phase margins; Electric capacity C0 is with the mutual conductance Gm3+Gm4 of second level amplifier tube M3//M4, feedback resistance (R1*R2)/(R1+R2) can form again one 0. 1/ (C0*(1/ (Gm+Gm4)-(R1*R2)/(R1+R2)) simultaneously), about how to remove zero point negative effect and in addition front utilize in a lot of scientific and technical literature and teaching material, had description, this patent does not discuss in detail here.
As shown in Figure 4, when the selection of sample resistance R1 and R2 size unrestrictedly can obtain enough large, remove Miller feedback capacity C0, the secondary shown in Fig. 2 amplifies high-gain common mode feedback loop also can keep stable.This secondary amplifies high-gain common mode feedback loop to the equivalent electric circuit of common-mode signal then as shown in Figure 5.Now there are three limits equally, 1. limit drains at the tenth metal-oxide-semiconductor M10, limit 2. the 3rd metal-oxide-semiconductor M3 drains, limit is 3. at the grid place of the 6th metal-oxide-semiconductor M6, but 3. limit becomes dominant pole, the gain-frequency characterisitic of the secondary high-gain common mode feedback loop that it is leading as shown in Figure 5 and unity gain bandwidth or gain bandwidth product GBW, 1. and 2. limit is non-dominant pole, about 3xGBW or farther place can be placed on complex frequency plane negative frequency axle to guarantee that this high-gain common mode feedback loop has enough phase margins by sampling resistor R1's and R2 and this common mode feedback loop design alternative.
High-gain common mode feedback loop of the present utility model is not only applicable to the high impedance current source load artifact fraction differential mode amplification circuit not with tail current source as shown in Figure of description, is applicable to the high impedance current source load differential formula differential mode amplification circuit being with tail current source yet.
Claims (6)
1. one kind is applied to the high-gain common mode feedback loop of high impedance current source load differential mode amplification circuit, it comprises two-stage plus and blowup circuit and one-level RC filter circuit, it is characterized in that: it comprises common-mode signal sample circuit, reference voltage source, first order differential comparison amplifying circuit and second level amplification driving circuit, two inputs of common-mode signal sample circuit are connected with the output of high impedance current source load differential mode amplification circuit, the output that is averaged of this sample circuit is connected with the input of first order differential comparison amplifying circuit, reference voltage source is connected with another input of first order differential comparison amplifying circuit, the Single-end output of first order differential comparison amplifying circuit is connected with the input of second level amplification driving circuit, the amplifier tube of second level amplification driving circuit is the high impedance current source load of differential amplifier circuit, the differential load of second level amplification driving circuit is the amplification of high impedance current source load differential mode amplification circuit to pipe.
2. a kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit according to claim 1, it is characterized in that: described sample circuit is resistance average sample circuit, it is made up of the first resistance R1 and the second resistance R2, resistance R1 is connected with the difference output end of differential amplifier circuit respectively with one end of resistance R2, and the other end of resistance R1 and resistance R2 is connected and exports sampled signal.
3. a kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit according to claim 1, it is characterized in that: described first order differential comparison amplifying circuit is primarily of the 5th metal-oxide-semiconductor M5, 6th metal-oxide-semiconductor M6, 7th metal-oxide-semiconductor M7, 8th metal-oxide-semiconductor M8, 9th metal-oxide-semiconductor M9 and the tenth metal-oxide-semiconductor M10 forms, 5th metal-oxide-semiconductor M5, 6th metal-oxide-semiconductor M6 is that the differential amplification of first order differential comparison amplifying circuit is to pipe, the output of sample circuit is connected with the grid of the 6th metal-oxide-semiconductor M6, output and the source electrode of the 5th metal-oxide-semiconductor M5 are connected with the input of second level amplification driving circuit, the grid of the 5th metal-oxide-semiconductor M5 is connected with reference voltage, 7th metal-oxide-semiconductor M7, 8th metal-oxide-semiconductor M8 forms circuit mirror current, the grid of the 8th metal-oxide-semiconductor M8 is connected with reference current source with after drain interconnects, 7th metal-oxide-semiconductor M7 is the tail current source of differential amplifier circuit, 9th metal-oxide-semiconductor M9 and the tenth metal-oxide-semiconductor M10 is the mirror current source load of first order differential comparison amplifying circuit, differential signal is converted to single-ended signal.
4. a kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit according to claim 1, it is characterized in that: described second level amplification driving circuit is primarily of the 3rd metal-oxide-semiconductor M3, 4th metal-oxide-semiconductor M4, first resistance R1, second resistance R2, first load capacitance Cload1, second load capacitance Cload2, first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 forms, 3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4 is the current source load of differential amplifier circuit, 3rd metal-oxide-semiconductor M3 is connected with the output of first order differential comparison amplifying circuit respectively with the grid of the 4th metal-oxide-semiconductor M4, the source electrode of the 3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4 is connected to ground, 3rd metal-oxide-semiconductor M3 is connected with the drain electrode of differential amplification to pipe first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 of high impedance current source load differential mode amplification circuit respectively with the drain electrode of the 4th metal-oxide-semiconductor M4, first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 is the current source load of second level differential amplification to pipe, the output of high impedance current source load differential mode amplification circuit is also connected with one end of differential amplification capacitive load CLOAD1 and CLOAD2 respectively, the other end of CLOAD1 and CLOAD2 is connected to ground.
5. a kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit according to claim 4, it is characterized in that: between sample circuit and the 3rd metal-oxide-semiconductor, also comprise Miller feedback capacity C0, ensure that when little sampling resistor two-stage amplifies the stability of high-gain common mode feedback loop, does not then need Miller feedback capacity C0 when large sampling resistor.
6. a kind of high-gain common mode feedback loop being applied to high impedance current source load differential mode amplification circuit according to claim 1, it is characterized in that: described common mode feedback loop is applicable to the high impedance current source load artifact fraction differential mode amplification circuit not with tail current source, be also applicable to the high impedance current source load differential formula differential mode amplification circuit being with tail current source.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104779930A (en) * | 2015-04-03 | 2015-07-15 | 成都振芯科技股份有限公司 | High gain common mode feedback loop applied to high impedance current source load differential mode amplification circuit |
| CN109818257A (en) * | 2018-12-24 | 2019-05-28 | 北京时代民芯科技有限公司 | A kind of CMOS technology laser drive circuit |
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2015
- 2015-04-03 CN CN201520199044.1U patent/CN204517766U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104779930A (en) * | 2015-04-03 | 2015-07-15 | 成都振芯科技股份有限公司 | High gain common mode feedback loop applied to high impedance current source load differential mode amplification circuit |
| CN109818257A (en) * | 2018-12-24 | 2019-05-28 | 北京时代民芯科技有限公司 | A kind of CMOS technology laser drive circuit |
| CN109818257B (en) * | 2018-12-24 | 2020-09-11 | 北京时代民芯科技有限公司 | CMOS (complementary Metal oxide semiconductor) process laser driving circuit |
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