CN204498079U - The dielectric oscillator of power splitter is exported based on fundamental frequency anti-phase output two frequency multiplication homophase - Google Patents
The dielectric oscillator of power splitter is exported based on fundamental frequency anti-phase output two frequency multiplication homophase Download PDFInfo
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- CN204498079U CN204498079U CN201520241641.6U CN201520241641U CN204498079U CN 204498079 U CN204498079 U CN 204498079U CN 201520241641 U CN201520241641 U CN 201520241641U CN 204498079 U CN204498079 U CN 204498079U
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Abstract
The utility model discloses a kind of dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase, comprise the first oscillating unit and the second oscillating unit that are operated in fundamental frequency, and working in the power splitter of fundamental frequency and two frequencys multiplication simultaneously, the output of two oscillating units is connected with the input of power splitter.The utility model utilizes the circuit being operated in fundamental frequency to export two frequency-doubled signals, improves output signal frequency, utilizes two-way oscillation signal power to synthesize, improve output power signal; Have that volume is little, excellent performance, low cost and other advantages, be applicable to the fields such as the communication of microwave frequency band, radar, apparatus measures.
Description
Technical field
The utility model belongs to microwave and millimeter wave technical field, particularly a kind of dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase.
Background technology
At the beginning of 20th century 60, because the successful development of bulk effect device, IMPATT Oscillator and transistor oscillator, microwave semiconductor oscillator obtains extensive research and development.
Dielectric resonator oscillator is the one of microwave solid-state circuit, and its resonant network is primarily of dielectric resonator and microstrip line composition.Dielectric resonator adopts high-k, low-loss microwave ceramic material is made, and dielectric constant and Q value performance very well, add the advantages such as upper volume is little, temperature stability is good, and the favor just obtaining Many researchers appears in one.
Researchers have developed serial Feedback type dielectric oscillator and parallel feedback type dielectric oscillator in succession, and these work in fundamental frequency and export the circuit of fundamental frequency signal, but their output signal frequency limits by device.Have developed again afterwards work in that fundamental frequency exports two frequency-doubled signals push away-push type dielectric oscillator circuit, In-Bok Yom etc. discloses one and pushes away-push type dielectric oscillator in " Push – push VoltageControlled Dielectric Resonator Oscillator Using a LTCC Technology ", because dielectric resonator is not strong with being coupled of micro-band, power output is undesirable, and because of its oscillating unit be serial Feedback type dielectric oscillator, circuit debugging is more difficult.Chinese patent 201410384957.0 discloses a kind of difference and pushes away-push controlled oscillator and signal generation device, utilize the mode that harmonic wave extracts and frequency multiplication combines to achieve two frequency-doubled signals outputs, but its circuit structure is complicated, takies circuit area larger.
Utility model content
The purpose of this utility model is to provide a kind of dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase.
The technical scheme realizing the utility model object is: a kind of dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase, comprise the first oscillating unit and the second oscillating unit that are operated in fundamental frequency, and working in the power splitter of fundamental frequency and two frequencys multiplication simultaneously, the output of two oscillating units is connected with the input of power splitter;
Described power splitter comprises the first microstrip line, the second microstrip line, the 3rd microstrip line, the 4th microstrip line, the 5th microstrip line, the 6th microstrip line and isolation resistance;
Described power splitter is provided with three ports, be respectively the first port, the second port and the 3rd port, wherein the second port and the 3rd port are as the input of power splitter, and be connected with the output of the first oscillating unit with the second oscillating unit respectively, the first port is as the output of power splitter;
Described 3rd microstrip line, 4th microstrip line is connected with the first port of power splitter with one end of the 5th microstrip line simultaneously, the other end open circuit of the 4th microstrip line or short circuit, the other end of the 3rd microstrip line is connected with the first microstrip line one end with the second microstrip line simultaneously, also be connected with the second port of power splitter simultaneously, the other end open circuit of the first microstrip line or short circuit, the other end of the second microstrip line is connected with one end of isolation resistance, the other end of isolation resistance is connected with the 3rd port of one end of the 6th microstrip line and power splitter, the other end of the 6th microstrip line is open circuit or short circuit, the other end of the 5th microstrip line is connected with the 3rd port of power splitter.
Compared with prior art, its remarkable advantage is the utility model:
(1) dual-frequency power divider that the utility model adopts fundamental frequency anti-phase output two frequency multiplication homophase to export extracts the second harmonic signal of two-way parallel feedback type dielectric oscillator, under the prerequisite ensured signal quality, improve the output frequency of circuit, utilize power synthetic technique to improve the power of signal.
(2) power divider circuit of the present utility model adopts single-unit arm structure, takies circuit area little compared with traditional double frequency out-phase power splitter.
(3) power divider circuit output port of the present utility model is symmetrical, is thus convenient to circuit and installs.
Below in conjunction with accompanying drawing, the utility model is described in further detail.
Accompanying drawing explanation
Fig. 1 is the utility model exports the dielectric oscillator of power splitter theory diagram based on fundamental frequency anti-phase output two frequency multiplication homophase.
Fig. 2 is the utility model exports the dielectric oscillator of power splitter circuit theory diagrams based on fundamental frequency anti-phase output two frequency multiplication homophase.
Fig. 3 is actual measurement S parameter (the │ S of the utility model embodiment
11│, │ S
22│ and │ S
33│) curve chart.
Fig. 4 is actual measurement S parameter (the │ S of the utility model embodiment
21│, │ S
31│ and │ S
23│) curve chart.
Fig. 5 is the actual measurement phase parameter curve of the utility model embodiment.
Embodiment
Composition graphs 1, a kind of dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase, comprise the first oscillating unit and the second oscillating unit that are operated in fundamental frequency, and working in the power splitter of fundamental frequency and two frequencys multiplication simultaneously, the output of two oscillating units is connected with the input of power splitter;
Described power splitter comprises the first microstrip line 1, second microstrip line 2, the 3rd microstrip line 3, the 4th microstrip line 4, the 5th microstrip line 5, the 6th microstrip line 6 and isolation resistance R
1;
Described power splitter is provided with three ports, be respectively the first port, the second port and the 3rd port, wherein the second port and the 3rd port are as the input of power splitter, and be connected with the output of the first oscillating unit with the second oscillating unit respectively, the first port is as the output of power splitter;
Described 3rd microstrip line 3, the 4th microstrip line 4 are connected with the first port of power splitter with one end of the 5th microstrip line 5 simultaneously, the other end open circuit of the 4th microstrip line 4 or short circuit, the other end of the 3rd microstrip line 3 is connected with the first microstrip line 1 one end with the second microstrip line 2 simultaneously, also be connected with the second port of power splitter simultaneously, the other end open circuit of the first microstrip line 1 or short circuit, the other end of the second microstrip line 2 and isolation resistance R
1one end be connected, isolation resistance R
1the other end be connected with one end of the 6th microstrip line 6 and the 3rd port of power splitter, the other end of the 6th microstrip line 6 is open circuit or short circuit, and the other end of the 5th microstrip line 5 is connected with the 3rd port of power splitter.
Described first oscillating unit is identical with the second oscillating unit structure, is parallel feedback type dielectric oscillator.
First oscillating unit comprises the 7th microstrip line 7, 8th microstrip line 8, 9th microstrip line 9, tenth microstrip line 10, 11 microstrip line 11, 12 microstrip line 12, 13 microstrip line 13, 14 microstrip line 14, 15 microstrip line 15, 16 microstrip line 16, 17 microstrip line 17, 18 microstrip line 18, 19 microstrip line 19, 20 microstrip line 20, 21 microstrip line 21, 22 microstrip line 22, 23 microstrip line 23, 24 microstrip line 24, 25 microstrip line 25, 26 microstrip line 26, 27 microstrip line 27, the first transistor T
1, first medium resonator DR1, the first bias voltage V
1, the second bias voltage V
2with the first electric capacity C
1,
One end of described 7th microstrip line 7 and the first transistor T
1grid be connected, the other end of the 7th microstrip line 7 is connected with one end of the 14 microstrip line the 14 and the 13 microstrip line 13 simultaneously, the other end of the 14 microstrip line 14 is connected with one end of the 15 microstrip line the 15 and the 16 microstrip line 16, the other end open circuit of the 15 microstrip line 15, the other end of the 16 microstrip line 16 is connected with one end of the 17 microstrip line the 17 and the 18 microstrip line 18 simultaneously, the other end open circuit of the 17 microstrip line 17, the other end of the 18 microstrip line 18 accesses the first bias voltage V
1; The other end of the 13 microstrip line 13 is connected with one end of the 12 microstrip line 12, the other end open circuit of the 12 microstrip line 12; Described the first transistor T
1source ground, the first transistor T
1drain electrode be connected with one end of the 8th microstrip line 8, the other end of the 8th microstrip line 8 is connected with one end of the 9th microstrip line the 9 and the 19 microstrip line 19, the other end of the 19 microstrip line 19 is connected with one end of the 20 microstrip line the 20 and the 21 microstrip line 21, the other end open circuit of the 20 microstrip line 20, the other end of the 21 microstrip line 21 is connected with one end of the 22 microstrip line the 22 and the 23 microstrip line 23, the other end open circuit of the 22 microstrip line 22, the other end of the 23 microstrip line 23 accesses the second bias voltage V
2, the other end of the 9th microstrip line 9 is connected with one end of the tenth microstrip line the 10 and the 24 microstrip line 24, and the other end of the tenth microstrip line 10 is connected with one end of the 11 microstrip line 11, the other end open circuit of the 11 microstrip line 11; The other end of the 24 microstrip line 24 is connected with one end of the 26 microstrip line 26 with the 25 microstrip line 25 simultaneously, the other end open circuit of the 25 microstrip line 25, the other end of the 26 microstrip line 26 and the first electric capacity C
1one end be connected, the first electric capacity C
1the other end be connected with one end of the 27 microstrip line 27, the other end of the 27 microstrip line 27 is connected with the second port of power splitter; Two open ends alignment of described 11 microstrip line the 11 and the 12 microstrip line 12 and arranged in parallel, described first medium resonator DR1 is arranged on the center of the 11 microstrip line the 11 and the 12 microstrip line 12;
Second oscillating unit comprises the 28 microstrip line 28, 29 microstrip line 29, 30 microstrip line 30, 31 microstrip line 31, 32 microstrip line 32, 33 microstrip line 33, 34 microstrip line 34, 35 microstrip line 35, 36 microstrip line 36, 37 microstrip line 37, 38 microstrip line 38, 39 microstrip line 39, 40 microstrip line 40, 41 microstrip line 41, 42 microstrip line 42, 43 microstrip line 43, 44 microstrip line 44, 45 microstrip line 45, 46 microstrip line 46, 47 microstrip line 47, 48 microstrip line 48, transistor seconds T
2, second medium resonator DR2, the 3rd bias voltage V
3, the 4th bias voltage V
4with the second electric capacity C
2,
One end of described 28 microstrip line 28 and transistor seconds T
2grid be connected, the other end of the 28 microstrip line 28 is connected with one end of the 35 microstrip line the 35 and the 34 microstrip line 34, the other end of the 35 microstrip line 35 is connected with one end of the 36 microstrip line the 36 and the 37 microstrip line 37, the other end open circuit of the 36 microstrip line 36, the other end of the 37 microstrip line 37 is connected with one end of the 38 microstrip line the 38 and the 39 microstrip line 39, the other end open circuit of the 38 microstrip line 38, other end access the 3rd bias voltage V of the 39 microstrip line 39
3; The other end of the 34 microstrip line 34 is connected with one end of the 33 microstrip line 33, the other end open circuit of the 33 microstrip line 33; Described transistor seconds T
2source ground, transistor seconds T
2drain electrode be connected with one end of the 29 microstrip line 29, the other end of the 29 microstrip line 29 is connected with one end of the 30 microstrip line the 30 and the 40 microstrip line 40, the other end of the 40 microstrip line 40 is connected with one end of the 41 microstrip line the 41 and the 42 microstrip line 42, the other end open circuit of the 41 microstrip line 41, the other end of the 42 microstrip line 42 is connected with one end of the 43 microstrip line the 43 and the 44 microstrip line 44, the other end open circuit of the 43 microstrip line 43, other end access the 4th bias voltage V of the 44 microstrip line 44
4; The other end of the 30 microstrip line 30 is connected with one end of the 31 microstrip line the 31 and the 45 microstrip line 45, and the other end of the 31 microstrip line 31 is connected with one end of the 32 microstrip line 32, the other end open circuit of the 32 microstrip line 32; The other end of the 45 microstrip line 45 is connected with one end of the 47 microstrip line 47 with the 46 microstrip line 46 simultaneously, the other end open circuit of the 46 microstrip line 46, the other end of the 47 microstrip line 47 and the second electric capacity C
2one end be connected, the second electric capacity C
2the other end be connected with one end of the 48 microstrip line 48, the other end of the 48 microstrip line 48 is connected with the 3rd port of power splitter; Two open ends alignment of described 32 microstrip line the 32 and the 33 microstrip line 33 and arranged in parallel, described second medium resonator DR2 is arranged on the center of the 32 microstrip line the 32 and the 33 microstrip line 33;
Described first medium resonator DR1 and second medium resonator DR2 is cylinder dielectric resonator.
The quarter-wave at the described open end of the 11 microstrip line the 11 and the 12 microstrip line 12 and the centre distance fundamental frequency place of first medium resonator DR1; The quarter-wave at the open end of the 32 microstrip line the 32 and the 33 microstrip line 33 and the centre distance fundamental frequency place of second medium resonator DR2.
14 microstrip line the 14, the 16 microstrip line the 16, the 19 microstrip line the 19, the 21 microstrip line the 21, the 35 microstrip line the 35, the 37 microstrip line the 37, the 40 microstrip line the 40 and the 42 microstrip line 42 is all characteristic impedances is 100 Ω, electrical length is the two quarter-wave microstrip lines in frequency multiplication place.
15 microstrip line the 15, the 20 microstrip line the 20, the 36 microstrip line the 36 and the 41 microstrip line 41 is all radiuses is the two quarter-wave fan-shaped offset of microstrip lines in frequency multiplication place; 17 microstrip line the 17, the 22 microstrip line the 22, the 38 microstrip line the 38 and the 43 microstrip line 43 is all radius is the quarter-wave fan-shaped offset of microstrip line in fundamental frequency place.
Below in conjunction with specific embodiment, the utility model is described in further detail.
Embodiment 1
Composition graphs 2, a kind of dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase, the signal of the constant amplitude homophase that two-way dielectric oscillator exports inputs from second, third port of power splitter, and in the signal that the first port exports, second-harmonic power is main, and first-harmonic is suppressed.
Two-way dielectric oscillator circuit adopts the vibration of parallel feedback type medium, makes the phase difference of power splitter second port and the first port be θ
12, the phase difference of the 3rd port and the first port is θ
13, by θ
12and θ
13at fundamental frequency (f
1) and two frequency multiplication (f
2) place arranges respectively as table 1:
Table 1 phase difference is arranged
| f 1 | f 2 | |
| θ 12 | π/2 | 3π/2 |
| θ 13 | -π/2 | -π/2 |
Power splitter is at f
1and f
2place expects that the admittance matrix obtained is:
This power splitter is at f
1and f
2place corresponding to the admittance matrix of topological structure is:
Wherein, Z
a, Z
b,
be respectively the 3rd microstrip line 3, the characteristic impedance of the 5th microstrip line 5 and electrical length;
be respectively the f looked over toward the 4th microstrip line 4 from the first port of power splitter
1and f
2the admittance at place,
be respectively the f looked over to the first microstrip line 1 from the second port of power splitter
1and f
2the admittance at place,
be respectively the f looked over to the 6th microstrip line 6 from the 3rd port of power splitter
1and f
2the admittance at place; R is isolation resistance resistance.
(1), (2), (3), (4) four admittance matrix simultaneous can be tried to achieve Z
aand Z
bbe 81.65 Ω,
be respectively 120 ° and 300 °; 4th microstrip line 4 for characteristic impedance be 40.83 Ω, electrical length is the short-circuit line of 60 °, and the first microstrip line 1 and the 6th microstrip line 6 are all characteristic impedance is 81.65 Ω, and electrical length is the short-circuit line of 60 °; The electrical length of the second microstrip line 2 is set at f
1180 ° that locate; Isolation resistance resistance R is 100 Ω.
The present embodiment fundamental frequency is 9.75GHz, and the dielectric-slab that the power splitter that fundamental frequency anti-phase output two frequency multiplication homophase exports uses is Arlon880, and dielectric constant is 2.2, and thickness is 0.254mm.
Fig. 3 and Fig. 4 gives actual measurement power splitter S parameter result, wherein │ S
11│, │ S
22│, │ S
33│, │ S
21│, │ S
31│ and │ S
23│ is the modulus value of each element in power splitter three port collision matrix.Fig. 5 gives the phase parameter result of output port, wherein ∠ S
21with ∠ S
31be respectively element S in power splitter three port collision matrix
21and S
31phase place, also i.e. port 2 and the phase difference between port 3 and port one, (∠ S
31-∠ S
21) be the phase difference between port 3 and port 2.Can see that this power splitter port is at 9.75GHz place, │ S
11│=-22.3dB, │ S
22│=-15.3dB, │ S
33│=-14.05dB, │ S
21│=-3.24dB, │ S
23│=-15.4dB, ∠ S
21=-89.6 °, ∠ S
31=89.5 °, namely return loss is greater than 14.05dB, and insertion loss is less than 3.24dB, and output port isolation is 15.4dB, and output port phase difference is 179.1 °; At 19.5GHz place, │ S
11│=-14.48dB, │ S
22│=-15.68dB, │ S
33│=-15.92dB, │ S
21│=-3.68dB, │ S
23│=-19.55dB, ∠ S
21=90.05 °, ∠ S
31=91.8 °, namely return loss is greater than 14.48dB, and insertion loss is less than 3.68dB, and output port isolation is 19.55dB, and output port phase difference is 1.75 °; Circuit area 0.21 λ
1× 0.58 λ
1, comparatively traditional circuit reduces nearly 70%.
The output frequency of the dielectric oscillator based on the output of fundamental frequency anti-phase output two frequency multiplication homophase of the present embodiment is 19.50125GHz, second harmonic signal power is-0.417dBm, second harmonic is 15dB to fundamental frequency suppression, second harmonic phase noise is-68.48dBc@10kHz ,-95.13dBc@100kHz.
The utility model achieves the function of the fundamental frequency suppression second harmonic synthesis to two-way parallel feedback type dielectric oscillator output signal, obtains the output signal that frequency spectrum is pure; Two major parts of circuit can Parallel Design, shortens the lead time; Adopting the parallel feedback type dielectric oscillator of small volume and taking the less dual-frequency power divider of circuit area makes integrated circuit area greatly reduce, and circuit cost also reduces greatly.
Claims (8)
1. one kind exports the dielectric oscillator of power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase, it is characterized in that, comprise the first oscillating unit and the second oscillating unit that are operated in fundamental frequency, and working in the power splitter of fundamental frequency and two frequencys multiplication simultaneously, the output of two oscillating units is connected with the input of power splitter;
Described power splitter comprises the first microstrip line (1), the second microstrip line (2), the 3rd microstrip line (3), the 4th microstrip line (4), the 5th microstrip line (5), the 6th microstrip line (6) and isolation resistance (R
1);
Described power splitter is provided with three ports, be respectively the first port, the second port and the 3rd port, wherein the second port and the 3rd port are as the input of power splitter, and be connected with the output of the first oscillating unit with the second oscillating unit respectively, the first port is as the output of power splitter;
Described 3rd microstrip line (3), the 4th microstrip line (4) are connected with the first port of power splitter with one end of the 5th microstrip line (5) simultaneously, the other end open circuit of the 4th microstrip line (4) or short circuit, the other end of the 3rd microstrip line (3) is connected with the first microstrip line (1) one end with the second microstrip line (2) simultaneously, also be connected with the second port of power splitter simultaneously, the other end open circuit of the first microstrip line (1) or short circuit, the other end of the second microstrip line (2) and isolation resistance (R
1) one end be connected, isolation resistance (R
1) the other end be connected with one end of the 6th microstrip line (6) and the 3rd port of power splitter, the other end of the 6th microstrip line (6) is open circuit or short circuit, and the other end of the 5th microstrip line (5) is connected with the 3rd port of power splitter.
2. the dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase according to claim 1, it is characterized in that, described first oscillating unit and the second oscillating unit are parallel feedback type dielectric oscillator.
3. the dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase according to claim 1 and 2, it is characterized in that, described first oscillating unit is identical with the second oscillating unit structure;
First oscillating unit comprises the 7th microstrip line (7), 8th microstrip line (8), 9th microstrip line (9), tenth microstrip line (10), 11 microstrip line (11), 12 microstrip line (12), 13 microstrip line (13), 14 microstrip line (14), 15 microstrip line (15), 16 microstrip line (16), 17 microstrip line (17), 18 microstrip line (18), 19 microstrip line (19), 20 microstrip line (20), 21 microstrip line (21), 22 microstrip line (22), 23 microstrip line (23), 24 microstrip line (24), 25 microstrip line (25), 26 microstrip line (26), 27 microstrip line (27), the first transistor (T
1), first medium resonator (DR1), the first bias voltage (V
1), the second bias voltage (V
2) and the first electric capacity (C
1),
One end of described 7th microstrip line (7) and the first transistor (T
1) grid be connected, the other end of the 7th microstrip line (7) is connected with one end of the 14 microstrip line (14) and the 13 microstrip line (13) simultaneously, the other end of the 14 microstrip line (14) is connected with one end of the 15 microstrip line (15) and the 16 microstrip line (16) simultaneously, the other end open circuit of the 15 microstrip line (15), the other end of the 16 microstrip line (16) is connected with one end of the 17 microstrip line (17) and the 18 microstrip line (18) simultaneously, the other end open circuit of the 17 microstrip line (17), the other end of the 18 microstrip line (18) accesses the first bias voltage (V
1), the other end of the 13 microstrip line (13) is connected with one end of the 12 microstrip line (12), the other end open circuit of the 12 microstrip line (12), described the first transistor (T
1) source ground, the first transistor (T
1) drain electrode be connected with one end of the 8th microstrip line (8), the other end of the 8th microstrip line (8) is connected with one end of the 9th microstrip line (9) and the 19 microstrip line (19), the other end of the 19 microstrip line (19) is connected with one end of the 20 microstrip line (20) and the 21 microstrip line (21), the other end open circuit of the 20 microstrip line (20), the other end of the 21 microstrip line (21) is connected with one end of the 22 microstrip line (22) and the 23 microstrip line (23), the other end open circuit of the 22 microstrip line (22), the other end of the 23 microstrip line (23) accesses the second bias voltage (V
2), the other end of the 9th microstrip line (9) is connected with one end of the tenth microstrip line (10) and the 24 microstrip line (24), the other end of the tenth microstrip line (10) is connected with one end of the 11 microstrip line (11), the other end open circuit of the 11 microstrip line (11), the other end of the 24 microstrip line (24) is connected with one end of the 26 microstrip line (26) with the 25 microstrip line (25) simultaneously, the other end open circuit of the 25 microstrip line (25), the other end of the 26 microstrip line (26) and the first electric capacity (C
1) one end be connected, the first electric capacity (C
1) the other end be connected with one end of the 27 microstrip line (27), the other end of the 27 microstrip line (27) is connected with the second port of power splitter, two open ends alignment of described 11 microstrip line (11) and the 12 microstrip line (12) and arranged in parallel, described first medium resonator (DR1) is arranged on the center of the 11 microstrip line (11) and the 12 microstrip line (12),
Second oscillating unit comprises the 28 microstrip line (28), 29 microstrip line (29), 30 microstrip line (30), 31 microstrip line (31), 32 microstrip line (32), 33 microstrip line (33), 34 microstrip line (34), 35 microstrip line (35), 36 microstrip line (36), 37 microstrip line (37), 38 microstrip line (38), 39 microstrip line (39), 40 microstrip line (40), 41 microstrip line (41), 42 microstrip line (42), 43 microstrip line (43), 44 microstrip line (44), 45 microstrip line (45), 46 microstrip line (46), 47 microstrip line (47), 48 microstrip line (48), transistor seconds (T
2), second medium resonator (DR2), the 3rd bias voltage (V
3), the 4th bias voltage (V
4) and the second electric capacity (C
2),
One end of described 28 microstrip line (28) and transistor seconds (T
2) grid be connected, the other end of the 28 microstrip line (28) is connected with one end of the 35 microstrip line (35) and the 34 microstrip line (34), the other end of the 35 microstrip line (35) is connected with one end of the 36 microstrip line (36) and the 37 microstrip line (37), the other end open circuit of the 36 microstrip line (36), the other end of the 37 microstrip line (37) is connected with one end of the 38 microstrip line (38) and the 39 microstrip line (39), the other end open circuit of the 38 microstrip line (38), other end access the 3rd bias voltage (V of the 39 microstrip line (39)
3), the other end of the 34 microstrip line (34) is connected with one end of the 33 microstrip line (33), the other end open circuit of the 33 microstrip line (33), described transistor seconds (T
2) source ground, transistor seconds (T
2) drain electrode be connected with one end of the 29 microstrip line (29), the other end of the 29 microstrip line (29) is connected with one end of the 30 microstrip line (30) and the 40 microstrip line (40), the other end of the 40 microstrip line (40) is connected with one end of the 41 microstrip line (41) and the 42 microstrip line (42), the other end open circuit of the 41 microstrip line (41), the other end of the 42 microstrip line (42) is connected with one end of the 43 microstrip line (43) and the 44 microstrip line (44), the other end open circuit of the 43 microstrip line (43), other end access the 4th bias voltage (V of the 44 microstrip line (44)
4), the other end of the 30 microstrip line (30) is connected with one end of the 31 microstrip line (31) and the 45 microstrip line (45), the other end of the 31 microstrip line (31) is connected with one end of the 32 microstrip line (32), the other end open circuit of the 32 microstrip line (32), the other end of the 45 microstrip line (45) is connected with one end of the 47 microstrip line (47) with the 46 microstrip line (46) simultaneously, the other end open circuit of the 46 microstrip line (46), the other end of the 47 microstrip line (47) and the second electric capacity (C
2) one end be connected, the second electric capacity (C
2) the other end be connected with one end of the 48 microstrip line (48), the other end of the 48 microstrip line (48) is connected with the 3rd port of power splitter, two open ends alignment of described 32 microstrip line (32) and the 33 microstrip line (33) and arranged in parallel, described second medium resonator (DR2) is arranged on the center of the 32 microstrip line (32) and the 33 microstrip line (33).
4. the dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase according to claim 3, it is characterized in that, first medium resonator (DR1) and second medium resonator (DR2) are cylinder dielectric resonator.
5. the dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase according to claim 4, it is characterized in that, the quarter-wave at described 11 microstrip line (11) and the open end of the 12 microstrip line (12) and the centre distance fundamental frequency place of dielectric resonator; The quarter-wave at the 32 microstrip line (32) and the open end of the 33 microstrip line (33) and the centre distance fundamental frequency place of dielectric resonator.
6. the dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase according to claim 4 or 5, it is characterized in that, the 14 microstrip line (14), the 16 microstrip line (16), the 19 microstrip line (19), the 21 microstrip line (21), the 35 microstrip line (35), the 37 microstrip line (37), the 40 microstrip line (40) and the 42 microstrip line (42) are all characteristic impedances is 100 Ω, electrical length is the two quarter-wave microstrip lines in frequency multiplication place.
7. the dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase according to claim 4 or 5, it is characterized in that, the 15 microstrip line (15), the 20 microstrip line (20), the 36 microstrip line (36) and the 41 microstrip line (41) are all radiuses is the two quarter-wave fan-shaped offset of microstrip lines in frequency multiplication place.
8. the dielectric oscillator exporting power splitter based on fundamental frequency anti-phase output two frequency multiplication homophase according to claim 4 or 5, it is characterized in that, the 17 microstrip line (17), the 22 microstrip line (22), the 38 microstrip line (38) and the 43 microstrip line (43) are all radiuses is the quarter-wave fan-shaped offset of microstrip line in fundamental frequency place.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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