CN204441288U - A kind of light emitting diode matrix with double insulating layer - Google Patents
A kind of light emitting diode matrix with double insulating layer Download PDFInfo
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- CN204441288U CN204441288U CN201520125009.5U CN201520125009U CN204441288U CN 204441288 U CN204441288 U CN 204441288U CN 201520125009 U CN201520125009 U CN 201520125009U CN 204441288 U CN204441288 U CN 204441288U
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Abstract
There is a light emitting diode matrix for double insulating layer, relate to the production technical field of light-emitting diode chip for backlight unit.Each luminescence unit is arranged on same transparency carrier with array by the utility model, adjacent luminescence unit makes micromeritics realize connection in series-parallel by metal conducting layer, enormously simplify the die bond in chip module, bonding quantity, improve encapsulating products yield, reduce packaging cost; The multiple chips formed in unit are is integrated, avoids the interior consistency problem brought as wavelength, voltage, brightness span of chip chamber BIN.This light emitting diode matrix as unit, can also carry out connection in series-parallel splicing again simultaneously, forms more powerful module.Particularly the utility model adopts the mode arranging two-layer transparent insulating layer in isolation deep trouth, can obtain the light emitting diode matrix of stable performance, high, the applicable scale of mass production of reliability.
Description
Technical field
The utility model relates to the production technical field of light-emitting diode chip for backlight unit.
Technical background
In recent years, LED chip of the nitride based end is widely used in the various fields such as display screen, backlight, illumination and street lamp, the application of these higher-wattages LED needs the module simultaneously driving multiple LED chip combined by connection in series-parallel to be formed to realize mostly, and current predominant package technology is the series-parallel mode of multiple chips gold thread.This mode needs the photoelectric parameter between chip must have higher matching, follow-up optical design difficulty, and by gold thread connection in series-parallel between chip, the reliability of technique is lower.
Utility model content
The utility model object is that a kind of insulating properties of proposition and light transmission are good, reliable and stable, can be applicable to the light emitting diode matrix with double insulating layer of scale of mass production.
The utility model arranges at least two luminescence units be made up of n type semiconductor layer, active layer, p type semiconductor layer, current barrier layer and transparency conducting layer in compartment of terrain, same transparency carrier the same side array, the n type semiconductor layer extension of each luminescence unit is arranged on the transparent substrate, active layer is arranged on n type semiconductor layer, p type semiconductor layer is arranged on active layer, current barrier layer is arranged on part p type semiconductor layer, and the p type semiconductor layer and current barrier layer of part arrange transparency conducting layer; Between two adjacent luminescence units, isolation deep trouth is set, inside and outside two-layer transparent insulating layer is set in the bottom of isolation deep trouth and sidewall; Between the n type semiconductor layer of a luminescence unit in adjacent two luminescence units and the transparency conducting layer of another luminescence unit, metal conducting layer is set; The n type semiconductor layer of a luminescence unit in an array arranges N bonding wire electrode, the transparency conducting layer of another luminescence unit of array arranges P bonding wire electrode.
Each luminescence unit is arranged on same transparency carrier with array by the utility model, adjacent luminescence unit makes micromeritics realize connection in series-parallel by metal conducting layer, enormously simplify the die bond in chip module, bonding quantity, improve encapsulating products yield, reduce packaging cost; The multiple chips formed in unit are is integrated, avoids the interior consistency problem brought as wavelength, voltage, brightness span of chip chamber BIN.This light emitting diode matrix as unit, can also carry out connection in series-parallel splicing again simultaneously, forms more powerful module.Particularly the utility model adopts the mode arranging two-layer transparent insulating layer in isolation deep trouth, can obtain the light emitting diode matrix of stable performance, high, the applicable scale of mass production of reliability.
The material of the inside and outside two-layer transparent insulating layer of the utility model is different: bottom isolation deep trouth and the internal layer transparent insulation layer material of sidewall be any one in silica, silicon nitride, silicon oxynitride, bottom isolation deep trouth and the outer transparent insulation layer material of sidewall be any one in aluminium oxide, aluminium nitride, titanium oxide, glass, silica gel, resin, polymethyl methacrylate.
The double layer of insulation material insulation property used in the utility model is good, good, effective leakage current characteristic and the reliability improving light emitting diode matrix of light transmission performance, and main feature has: (1) good insulation preformance.Insulating barrier is made up of two kinds of different insulative materials, ensures the cut-in voltage stable and uniform of light emitting diode matrix, effectively improves the drain conditions of light emitting diode matrix, improves product yield.(2) good reliability.The ductility of ground floor insulating material and spreadability good, the good insulating of second layer insulating material, double insulation, ensures that insulating material covers good at isolation deep trouth, also array will be caused to lose efficacy because of insulating layer material fracture even if guarantee that light emitting diode matrix works under high temperature big current.(3) good stability.Two kinds of insulating material all can be filled in isolation deep trouth, reduce conductive film, impurities left in isolation deep trouth or sidewall affect the stability of tube core.(4) easily corrode, be applicable to scale of mass production.What ground floor was selected is the insulating material that growth technique is ripe, etching process is stable, is easy to do over again, is adapted at using in scale of mass production.
In sum, the utility model can improve stability and the reliability of LED array greatly, reduces the drain conditions of light emitting diode matrix, significantly improves the yields of scale of mass production.
accompanying drawing illustrates:
Fig. 1 is epitaxial substrate.
Fig. 2 is the structural representation forming isolation deep trouth.
Fig. 3 is the structural representation covering the first insulating barrier and current barrier layer in isolation deep trouth.
Fig. 4 is the structural representation covering the second insulating barrier in isolation deep trouth.
Fig. 5 is a kind of structural representation of the present utility model.
embodiment:
One, making step:
Step 1: as shown in Figure 1, adopts in the same side of transparency carrier 000 routine techniques to grow n type semiconductor layer 002, active layer 003 and p type semiconductor layer 004 successively, makes epitaxial substrate.Transparency carrier 000 has certain figure 001, the front bright dipping of light emitting diode matrix can be increased.
Step 2: adopt the mode of photoetching to make mask on p type semiconductor layer 004, and carry out etching technics, remove the subregional p type semiconductor layer 004 in epitaxial wafer substrate top and active layer 003, and certain thickness n type semiconductor layer 002, the exposed n type semiconductor layer 002 without masked areas.Lithographic method is to be conventional sense coupling method, or electron cyclotron resonace lithographic method, or reactive ion etching method, or high-temperature strong acid corrosion.Etching depth is identical with conventional LED manufacture craft with process conditions.
Step 3: adopt the mode of photoetching to make mask in the substrate surface of step 2 gained, again carry out etching technics, remove all n type semiconductor layers 002 of region A in Fig. 2, expose transparency carrier, form isolation deep trouth.Now each region B is an independently luminescence unit, and is not communicated with mutually between them, as shown in Figure 2.Lithographic method is to be sense coupling method, or electron cyclotron resonace lithographic method, or reactive ion etching method, or high-temperature strong acid corrosion, the mode of laser cutting.
Step 4: make SiO on the substrate that step 3 obtains
2film, also can be silicon nitride or silicon oxynitride, thickness be 1000 ~ 5000, and this example is 3000, and film can cover isolation deep trouth sidewall uniformly, and production method is plasma reinforced chemical vapour deposition (PECVD).
Step 5: adopt the mode of photoetching to make mask at film surface, deep trouth is inner, the SiO at sidewall and edge to utilize chemical corrosion or sense coupling method to retain
2film, makes insulating barrier; Retain the SiO of P electrode and interdigital position
2film, as current barrier layer.As shown in Figure 3, the SiO of 101 positions
2be the SiO of the first insulating barrier, 102 positions
2for current barrier layer.
Step 6: adopt the mode of photoetching to make mask on step 5 gained substrate, then adopt electron beam evaporation plating, or plasmaassisted electron beam evaporation plating is at better Al such as surperficial evaporation one deck insulating properties
2o
3film, may also be titanium oxide, or transparent organic, and thickness is 8000 ~ 15000, and this example is 10000.
Step 7: use the mode peeled off only to retain the Al at deep trouth inside, sidewall and edge
2o
3film is as the second insulating barrier.As shown in Figure 4,103 is the second insulating barrier.Second insulating barrier 103 and the first insulating barrier 101 form double insulating layer jointly, are characterized in that insulation property are higher, better to the protective effect of isolation deep trouth.
Step 8: in the substrate surface deposit transparent conductive film of step 7 gained, depositional mode can be electron beam evaporation plating, or the mode of magnetron sputtering.Transparent conductive material can be one or more combination in any in indium tin oxide (ITO), zinc oxide (ZnO), Graphene.Adopt the mode of photoetching to make mask on surface, use the mode of corrosion, only retain the transparent conductive film of P type semiconductor material surface, form transparency conducting layer.As shown in Figure 5,104 is transparency conducting layer.
Step 9: adopt the mode of photoetching to make mask in step 8 gained substrate surface, then adopt the mode of electron beam evaporation plating at surface deposition metal level, thickness is 1.5um ~ 3um, and this example is 2um ~ 3um, ensures that metal level can cover the sidewall of surface and isolation deep layer uniformly.Use the mode peeled off to remove the metal of subregion, form P contact, N contact, and metal bridging, by each independently luminescence unit to be formed the light emitting array of chip magnitude by metal level series connection.As shown in Figure 5,105 is metal bridging, is connected by the p type semiconductor layer of adjacent two luminescence units with n type semiconductor layer; 106 is P bonding wire electrode; 107 is N bonding wire electrode.
Two, product structure feature:
As shown in Figure 5, the product structure formed by above technique is as follows:
At least two are arranged by n type semiconductor layer 002 in compartment of terrain, the same side array of same transparency carrier 000, active layer 003, p type semiconductor layer 004, the luminescence unit that current barrier layer 102 and transparency conducting layer 104 form, n type semiconductor layer 002 extension of each luminescence unit is arranged on transparency carrier 000, active layer 003 is arranged on n type semiconductor layer 002, p type semiconductor layer 004 is arranged on active layer 003, current barrier layer 102 is arranged on part p type semiconductor layer 004, the p type semiconductor layer 004 and current barrier layer 102 of part arrange transparency conducting layer 104.
Between two adjacent luminescence units, isolation deep trouth is set, inside and outside two-layer transparent insulating layer 101 and 103 is set in the bottom of isolation deep trouth and sidewall; Between the n type semiconductor layer 002 of a luminescence unit in adjacent two luminescence units and the transparency conducting layer 104 of another luminescence unit, metal conducting layer 105 is set.
In an array one luminescence unit n type semiconductor layer 002 on N bonding wire electrode 107 is set, the transparency conducting layer 104 of another luminescence unit in an array arranges P bonding wire electrode 106.
Claims (2)
1. a LED chip array, it is characterized in that: in compartment of terrain, same transparency carrier the same side array, at least two luminescence units be made up of n type semiconductor layer, active layer, p type semiconductor layer, current barrier layer and transparency conducting layer are set, the n type semiconductor layer of each luminescence unit is arranged on the transparent substrate, active layer is arranged on n type semiconductor layer, p type semiconductor layer is arranged on active layer, current barrier layer is arranged on part p type semiconductor layer, and part p type semiconductor layer and current barrier layer arrange transparency conducting layer; Between two adjacent luminescence units, isolation deep trouth is set, inside and outside two-layer transparent insulating layer is set in the bottom of isolation deep trouth and sidewall; Between the n type semiconductor layer of a luminescence unit in adjacent two luminescence units and the transparency conducting layer of another luminescence unit, metal conducting layer is set; The n type semiconductor layer of a luminescence unit in an array arranges N bonding wire electrode, the transparency conducting layer of another luminescence unit is arranged P bonding wire electrode.
2. LED chip array according to claim 1, it is characterized in that: bottom isolation deep trouth and the internal layer transparent insulation layer material of sidewall be any one in silica, silicon nitride, silicon oxynitride, bottom isolation deep trouth and the outer transparent insulation layer material of sidewall be any one in aluminium oxide, aluminium nitride, titanium oxide, glass, silica gel, resin, polymethyl methacrylate.
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| CN201520125009.5U CN204441288U (en) | 2015-03-04 | 2015-03-04 | A kind of light emitting diode matrix with double insulating layer |
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| CN201520125009.5U CN204441288U (en) | 2015-03-04 | 2015-03-04 | A kind of light emitting diode matrix with double insulating layer |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104681576A (en) * | 2015-03-04 | 2015-06-03 | 扬州中科半导体照明有限公司 | Light emitting diode array with double insulating layers and production method of light emitting diode array |
| CN107909931A (en) * | 2017-12-29 | 2018-04-13 | 西安智盛锐芯半导体科技有限公司 | Virtual LED display module and 6 times of frequency displaying methods based on three vitta shape LED chips |
| CN108230927A (en) * | 2017-12-29 | 2018-06-29 | 西安智盛锐芯半导体科技有限公司 | Virtual LED display module and 3 times of frequency displaying methods based on three vitta shape LED chips |
| CN108230926A (en) * | 2017-12-29 | 2018-06-29 | 西安智盛锐芯半导体科技有限公司 | Virtual LED display module and 4 times of frequency displaying methods based on four color LED chips |
| CN108564890A (en) * | 2017-12-29 | 2018-09-21 | 西安智盛锐芯半导体科技有限公司 | Virtual LED display module based on three vitta shape LED chips and 6 times of frequency displaying methods |
| CN112968101A (en) * | 2020-12-07 | 2021-06-15 | 重庆康佳光电技术研究院有限公司 | Micro LED chip and manufacturing method thereof |
-
2015
- 2015-03-04 CN CN201520125009.5U patent/CN204441288U/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104681576A (en) * | 2015-03-04 | 2015-06-03 | 扬州中科半导体照明有限公司 | Light emitting diode array with double insulating layers and production method of light emitting diode array |
| CN104681576B (en) * | 2015-03-04 | 2018-03-20 | 扬州中科半导体照明有限公司 | A kind of light emitting diode matrix and its production method with double insulating layer |
| CN107909931A (en) * | 2017-12-29 | 2018-04-13 | 西安智盛锐芯半导体科技有限公司 | Virtual LED display module and 6 times of frequency displaying methods based on three vitta shape LED chips |
| CN108230927A (en) * | 2017-12-29 | 2018-06-29 | 西安智盛锐芯半导体科技有限公司 | Virtual LED display module and 3 times of frequency displaying methods based on three vitta shape LED chips |
| CN108230926A (en) * | 2017-12-29 | 2018-06-29 | 西安智盛锐芯半导体科技有限公司 | Virtual LED display module and 4 times of frequency displaying methods based on four color LED chips |
| CN108564890A (en) * | 2017-12-29 | 2018-09-21 | 西安智盛锐芯半导体科技有限公司 | Virtual LED display module based on three vitta shape LED chips and 6 times of frequency displaying methods |
| CN112968101A (en) * | 2020-12-07 | 2021-06-15 | 重庆康佳光电技术研究院有限公司 | Micro LED chip and manufacturing method thereof |
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