CN204346585U - Light intensity detection circuit - Google Patents

Abstract

Disclose a kind of light intensity detection circuit, comprising: optical sensor, environmentally light intensity produces photocurrent; Integrator, comprises the first electric capacity, carries out integration to photocurrent; Discharge pulse generative circuit, the integral result according to photocurrent produces discharge pulse; Counter, counts discharge pulse; And charge-discharge modules, comprise the second electric capacity, make the first electric capacity to the second electric capacity transfer charge in the schedule time after receiving discharge pulse, wherein, charging process and the discharge process of the first electric capacity is repeated within integral time, thus producing multiple discharge pulse, counter counts discharge pulse, thus produces the digital value of photocurrent.This light intensity detection circuit goes for the optical sensor of various generation photocurrent.

Description

Light intensity detection circuit

Technical field

The utility model belongs to signal processing technology, particularly, relates to light intensity detection circuit.

Background technology

Ambient light sensor is used in portable electronic products and in-vehicle electronic system widely, for automatically regulating the screen intensity of display screen.Portable electronic products comprises notebook computer, mobile phone etc., and its environment for use often changes along with the movement of user.In-vehicle electronic system is such as car entertainment/navigation/dvd system, and due to the rapid movement of automobile, the change of ambient light intensity is very frequent.

Environmentally light intensity adjusting screen brightness, can reduce the energy consumption of electronic product.In addition, the requirement of human eye to screen intensity is different in different environments.Under the environment such as outdoor, ambient light intensity is comparatively large, needs high screen intensity with displaying contents.If enter indoor still keep identical screen intensity, then the relative human eye demand of this screen intensity seemed that even some was dazzling by force, was not suitable for human eye viewing.Utilize light sensors ambient light intensity, electronic product can the environmentally automatic adjusting screen brightness of light intensity, can improve the viewing effect under various environment.

Optical sensor comprises various photosensitive device, such as photoresistance, photodiode, phototriode, silicon photocell etc.Optical sensor based on photodiode can produce photocurrent.Light intensity detection circuit is utilized to convert photocurrent to digital signal, to obtain the numerical value of ambient light intensity.

Existing light intensity detection circuit generally includes photocurrent sample circuit and magnitude conversion circuit, and therefore circuit cost is high.Due to specific resolution and dynamic range etc., optical sensor type predetermined when light intensity detection circuit can only be applicable to circuit design.

Utility model content

The technical problems to be solved in the utility model is to provide a kind of and can reduces costs and go for the light intensity detection circuit of various photodiode.

According to one side of the present utility model, provide a kind of light intensity detection circuit, comprising: optical sensor, environmentally light intensity produces photocurrent; Integrator, comprises the first electric capacity, carries out integration to photocurrent; Discharge pulse generative circuit, the integral result according to photocurrent produces discharge pulse; Counter, counts discharge pulse; And charge-discharge modules, comprise the second electric capacity, the electric discharge of the first electric capacity is carried out in the schedule time after receiving discharge pulse, make the first electric capacity to the second electric capacity transfer charge, wherein, within integral time, repeat charging process and the discharge process of the first electric capacity, thus produce multiple discharge pulse, counter counts discharge pulse, thus produces the digital value of photocurrent.

Preferably, described integrator comprises: operational amplifier, and the in-phase input end of described operational amplifier receives photocurrent, and inverting input receives common mode voltage, and output terminal provides the first output signal; And first switch, and described first Capacitance parallel connection is connected between the in-phase input end of operational amplifier and output terminal.

Preferably, described discharge pulse generative circuit comprises: comparer, and the in-phase input end of described comparer receives the first output signal, and inverting input receives reference voltage, and output terminal provides the second output signal; And with door, describedly receive second with the first input end of door and output signal, the second input end receives the first retiming clock signal, and output terminal provides the 3rd output signal.

Preferably, described charge-discharge modules also comprises: second switch, for being connected with integrator by the first end of the second electric capacity; And the 3rd switch, for the first end of the second electric capacity is connected with reference voltage, wherein, in the charging process of the first electric capacity, second switch disconnects, close or disconnect to 3rd switch periods, thus adopt reference voltage to the second capacitor charging, in the discharge process of the first electric capacity, second switch closes, 3rd switch disconnects, thus utilizes the first electric capacity via the second capacitor discharge.

Preferably, the closed or disconnection under the control of reset signal, the 3rd output signal and the second retiming clock signal respectively of described first switch, second switch and the 3rd switch, the second retiming clock signal is the inversion signal of the first retiming clock signal.

Preferably, described comparer is the clocked comparator according to the second retiming clock signal work.

Preferably, described charge-discharge modules also comprises: the 4th switch and the 5th switch, respectively the second end of the second electric capacity is connected to common mode voltage, wherein, in the charging process of the first electric capacity, the 4th and the 5th switch is periodically closed or disconnection respectively, in the discharge process of the first electric capacity, 4th switch closes, and the 5th switch disconnects.

Preferably, described first switch, second switch, the 3rd switch, the 4th switch and the 5th switch be closed under the control of reset signal, the 3rd output signal, the second retiming clock signal, the 3rd retiming clock signal and the 4th retiming clock signal or disconnection respectively, and the second retiming clock signal is the inversion signal of the first retiming clock signal.

Preferably, described comparer is the clocked comparator according to the 4th retiming clock signal work.

Preferably, the cycle of described first to fourth retiming clock signal is identical and be non-overlapping clock signal.

Preferably, the digital value of described photocurrent was determined by cycle of ambient light intensity, the second electric capacity, the first retiming clock signal and integral time.

Preferably, equal reset signal described integral time and keep the low level duration.

Preferably, the digital value of described photocurrent and the pass of ambient light intensity are: wherein, L represents ambient light intensity, and Dout represents the count value of counter, C ₁represent the capacitance of the second electric capacity, V _rEFrepresent the numerical value of reference voltage, V _cOMrepresent the numerical value of common mode voltage, T represents the cycle of first to fourth retiming clock signal, and N represents the multiple in the cycle of the first retiming clock signal that integral time is corresponding, and β represents the constant relevant to optical sensor.

Preferably, the resolution of described light intensity detection circuit is:

Preferably, the maximum light intensity that described light intensity detection circuit can detect is: $L_{\max }=\frac{C_1}{\mathrm{\βT}}\·\frac{V_{\mathrm{REF}}-V_{\mathrm{COM}}}{N}\·N=\frac{C_1}{\mathrm{\βT}}(V_{\mathrm{REF}}-V_{\mathrm{COM}}).$

Preferably, resolution and the dynamic range of described light intensity detection circuit is changed integral time by adjustment.

According to another aspect of the present utility model, a kind of light intensity detection method is provided, comprises: environmentally light intensity produces photocurrent; The first electric capacity is adopted to carry out integration to photocurrent; Integral result according to photocurrent produces discharge pulse; Discharge pulse is counted; And in schedule time after receiving discharge pulse, carry out the electric discharge of the first electric capacity, make the first electric capacity to the second electric capacity transfer charge, wherein, charging process and the discharge process of the first electric capacity is repeated within integral time, thus produce multiple discharge pulse, and discharge pulse is counted, thus produces the digital value of photocurrent.

18, method according to claim 17, wherein, in the charging process of the first electric capacity, disconnects the connection between the first electric capacity and the second electric capacity, and periodically provides reference voltage to the second electric capacity in the control of the first retiming clock signal.

Preferably, in the discharge process of the first electric capacity, the first electric capacity is connected with the second electric capacity, from the first electric capacity to the second electric capacity transfer charge.

Preferably, the digital value of described photocurrent was determined by cycle of ambient light intensity, the second electric capacity, the first retiming clock signal and integral time.

Preferably, equal reset signal described integral time and keep the low level duration.

Preferably, the digital value of described photocurrent and the pass of ambient light intensity are: wherein, L represents ambient light intensity, and Dout represents the count value of counter, C ₁represent the capacitance of the second electric capacity, V _rEFrepresent the numerical value of reference voltage, V _cOMrepresent the numerical value of common mode voltage, T represents the cycle of first to fourth retiming clock signal, and N represents the multiple in the cycle of the first retiming clock signal that integral time is corresponding, and β represents the constant relevant to optical sensor.

Preferably, the resolution of described light intensity detection circuit is:

Preferably, the maximum light intensity that described light intensity detection circuit can detect is: $L_{\max }=\frac{C_1}{\mathrm{\βT}}\·\frac{V_{\mathrm{REF}}-V_{\mathrm{COM}}}{N}\·N=\frac{C_1}{\mathrm{\βT}}(V_{\mathrm{REF}}-V_{\mathrm{COM}}).$

Preferably, resolution and the dynamic range of described light intensity detection circuit is changed integral time by adjustment.

This light intensity detection circuit does not need to use complicated sample circuit and D/A converting circuit, and circuit structure is simple, thus can reduce costs.By adjustment integral time and resolution-adjustable and dynamic range, go for the optical sensor of various generation photocurrent.

Accompanying drawing explanation

By referring to the description of accompanying drawing to the utility model embodiment, above-mentioned and other objects of the present utility model, feature and advantage will be more clear, in the accompanying drawings:

Fig. 1 illustrates the schematic block diagram according to light intensity detection circuit of the present utility model;

Fig. 2 illustrates the schematic diagram of the light intensity detection circuit according to the first embodiment of the present utility model;

Fig. 3 illustrates the sequential chart of the light intensity detection circuit according to the first embodiment of the present utility model.

Fig. 4 illustrates the schematic diagram of the light intensity detection circuit according to the second embodiment of the present utility model;

Fig. 5 illustrates the sequential chart of the light intensity detection circuit according to the second embodiment of the present utility model; And

Fig. 6 illustrates the sequential chart of the counter adopted in light intensity detection circuit.

Embodiment

Hereinafter with reference to accompanying drawing, various embodiment of the present utility model is described in more detail.In various figures, identical element adopts same or similar Reference numeral to represent.For the sake of clarity, the various piece in accompanying drawing is not drawn in proportion.

Fig. 1 illustrates the schematic block diagram according to light intensity detection circuit of the present utility model.This light intensity detection circuit 100 comprises optical sensor 110, integrator 120, discharge pulse generative circuit 130, counter 140 and charge-discharge modules 150.Optical sensor 110 environmentally light intensity produces photocurrent.Such as, optical sensor 110 is the optical sensors based on photodiode.Integrator 120 pairs of photocurrents carry out integration.Discharge pulse generative circuit 130 produces discharge pulse according to the integral result of photocurrent.Counter 140 pairs of discharge pulses count.Charge-discharge modules 150 utilizes the electric capacity of self to discharge to integrator 120 in the schedule time after receiving discharge pulse.

Integrator 120 comprises for integrating capacitor.Keep between low period in reset signal, repeat charging process and the discharge process of this electric capacity, thus produce multiple discharge pulse, counter counts discharge pulse, thus produces the digital value DOUT of photocurrent.This digital value DOUT is directly proportional to ambient light intensity.Also namely, ambient light intensity is larger, then digital value DOUT is larger.

Fig. 2 illustrates the schematic diagram of the light intensity detection circuit according to the first embodiment of the present utility model.This light intensity detection circuit 100 comprises optical sensor 110, integrator 120, discharge pulse generative circuit 130, counter 140 and charge-discharge modules 150.Integrator 120 comprises operational amplifier U1, electric capacity C2, switch S 2.Discharge pulse generative circuit 130 comprise comparer U2 and with door U3.Charge-discharge modules 150 comprises electric capacity C1 and switch S 1, S3 to S5.The photo-signal of optical sensor 110 is received, in the digital value of the output terminal output photoelectric stream signal of counter 140 at the in-phase input end of operational amplifier U1.

As shown in Figure 2, between optical sensor 110 in-phase input end that is connected to operational amplifier U1 and ground.Under surround lighting irradiates, optical sensor 110 produces photocurrent.The inverting input of operational amplifier U1 is connected to common mode voltage VCOM.

The in-phase input end of comparer U2 is connected to the output terminal of operational amplifier U1, and for receiving the output signal OpOut of operational amplifier U1, inverting input receives reference voltage VREF.In this application, comparer U2 is clocked comparator, compares the signal of in-phase input end and inverting input according to retiming clock signal CK1A.Be connected to the output terminal of comparer U2 with the first input end of door U3, for receiving the output signal CompOut of comparer U2, the second input end receives retiming clock signal CK2.The input end of counter 140 is connected to the output terminal with door U3, and for receiving the output signal DisCharge with door U3, and it counts.In addition, the control end of switch S 1 is also connected to the output terminal of door U3.

Second end of electric capacity C1 is connected to common mode voltage VCOM via switch S 3 and S4 respectively.The first end of electric capacity C1 is connected to the in-phase input end of operational amplifier U1 via switch S 1.Between the in-phase input end that electric capacity C2 and switch S 2 are connected in operational amplifier U1 in parallel and output terminal.In addition, switch S 5 is connected between the intermediate node of electric capacity C1 and switch S 1 and reference voltage VREF.

The electric capacity related in this application can be thermometal electric capacity (MIM capacitor) or two polycrystalline electric capacity (PIP capacitor), switch can be MOS switch (single NMOS tube switch, or PMOS switch, the significant level that when noticing that PMOS makes switch, switch is closed becomes low effectively), switch also can be cmos switch (the i.e. switch of nmos pass transistor and PMOS transistor parallel connection formation, NMOS tube and the grid-controlled signal of PMOS are inversion signal each other), operational amplifier can for meeting any common operational amplifier of job requirement, such as folding (Folded-Cascode) operational amplifier, or telescopic operational amplifier etc.

At work, switch S 1 closes or disconnects under the control of the output signal DisCharge with door U3, switch S 2 is closed or disconnection under the control of reset signal RST, and switch S 3 to S5 is respectively in the control periodically closed or disconnection of retiming clock signal CK2A, CK1A and CK1.At the off period of switch S 2, counter 140 counts under the control of reset signal RST.

Fig. 3 illustrates the sequential chart of the light intensity detection circuit according to the first embodiment of the present utility model.Below with reference to Fig. 3, the principle of work according to the light intensity detection circuit of embodiment of the present utility model is described.

Retiming clock signal CK1, CK1A, CK2 and CK2A are the square-wave signal of same period T, and are four non-overlapping clock signals.Although in figure 3 for the sake of clarity, to illustrate between retiming clock signal CK1 and CK1A and between retiming clock signal CK2 and CK2A the difference of dutycycle obvious, the in fact dutycycle approximately equal of retiming clock signal CK1, CK1A, CK2 and CK2A.In one embodiment, retiming clock signal CK1, CK1A, CK2 and CK2A is the square-wave signal that dutycycle is approximately 50%.

In this application, be 1 when term " non-overlapping clock signal " refers to that retiming clock signal CK1 with CK2 is different, and be 1 when retiming clock signal CK1A with CK2A is different.Retiming clock signal CK1 is identical with CK1A rising edge time, but for negative edge, CK1A is than CK1 advanced a period of time (being far smaller than the whole cycle), and namely CK1A first changes to 0 from 1, and then CK1 changes to 0 from 1 again.Retiming clock signal CK2 is identical with CK2A rising edge time, but for negative edge, CK2A is than CK2 advanced a period of time (being far smaller than the whole cycle), and namely CK2A first changes to 0 from 1, and then CK2 changes to 0 from 1 again.

Between the high period of reset signal RST, switch S 2 closes, and makes electric capacity C2 discharge reduction.Operational amplifier U1 sum counter 140 resets.Between the low period of reset signal, switch S 2 disconnects, and makes operational amplifier U1 and electric capacity C2 form integrator and work.

As shown in Figure 3, when t0, reset signal RST becomes low level from high level, and light intensity detection circuit is started working.Be low level when initial with the output signal DisCharge of door U3, therefore switch S 1 disconnects.

In the first stage, namely during t0 to t3, signal DisCharge is in low level, and switch S 1 disconnects.Under the alternate conduction of switch S 3, S4 and S5, reference voltage VREF is utilized to charge to electric capacity C1.In the first stage, photocurrent is utilized to charge to electric capacity C2 all the time.Operational amplifier U1 carries out integration to the photocurrent that optical sensor 110 produces, and the output signal OpOut of operational amplifier U1 raises in time gradually.

In the t1 moment, the output signal OpOut of operational amplifier U1 reaches reference voltage VREF.Comparer U2 according to retiming clock signal CK1A by the signal OpOut of in-phase input end compared with the reference voltage VREF of inverting input.Comparer U2 is synchronous with the negative edge of retiming clock signal CK1A, namely compares at the negative edge of CK1A, and comparer U2 latches comparative result as output signal in one-period subsequently.Because retiming clock signal CK1A does not reach next negative edge yet in the t1 moment, therefore, the output signal CompOut of comparer U2 maintains low level.

A negative edge after retiming clock signal CK1A follows t1 closely, namely in the t2 moment, the enable comparer U2 of retiming clock signal CK1A.According to the comparative result of the signal OpOut of in-phase input end and the reference voltage VREF of inverting input, the output signal CompOut of comparer U2 becomes high level from low level.

A rising edge after retiming clock signal CK2 follows t2 closely, namely in the t3 moment, be high level with the signal of first and second input ends of door U3, thus the signal DisCharge of its output terminal becomes high level from low level.Counter 140 couples of signal DisCharge count.

In subordinate phase, namely during t3 to t4, signal DisCharge is in high level, and switch S 1 closes.Electric capacity C2 discharges.

Fig. 4 illustrates the schematic diagram of the light intensity detection circuit according to the second embodiment of the present utility model.This light intensity detection circuit 100 comprises optical sensor 110, integrator 120, discharge pulse generative circuit 130, counter 140 and charge-discharge modules 150.Integrator 120 comprises operational amplifier U1, electric capacity C2, switch S 2.Discharge pulse generative circuit 130 comprise comparer U2 and with door U3.Charge-discharge modules 150 comprises electric capacity C1 and switch S 1, S3.The photo-signal of optical sensor 110 is received, in the digital value of the output terminal output photoelectric stream signal of counter 140 at the in-phase input end of operational amplifier U1.

As shown in Figure 4, between optical sensor 110 in-phase input end that is connected to operational amplifier U1 and ground.Under surround lighting irradiates, optical sensor 110 produces photocurrent.The inverting input of operational amplifier U1 is connected to common mode voltage VCOM.

The in-phase input end of comparer U2 is connected to the output terminal of operational amplifier U1, and for receiving the output signal OpOut of operational amplifier U1, inverting input receives reference voltage VREF.In this application, comparer U2 is clocked comparator, compares the signal of in-phase input end and inverting input according to retiming clock signal CK1.Be connected to the output terminal of comparer U2 with the first input end of door U3, for receiving the output signal CompOut of comparer U2, the second input end receives retiming clock signal CK1N.The input end of counter 140 is connected to the output terminal with door U3, and for receiving the output signal DisCharge with door U3, and it counts.In addition, the control end of switch S 1 is also connected to the output terminal of door U3.

Second end of electric capacity C1 is connected to common mode voltage VCOM.The first end of electric capacity C1 is connected to the in-phase input end of operational amplifier U1 via switch S 1.Between the in-phase input end that electric capacity C2 and switch S 2 are connected in operational amplifier U1 in parallel and output terminal.In addition, switch S 3 is connected between the intermediate node of electric capacity C1 and switch S 1 and reference voltage VREF.

At work, switch S 1 closes or disconnects under the control of the output signal DisCharge with door U3, and switch S 2 is closed or disconnection under the control of reset signal RST, and switch S 3 is in the control periodically closed or disconnection of retiming clock signal CK1.At the off period of switch S 2, counter 140 counts under the control of reset signal RST.

Retiming clock signal CK1N is the inversion signal of retiming clock signal CK1.Although not shown in Figure 4, this light intensity detection circuit 100 can also comprise phase inverter, for obtaining retiming clock signal CK1N from from retiming clock signal CK1.

Fig. 5 illustrates the sequential chart of the light intensity detection circuit according to the second embodiment of the present utility model.Below with reference to Fig. 5, the principle of work according to the light intensity detection circuit of embodiment of the present utility model is described.

Retiming clock signal CK1N is the inversion signal of retiming clock signal CK1.In one embodiment, retiming clock signal CK1 and CK1N is the square-wave signal that dutycycle is approximately 50%.

Between the high period of reset signal RST, switch S 2 closes, and makes electric capacity C2 discharge reduction.Operational amplifier U1 sum counter 140 resets.Between the low period of reset signal, switch S 2 disconnects, and makes operational amplifier U1 and electric capacity C2 form integrator and work.

As shown in Figure 5, when t0, reset signal RST becomes low level from high level, and light intensity detection circuit is started working.Be low level when initial with the output signal DisCharge of door U3, therefore switch S 1 disconnects.

In the first stage, namely during t0 to t2, signal DisCharge is in low level, and switch S 1 disconnects.Switch S 3 is in the control periodically closed or disconnection of retiming clock signal CK1.In the conducting phase of switch S 3, reference voltage VREF is utilized to charge to electric capacity C1.In the first stage, photocurrent is utilized to charge to electric capacity C2 all the time.Operational amplifier U1 carries out integration to the photocurrent that optical sensor 110 produces, and the output signal OpOut of operational amplifier U1 raises in time gradually.

In the t1 moment, the output signal OpOut of operational amplifier U1 reaches reference voltage VREF.Comparer U2 according to retiming clock signal CK1 by the signal OpOut of in-phase input end compared with the reference voltage VREF of inverting input.Comparer U2 is synchronous with the negative edge of retiming clock signal CK1, namely compares at the negative edge of CK1, and comparer U2 latches comparative result as output signal in one-period subsequently.Because retiming clock signal CK1 does not reach next negative edge yet in the t1 moment, therefore, the output signal CompOut of comparer U2 maintains low level.

A negative edge after retiming clock signal CK1 follows t1 closely, namely in the t2 moment, the enable comparer U2 of retiming clock signal CK1.According to the comparative result of the signal OpOut of in-phase input end and the reference voltage VREF of inverting input, the output signal CompOut of comparer U2 becomes high level from low level.Be high level with the signal of first and second input ends of door U3, thus the signal DisCharge of its output terminal becomes high level from low level.Counter 140 couples of signal DisCharge count.

In subordinate phase, namely during t2 to t3, signal DisCharge is in high level, and switch S 1 closes.Electric capacity C2 discharges.

Fig. 6 illustrates the sequential chart of the counter adopted in light intensity detection circuit.The counter 140 adopted in the first and the second embodiments described above counts under the control of reset signal RST.Reset signal RST keeps the low level duration to be denoted as " integral time (ATIME) ".Within integral time, count total number of DisCharge pulse, count value DOUT is the output of photocurrent digital value.At the rising edge of RST, DOUT is latched in register.

Below further describe the principle of work according to light intensity detection circuit of the present utility model.

When charge-discharge modules 150 does not receive discharge pulse, switch S 1 disconnects.In charge-discharge modules 150, in the charging stage of electric capacity C1, second end of electric capacity C1 is connected to VCOM, and first end is connected to VREF.The quantity of electric charge that the pole plate of electric capacity C1 stores is C ₁(V _rEF-V _cOM).

When charge-discharge modules 150 receives discharge pulse, switch S 1 closes.Second end of electric capacity C1 is connected to VCOM, and first end is connected to the in-phase input end of operational amplifier U1 and the first end of electric capacity C2.Due to the negative feedback of operational amplifier U1, the in-phase input end of operational amplifier U1 and the voltage of inverting input keep equal, are equal to VCOM.The electric charge that electric capacity C1 stores will become 0.Correspondingly, electric charge electric capacity C1 stored will transfer to electric capacity C2.The quantity of electric charge of transfer is C ₁(V _rEF-V _cOM).The output signal OpOut of operational amplifier U1 reduces.

In figure 3, approx, when t3, place illustrates that the output signal OpOut of operational amplifier U1 reduces.In Figure 5, approx, when t2, place illustrates that the output signal OpOut of operational amplifier U1 reduces.The amplitude that output signal OpOut reduces is:

$\mathrm{\Δv}=\frac{C_1\·(V_{\mathrm{REF}}-V_{\mathrm{COM}})}{C_2}...\left(1\right)$

The quantity of electric charge shifted from electric capacity C1 to electric capacity C2 is:

q＝C ₁·(V _REF-V _COM).................................................(2)

Wherein C ₁, C ₂represent the capacitance of electric capacity C1 and C2 respectively, V _rEFrepresent the numerical value of reference voltage, V _cOMrepresent the numerical value of common mode voltage.

Pass between light intensity and photocurrent is

i＝β·L……………………………………………………(3)

Wherein, L represents light intensity, and unit is the photocurrent that Lux, i represent optical sensor, and β is a constant, by decisions such as the structure of optical sensor and sizes, can obtain its concrete value by emulation or actual test.

If the cycle of clock CK1, CK2 is T, integral time, ATIME was an Integer N clock period, i.e. A _tIME=NT.Within integral time, C2 by the total amount of electric charge that DisCharge pulse bleeds off is

Q _D＝q·D _OUT.......................................................(4)，

Wherein, Q _drepresent discharge charge amount, D _oUTrepresent the count value of counter, q is a constant.

Optical sensor to the total amount of electric charge that C2 charges is

Q _dio＝i·A _TIME＝iNT………………………………………(5)

Wherein, Q _diorepresent the charging charge amount of optical sensor, i represents photocurrent, and N represents the number of clock period, and T represents clock CK1, the cycle of CK2.

According to charge conservation, there is following relation

Q _dio＝Q _D...........................................................(6)

By formula 2,3,4,5 simultaneous obtain

$L=\frac{C_1}{\mathrm{\βT}}\·\frac{V_{\mathrm{REF}}-V_{\mathrm{COM}}}{N}\·D_{\mathrm{OUR}}...\left(7\right)$

Wherein for constant, so light intensity L and output data DOUT is linear relationship, by this circuit, is converted to by intensity signal and exports data DOUT.

From (6), DOUT often increases by 1, and the light intensity knots modification of representative is

The resolution (minimum intensity of light that maybe can detect) of this light intensity detection circuit is:

$L_{\min }=\frac{C_1}{\mathrm{\βT}}\·\frac{V_{\mathrm{REF}}-V_{\mathrm{COM}}}{N}...\left(8\right)$

Therefore, by increasing the value of N, light intensity detection circuit just can be allowed can to have higher resolution (less light intensity can be detected).

The maximum light intensity that this light intensity detection circuit can detect is (during DOUT=N):

$L_{\max }=\frac{C_1}{\mathrm{\βT}}\·\frac{V_{\mathrm{REF}}-V_{\mathrm{COM}}}{N}\·N=\frac{C_1}{\mathrm{\βT}}(V_{\mathrm{REF}}-V_{\mathrm{COM}})...\left(9\right)$

The dynamic range of this light intensity detection circuit is:

L _max/L _min＝N..........................................................(10)

Therefore, by changing the size of N, the dynamic range of this light intensity detection circuit can just be changed.

According to embodiment of the present utility model as described above, these embodiments do not have all details of detailed descriptionthe, do not limit the specific embodiment that this utility model is only described yet.Obviously, according to above description, can make many modifications and variations.This instructions is chosen and is specifically described these embodiments, is to explain principle of the present utility model and practical application better, thus makes art technician that the utility model and the amendment on the utility model basis can be utilized well to use.The scope that protection domain of the present utility model should define with the utility model claim is as the criterion.

Claims (16)

1. a light intensity detection circuit, is characterized in that, comprising:

Optical sensor, environmentally light intensity produces photocurrent;

Integrator, comprises the first electric capacity, carries out integration to photocurrent;

Discharge pulse generative circuit, the integral result according to photocurrent produces discharge pulse;

Counter, counts discharge pulse; And

Charge-discharge modules, comprises the second electric capacity, carries out the electric discharge of the first electric capacity in the schedule time after receiving discharge pulse, makes the first electric capacity to the second electric capacity transfer charge,

Wherein, within integral time, repeat charging process and the discharge process of the first electric capacity, thus produce multiple discharge pulse, counter counts discharge pulse, thus produces the digital value of photocurrent.

2. light intensity detection circuit according to claim 1, is characterized in that, described integrator comprises:

Operational amplifier, the in-phase input end of described operational amplifier receives photocurrent, and inverting input receives common mode voltage, and output terminal provides the first output signal; And

First switch, and described first Capacitance parallel connection is connected between the in-phase input end of operational amplifier and output terminal.

3. light intensity detection circuit according to claim 2, is characterized in that, described discharge pulse generative circuit comprises:

Comparer, the in-phase input end of described comparer receives the first output signal, and inverting input receives reference voltage, and output terminal provides the second output signal; And

With door, describedly receive second with the first input end of door and output signal, the second input end receives the first retiming clock signal, and output terminal provides the 3rd output signal.

4. light intensity detection circuit according to claim 3, is characterized in that, described charge-discharge modules also comprises:

Second switch, for being connected the first end of the second electric capacity with integrator; And

3rd switch, for the first end of the second electric capacity is connected with reference voltage,

Wherein, in the charging process of the first electric capacity, second switch disconnects, close or disconnect to 3rd switch periods, thus adopt reference voltage to the second capacitor charging, in the discharge process of the first electric capacity, second switch closes, 3rd switch disconnects, thus utilizes the first electric capacity via the second capacitor discharge.

5. light intensity detection circuit according to claim 4, it is characterized in that, closed or the disconnection under the control of reset signal, the 3rd output signal and the second retiming clock signal respectively of described first switch, second switch and the 3rd switch, the second retiming clock signal is the inversion signal of the first retiming clock signal.

6. light intensity detection circuit according to claim 5, is characterized in that, described comparer is the clocked comparator according to the second retiming clock signal work.

7. light intensity detection circuit according to claim 4, is characterized in that, described charge-discharge modules also comprises:

4th switch and the 5th switch, be connected to common mode voltage by the second end of the second electric capacity respectively,

Wherein, in the charging process of the first electric capacity, the 4th and the 5th switch is periodically closed or disconnection respectively, and in the discharge process of the first electric capacity, the 4th switch closes, and the 5th switch disconnects.

8. light intensity detection circuit according to claim 7, it is characterized in that, described first switch, second switch, the 3rd switch, the 4th switch and the 5th switch be closed under the control of reset signal, the 3rd output signal, the second retiming clock signal, the 3rd retiming clock signal and the 4th retiming clock signal or disconnection respectively, and the second retiming clock signal is the inversion signal of the first retiming clock signal.

9. light intensity detection circuit according to claim 8, is characterized in that, described comparer is the clocked comparator according to the 4th retiming clock signal work.

10. light intensity detection circuit according to claim 8, is characterized in that, the cycle of described first to fourth retiming clock signal is identical and be non-overlapping clock signal.

11. light intensity detection circuit according to claim 4, is characterized in that, the digital value of described photocurrent was determined by cycle of ambient light intensity, the second electric capacity, the first retiming clock signal and integral time.

12. light intensity detection circuit according to claim 11, is characterized in that, equal reset signal described integral time and keep the low level duration.

13. light intensity detection circuit according to claim 12, is characterized in that, the digital value of described photocurrent and the pass of ambient light intensity are:

$L=\frac{C_1}{\mathrm{\βT}}\·\frac{V_{\mathrm{REF}}-V_{\mathrm{COM}}}{N}\·D_{\mathrm{OUT}},$

Wherein, L represents ambient light intensity, and Dout represents the count value of counter, C ₁represent the capacitance of the second electric capacity, V _rEFrepresent the numerical value of reference voltage, V _cOMrepresent the numerical value of common mode voltage, T represents the cycle of first to fourth retiming clock signal, and N represents the multiple in the cycle of the first retiming clock signal that integral time is corresponding, and β represents the constant relevant to optical sensor.

14. light intensity detection circuit according to claim 13, is characterized in that, the resolution of described light intensity detection circuit is:

$L_{\min }=\frac{C_1}{\mathrm{\βT}}\·\frac{V_{\mathrm{REF}}-V_{\mathrm{COM}}}{N}.$

15. light intensity detection circuit according to claim 13, is characterized in that, the maximum light intensity that described light intensity detection circuit can detect is:

$L_{\max }=\frac{C_1}{\mathrm{\βT}}\·\frac{V_{\mathrm{REF}}-V_{\mathrm{COM}}}{N}\·N=\frac{C_1}{\mathrm{\βT}}(V_{\mathrm{REF}}-V_{\mathrm{COM}})$

16. light intensity detection circuit according to claim 11, is characterized in that, are changed resolution and the dynamic range of described light intensity detection circuit by adjustment integral time.