CN204271130U - LED flip-chip packaged structure - Google Patents
LED flip-chip packaged structure Download PDFInfo
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- CN204271130U CN204271130U CN201420687876.3U CN201420687876U CN204271130U CN 204271130 U CN204271130 U CN 204271130U CN 201420687876 U CN201420687876 U CN 201420687876U CN 204271130 U CN204271130 U CN 204271130U
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- layer
- led flip
- chip packaged
- led
- packaged structure
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- 239000004065 semiconductor Substances 0.000 claims abstract description 38
- 239000000758 substrate Substances 0.000 claims abstract description 38
- 239000000463 material Substances 0.000 claims abstract description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 11
- 238000002161 passivation Methods 0.000 claims abstract description 11
- 238000005530 etching Methods 0.000 claims abstract description 9
- 238000001704 evaporation Methods 0.000 claims abstract description 7
- 230000008020 evaporation Effects 0.000 claims abstract description 7
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 5
- 229910052594 sapphire Inorganic materials 0.000 claims description 13
- 239000010980 sapphire Substances 0.000 claims description 13
- 239000000843 powder Substances 0.000 claims description 11
- 239000000919 ceramic Substances 0.000 claims description 8
- 239000011521 glass Substances 0.000 claims description 6
- 229910010272 inorganic material Inorganic materials 0.000 claims description 4
- 239000011147 inorganic material Substances 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 238000005245 sintering Methods 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 229910052681 coesite Inorganic materials 0.000 claims description 3
- 229910052906 cristobalite Inorganic materials 0.000 claims description 3
- 230000004927 fusion Effects 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 229910052682 stishovite Inorganic materials 0.000 claims description 3
- 238000003786 synthesis reaction Methods 0.000 claims description 3
- 229910052905 tridymite Inorganic materials 0.000 claims description 3
- 238000005538 encapsulation Methods 0.000 abstract description 6
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- 230000003247 decreasing effect Effects 0.000 abstract description 4
- 238000000605 extraction Methods 0.000 abstract description 4
- 238000005286 illumination Methods 0.000 abstract description 4
- 238000007598 dipping method Methods 0.000 abstract description 3
- 239000012528 membrane Substances 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000010992 reflux Methods 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 239000011230 binding agent Substances 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000008187 granular material Substances 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 241000826860 Trapezium Species 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000000741 silica gel Substances 0.000 description 1
- 229910002027 silica gel Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000009834 vaporization Methods 0.000 description 1
- 230000008016 vaporization Effects 0.000 description 1
Abstract
The utility model provides a kind of LED flip-chip packaged structure, includes successively: p type semiconductor layer, multi layer quantum well luminescent layer, n type semiconductor layer and substrate layer; Described LED flip-chip packaged structure includes more than one reverse etched recesses; Described LED flip-chip packaged structure also includes transparent fluorescent packed layer, and described transparent fluorescent packed layer to be filled in reverse etched recesses and to cover substrate layer outside; When manufacturing this LED flip-chip packaged structure, oppositely etching precision can control in um rank, much larger than the precision of present mm rank, so just by controlling fluorescent material amount more accurately thus obtaining the more consistent mass product of color; Therefore this LED flip-chip packaged structure has that structure is simple, encapsulation precision is high, bright dipping colour consistency is high, the reliable advantage of structure, and be applicable in LED illumination light source, light source life is long.Meanwhile, because the passivation layer covered between transparent fluorescent packed layer and LED chip is the silica membrane layer of evaporation, the extraction of light is increased by successively decreasing of refractive index.
Description
Technical field
The utility model relates to LED chip encapsulation technology field, particularly relates to a kind of LED flip-chip packaged structure.
Background technology
LED, as forth generation lighting source, has energy-conservation and life-span advantage significantly.
LED is the key link obtaining high-quality LED illumination light source, the chip encapsulation technology that wafer-level package (CSP) is latest generation, has package area and chip area under equal space close, the advantage that sealed storage capacity is higher.The CSP encapsulation of prior art, the direction of growth along epitaxial wafer P-N junction carries out etched recesses, and be sprayed on chip back by after fluorescent material mixing silica gel, this spraying coating process is very easy to come off when high temperature reflux welds; Meanwhile, the precision of groove etching is mm level, and this etching precision is unfavorable for the accurate control of filling fluorescent material amount, thus is difficult to the mass product ensureing to obtain solid colour.
Summary of the invention
Technical problem to be solved in the utility model is to provide the LED flip-chip packaged structure being applicable to LED illumination light source that a kind of structure is simple, encapsulation precision is high, bright dipping colour consistency is high, structure is reliable, the life-span is long.
The utility model is achieved through the following technical solutions:
LED flip-chip packaged structure, wherein, includes successively: p type semiconductor layer, multi layer quantum well luminescent layer, n type semiconductor layer and substrate layer; Described LED flip-chip packaged structure includes more than one reverse etched recesses; Described LED flip-chip packaged structure also includes transparent fluorescent packed layer, and described transparent fluorescent packed layer to be filled in reverse etched recesses and to cover substrate layer outside.
Wherein in an embodiment, described p type semiconductor layer, multi layer quantum well luminescent layer, n type semiconductor layer and substrate layer are combined to form the overall LED chip unit adopting " convex " font layer structure, more than one LED chip unit Connecting groups synthesis LED chip in a linear fashion; Described reverse etched recesses is between adjacent LED chip unit.
Further, the top of described reverse etched recesses is openend, with the either flush of described substrate layer, the inner bottom surface of described reverse etched recesses is arranged in p type semiconductor layer, and multi layer quantum well luminescent layer and n type semiconductor layer are positioned at the sidepiece of described reverse etched recesses.
Further, described transparent fluorescent packed layer adopts the structure that more than one " T " font is connected in a linear fashion.
Further, passivation layer is provided with between described transparent fluorescent packed layer and LED chip.
Further, described passivation layer is the SiO2 thin layer that a kind of evaporation is formed.
Further, described substrate layer is a kind of Sapphire Substrate layer, or described substrate layer is a kind of layer-of-substrate silicon.
Further, described transparent fluorescent packed layer is a kind of inorganic material layer formed by the fusion of clear glass, transparent ceramic powder and fluorescent material sintering.
Further, described reverse etched recesses is formed in the aufwuchsplate etching in the other direction of substrate layer.
Further, described LED flip-chip packaged structure includes two upside-down mounting electrodes, is connected respectively with n type semiconductor layer with p type semiconductor layer.
The beneficial effects of the utility model are as follows:
LED flip-chip packaged structure of the present utility model, includes successively: p type semiconductor layer, multi layer quantum well luminescent layer, n type semiconductor layer and substrate layer; Described LED flip-chip packaged structure includes more than one reverse etched recesses; Described LED flip-chip packaged structure also includes transparent fluorescent packed layer, and described transparent fluorescent packed layer to be filled in reverse etched recesses and to cover substrate layer outside; When manufacturing this LED flip-chip packaged structure, oppositely etching precision can control in um rank, much larger than the precision of present mm rank, so just by controlling fluorescent material amount more accurately thus obtaining the more consistent mass product of color; Therefore this LED flip-chip packaged structure has that structure is simple, encapsulation precision is high, bright dipping colour consistency is high, the reliable advantage of structure, and be applicable in LED illumination light source, light source life is long.
Meanwhile, because the passivation layer covered between transparent fluorescent packed layer and LED chip is the silica membrane layer of evaporation, the extraction of light is increased by successively decreasing of refractive index; Transparent fluorescent packed layer is that a kind of clear glass, transparent ceramic powder and fluorescent material sintering merges the inorganic material layer formed, and impacts and keeps firm, guarantee this LED flip-chip packaged reliability of structure further when therefore can stand high temperature reflux weldering.
Accompanying drawing explanation
Fig. 1 is the sectional structure schematic diagram of the utility model LED flip-chip packaged structure;
Fig. 2 is the structural representation of the LED of the utility model LED flip-chip packaged structure;
Fig. 3 is the structural representation of the LED chip of the utility model LED flip-chip packaged structure.
Description of reference numerals:
1--substrate layer; 2--N type semiconductor layer; 3-multi layer quantum well luminescent layer; 4--P type semiconductor layer; The reverse etched recesses of 5-; 6--passivation layer; 7--transparent fluorescent packed layer.
Embodiment
The utility model, in order to solve the problem of prior art, proposes a kind of LED flip-chip packaged structure, wherein, as shown in Figure 1, 2, 3, includes successively: p type semiconductor layer 4, multi layer quantum well luminescent layer 3, n type semiconductor layer 2 and substrate layer 1; Described LED flip-chip packaged structure includes more than one reverse etched recesses 5; Described LED flip-chip packaged structure also includes transparent fluorescent packed layer 7, and described transparent fluorescent packed layer 7 is filled in reverse etched recesses 5 and to cover substrate layer 1 outside.
Wherein in an embodiment, described p type semiconductor layer 4, multi layer quantum well luminescent layer 3, n type semiconductor layer 2 and substrate layer 1 are combined to form the overall LED chip unit adopting " convex " font layer structure, more than one LED chip unit Connecting groups synthesis LED chip in a linear fashion; Described reverse etched recesses 5 is between adjacent LED chip unit.
Further, the top of described reverse etched recesses 5 is openend, with the either flush of described substrate layer 1, the inner bottom surface of described reverse etched recesses 5 is arranged in p type semiconductor layer 4, and multi layer quantum well luminescent layer 3 and n type semiconductor layer 2 are positioned at the sidepiece of described reverse etched recesses 5.
Further, described transparent fluorescent packed layer 7 adopts the structure that more than one " T " font is connected in a linear fashion.
Further, passivation layer 6 is provided with between described transparent fluorescent packed layer 7 and LED chip.
Further, described passivation layer 6 is the SiO2 thin layer that a kind of evaporation is formed.
Further, described substrate layer 1 is a kind of Sapphire Substrate layer, or described substrate layer 1 is a kind of layer-of-substrate silicon.
Further, described transparent fluorescent packed layer 7 is a kind of inorganic material layer formed by the fusion of clear glass, transparent ceramic powder and fluorescent material sintering.
Further, described reverse etched recesses 5 is the etching in the other direction of the aufwuchsplate at substrate layer 1 and being formed.
Further, described LED flip-chip packaged structure includes two upside-down mounting electrodes, is connected respectively with n type semiconductor layer with p type semiconductor layer.
Embodiment:
And the utility model is described in detail below with reference to the accompanying drawings in conjunction with the embodiments.It should be noted that, when not conflicting, the feature in following examples can combine mutually.As shown in Figure 1 to Figure 3, this LED flip-chip packaged structure, comprises following structure: Sapphire Substrate layer 1, n type semiconductor layer 2, multi layer quantum well (MQW) luminescent layer 3, p type semiconductor layer 4, reverse etched recesses 5, passivation layer 6, transparent fluorescent packed layer 7 and upside-down mounting electrode (not shown) from the described sapphire P-N junction direction of growth.
Wherein, reverse etched recesses 5 penetrates described sapphire layer 1, n type semiconductor layer 2 and multi layer quantum well luminescent layer 3 successively, till the certain depth of component direct P type semiconductor layer 4.This reverse etched recesses 5 obtains from the reverse side travel direction etching of the sapphire P-N junction direction of growth, is undertaken by dry etching or wet etching process, forms an inverted concave groove structure by the aufwuchsplate opposite direction facet etch at substrate layer.Passivation layer 6 is one deck SiO along the surperficial evaporation of described reverse etched recesses 5
2thin layer, increases the extraction of light by successively decreasing of refractive index.Transparent fluorescent packed layer 7 is fill low-temperature transparent ceramic powders, low-temperature transparent glass particle, organic binder bond, fluorescent powder grain in described reverse etched recesses 5 after, calcines fully to merge to obtain through high temperature 800; Low-temperature transparent ceramic powder material is SiO
2, Al
2o
3deng nanoscale granule, can melt in high temperature 200 ° ~ 800 ° calciners.Upside-down mounting electrode is that the electrode manufacture that the epitaxial wafer calcined carries out flip-chip from P layer obtains.
Below by Fig. 2 and Fig. 3, carry out the manufacture method of LED flip-chip packaged structure of the present utility model and the explanation of flow process:
First, LED as shown in Figure 2, Sapphire Substrate layer 1 grows n type semiconductor layer 2, multi layer quantum well luminescent layer 3 and p type semiconductor layer 4 successively.
Secondly, etching is reversed in the sapphire P-N junction direction of growth, be exactly the back side at Sapphire Substrate layer 1, penetrate described sapphire layer 1, n type semiconductor layer 2 and multi layer quantum well luminescent layer 3 successively, till the certain depth of component direct P type semiconductor layer 4, by dry etching or wet etching process, form an inverted concave groove structure at the aufwuchsplate opposite direction facet etch of substrate, obtain reverse etched recesses 5 exactly.
Again, in reverse etched recesses 5 on the surface, one deck SiO is formed by evaporation process on each surface of channel section
2film, so just increases the extraction of light by successively decreasing of refractive index; Then, fill low-temperature transparent ceramic powders, low-temperature transparent glass particle, organic binder bond, fluorescent powder grain in reverse etched recesses 5 after, calcine fully to merge through high temperature 800 and obtain, various transparent powder is fully merged, organic adhesive vaporization at high temperature, obtain the high-strength transparence fluorescence packed layer 7 of inorganic combination like this, this transparent fluorescent packed layer 7, impact and keep firm when can stand high temperature reflux weldering in chip processing procedure.Wherein, low-temperature transparent ceramic powder material is SiO
2, Al
2o
3deng nanoscale granule, can melt in high temperature 200 ° ~ 800 ° calciners.
Then, carry out process annealing process, afterwards, the electrode fabrication process that the epitaxial wafer through having calcined carries out flip-chip from P layer obtains required upside-down mounting electrode.
Finally, cut in the middle of reverse etched recesses 5, obtain the LED flip-chip packaged structure of simple grain, carry out testing the LED light source that braid is finally had LED flip-chip packaged structure.
It should be noted that, exemplarily, backing material is for Sapphire Substrate, but epitaxial wafer of the present utility model is by sapphire or the silicon epitaxial wafer as backing material.
From technical scheme above, by the LED light source that LED flip-chip packaged structure of the present utility model obtains, the light sent downwards can directly outgoing, the light part upwards sent directly can pass transparent fluorescent packed layer 7 outgoing, and another part light sent upwards also can through transparent fluorescent packed layer 7 outgoing after passing through reflection after being incident upon both sides right-angled trapezium plasticity catoptric arrangement part, overall light efficiency is high, there is not cutting stress and cause the problem of scrapping yet, rate of finished products is high, low cost of manufacture.
The above embodiment only have expressed execution mode of the present utility model, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the utility model the scope of the claims.It should be pointed out that for the person of ordinary skill of the art, without departing from the concept of the premise utility, can also make some distortion and improvement, these all belong to protection range of the present utility model.Therefore, the protection range of the utility model patent should be as the criterion with claims.
Claims (10)
1.LED flip-chip packaged structure, is characterized in that, include successively: p type semiconductor layer, multi layer quantum well luminescent layer, n type semiconductor layer and substrate layer; Described LED flip-chip packaged structure includes more than one reverse etched recesses; Described LED flip-chip packaged structure also includes transparent fluorescent packed layer, and described transparent fluorescent packed layer to be filled in reverse etched recesses and to cover substrate layer outside.
2. LED flip-chip packaged structure according to claim 1, it is characterized in that, described p type semiconductor layer, multi layer quantum well luminescent layer, n type semiconductor layer and substrate layer are combined to form the overall LED chip unit adopting " convex " font layer structure, more than one LED chip unit Connecting groups synthesis LED chip in a linear fashion; Described reverse etched recesses is between adjacent LED chip unit.
3. LED flip-chip packaged structure according to claim 2, it is characterized in that, the top of described reverse etched recesses is openend, with the either flush of described substrate layer, the inner bottom surface of described reverse etched recesses is arranged in p type semiconductor layer, and multi layer quantum well luminescent layer and n type semiconductor layer are positioned at the sidepiece of described reverse etched recesses.
4. the LED flip-chip packaged structure according to claim 1 or 2 or 3, is characterized in that, the structure that described transparent fluorescent packed layer adopts more than one " T " font to be connected in a linear fashion.
5. LED flip-chip packaged structure according to claim 2, is characterized in that, is provided with passivation layer between described transparent fluorescent packed layer and LED chip.
6. LED flip-chip packaged structure according to claim 5, is characterized in that, described passivation layer is the SiO2 thin layer that a kind of evaporation is formed.
7. LED flip-chip packaged structure according to claim 1, is characterized in that, described substrate layer is a kind of Sapphire Substrate layer, or described substrate layer is a kind of layer-of-substrate silicon.
8. LED flip-chip packaged structure according to claim 1, is characterized in that, described transparent fluorescent packed layer is a kind of inorganic material layer formed by the fusion of clear glass, transparent ceramic powder and fluorescent material sintering.
9. LED flip-chip packaged structure according to claim 3, is characterized in that, described reverse etched recesses is formed in the aufwuchsplate etching in the other direction of substrate layer.
10. the LED flip-chip packaged structure according to claim 1 or 2 or 3, is characterized in that, described LED flip-chip packaged structure includes two upside-down mounting electrodes, is connected respectively with n type semiconductor layer with p type semiconductor layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420687876.3U CN204271130U (en) | 2014-11-17 | 2014-11-17 | LED flip-chip packaged structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420687876.3U CN204271130U (en) | 2014-11-17 | 2014-11-17 | LED flip-chip packaged structure |
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| Publication Number | Publication Date |
|---|---|
| CN204271130U true CN204271130U (en) | 2015-04-15 |
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ID=52805978
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420687876.3U Expired - Fee Related CN204271130U (en) | 2014-11-17 | 2014-11-17 | LED flip-chip packaged structure |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105280781A (en) * | 2015-10-30 | 2016-01-27 | 晶科电子（广州）有限公司 | Flip white-light LED device and manufacturing method thereof |
| CN107481664A (en) * | 2017-09-28 | 2017-12-15 | 京东方科技集团股份有限公司 | Display panel and its driving method, display device |
| CN109935674A (en) * | 2019-03-29 | 2019-06-25 | 佛山市国星半导体技术有限公司 | A kind of flip LED chips and preparation method thereof |
| CN110364605A (en) * | 2019-07-26 | 2019-10-22 | 佛山市国星半导体技术有限公司 | A kind of leakproof indigo plant flip LED chips and preparation method thereof, LED component |
| CN114361315A (en) * | 2020-10-13 | 2022-04-15 | 福建中科芯源光电科技有限公司 | White light LED chip and device packaged by inorganic material, and preparation method and application thereof |
-
2014
- 2014-11-17 CN CN201420687876.3U patent/CN204271130U/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105280781A (en) * | 2015-10-30 | 2016-01-27 | 晶科电子（广州）有限公司 | Flip white-light LED device and manufacturing method thereof |
| CN107481664A (en) * | 2017-09-28 | 2017-12-15 | 京东方科技集团股份有限公司 | Display panel and its driving method, display device |
| CN109935674A (en) * | 2019-03-29 | 2019-06-25 | 佛山市国星半导体技术有限公司 | A kind of flip LED chips and preparation method thereof |
| CN110364605A (en) * | 2019-07-26 | 2019-10-22 | 佛山市国星半导体技术有限公司 | A kind of leakproof indigo plant flip LED chips and preparation method thereof, LED component |
| CN114361315A (en) * | 2020-10-13 | 2022-04-15 | 福建中科芯源光电科技有限公司 | White light LED chip and device packaged by inorganic material, and preparation method and application thereof |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20190919 Address after: 519000 Guangdong city of Zhuhai province high tech Zone Tangjiawan town Jinfeng Road No. 1 office building on the third floor Room 301 Patentee after: ELEC-TECH INTERNATIONAL CO.,LTD. Address before: 4 building, No. six, No. 18, Harbour Road, Tang Wan Town, Zhuhai, Guangdong, 519000 Patentee before: ELEC-TECH INTERNATIONAL Co.,Ltd. |
|
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 519000 Guangdong city of Zhuhai province high tech Zone Tangjiawan town Jinfeng Road No. 1 office building on the third floor Room 301 Patentee after: Zhuhai Leishi Lighting Co.,Ltd. Address before: 519000 Guangdong city of Zhuhai province high tech Zone Tangjiawan town Jinfeng Road No. 1 office building on the third floor Room 301 Patentee before: ELEC-TECH INTERNATIONAL Co.,Ltd. |
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| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150415 |