CN204230291U - A kind of vertical stratification White-light LED chip of wafer scale - Google Patents
A kind of vertical stratification White-light LED chip of wafer scale Download PDFInfo
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- CN204230291U CN204230291U CN201420791571.7U CN201420791571U CN204230291U CN 204230291 U CN204230291 U CN 204230291U CN 201420791571 U CN201420791571 U CN 201420791571U CN 204230291 U CN204230291 U CN 204230291U
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Abstract
The utility model discloses a kind of vertical stratification White-light LED chip of wafer scale, and this vertical stratification White-light LED chip comprises: substrate, and described substrate has first surface and second surface; Epitaxial loayer, described epitaxial loayer is arranged on the first surface of described substrate; Metal electrode, described metal electrode to be arranged on described epitaxial loayer and to be connected with described epitaxial loayer; Fluorescent material mixed layer, described fluorescent material mixed layer is arranged on said epitaxial layer there.By photoetching, its metal pad electrode and dicing lane are protected; the method of being solidified finally by thinning, grinding, polishing by coating fluorescent material mixture afterwards obtains required fluorescent material thick layer; remove photoresist afterwards, obtain the vertical stratification white light LEDs of wafer scale.The utility model obtains the basically identical vertical stratification White-light LED chip of colour temperature, and at chip-scale ejecting white light, substantially increases the production efficiency of white light LEDs.
Description
Technical field
The utility model Light-Emitting Diode (LED) manufactures field, particularly relates to a kind of vertical stratification White-light LED chip of wafer scale.
Background technology
Light-emitting diode (light emitting diode is called for short LED) is divided into inorganic LED(to be commonly referred to as LED according to the chemical constitution of different luminescent material and attribute) and organic LED (being commonly referred to as OLEDs).1993, blue gallium nitride (GaN) LED technology obtained and breaks through, and within 1996, achieves inorganic LED white light emission on this basis.Because white light LEDs has low voltage drive, all solid state, low-power consumption, the long-acting advantage such as reliably, white light LED part all receives great attention that is academic and industrial circle in the application study of illumination association area.Because white light LEDs is a kind of high efficiency light source meeting environmental protection and energy saving green illumination theory, therefore, semiconductor illumination technique (forth generation lighting technology) at present based on white light LEDs obtains promotion energetically and development in worldwide, is forming huge industry.The mode that white light LED part realizes white light mainly contains three kinds: 1. blue-light LED chip excites yellow fluorescent powder, obtains white light by compound; 2. ultraviolet LED excites red, green, blue three primary colors fluorescent powder, obtains white light by compound; 3. red, green, blue three-primary color LED multi-chip obtains white light by integration packaging.Current modal white light LEDs implementation is look conversion hysteria, namely at blue-light LED chip surface application one deck yellow fluorescent powder.The encapsulation of the white light LEDs of present stage is all generally have encapsulation to be fixed on substrate on by the mode of die bond by chip by blue-light LED chip, bonding wire afterwards, point silica gel is in the mixture of fluorescent material, obtain the outgoing of white light LEDs, because the lighting angle of thin-film LED is little compared with horizontal structure chip, luminous intensity is in vertical direction very strong, lateral emitting two is little, the phosphor powder layer adopting gluing process to obtain is all arc, it not a plane, easily there is blue circle or yellow circle in the white chip obtained like this, causes single white chip color temperature distribution uneven.If can chip surface apply one deck and chip light emitting size close to and also the phosphor powder layer of consistency of thickness, just can solve the Lan Quan of conventional package and the problem of yellow circle.
Utility model content
The technical problems to be solved in the utility model is existing vertical stratification White-light LED chip being obtained mixture layer and colorific inhomogeneities by gluing process coating silica gel and fluorescent material, provides a kind of wafer level vertical stratification White-light LED chip that improve the uniformity of color temperature distribution for this reason.
The technical solution of the utility model is: a kind of vertical stratification White-light LED chip of wafer scale, and it comprises: substrate, and described substrate has first surface and second surface; The epitaxial loayer be made up of the n type semiconductor layer be cascading from top to bottom, light emitting epitaxial layer and p type semiconductor layer; Fluorescent material mixed layer, also comprise the metal electrode being arranged on and being connected on epitaxial loayer and with described epitaxial loayer, described metal electrode comprises metal pad electrode and metal expansion electrode, and the outer surface that described fluorescent material mixed layer is arranged on described epitaxial loayer makes outside metal pad electrode is exposed to.
The improvement of such scheme is described substrate is conductive substrates, described vertical stratification White-light LED chip also comprises metal bonding layer, metallic reflector and metal solder layer, described metal solder layer is arranged on the second surface of described substrate, its material be gold, gold-tin alloy, aluminum and its alloy any one; Between the first surface that described metallic reflector is arranged at described substrate and p type semiconductor layer; Described metal bonding layer is arranged between metallic reflector and substrate.
The further improvement of such scheme is that described vertical stratification White-light LED chip also comprises passivation layer, and described passivation layer is arranged on described n type semiconductor layer.
The further improvement of such scheme is that described vertical stratification White-light LED chip also comprises roughened layer, and described roughened layer is arranged between described epitaxial loayer and described fluorescent material mixed layer.
Preferably, described light emitting epitaxial layer is the multiple quantum well active layer exciting ultraviolet light or royal purple light.
Preferably, the material of described fluorescent material mixed layer comprises fluorescent material and bonding glue.
Preferably, described fluorescent material is one or more combination in yellow fluorescent powder, green emitting phosphor and red fluorescence powder; Described bonding glue comprises the combination of one or more in silica gel, modified silicone resin, epoxy resin, denaturation loop epoxy resins and third rare resin.
Preferably, the thickness of described fluorescent material mixed layer is 5um ~ 500um.
Preferably, the size of described fluorescent material mixed layer equals the size dimension of described epitaxial loayer, or is greater than the size dimension of described epitaxial loayer and wraps up the sidewall of described epitaxial loayer.
The beneficial effects of the utility model are that described fluorescent material mixed layer is directly coated on epitaxial loayer, metal pad electrode is exposed by photoetching process, the silica gel phosphor powder layer of consistency of thickness is obtained by the method for thinning grinding and polishing, can not the phosphor powder layer that obtains of picture point adhesive process be all arc, there is blue circle or yellow circle, and then avoid the problem of colorific inhomogeneities, reduce the product colour temperature difference of same batch, form the white light LEDs that colour temperature is consistent; 2. described in, vertical stratification White-light LED chip sends white light in chip-scale, substantially increases the production efficiency of white light.
Accompanying drawing explanation
Fig. 1 is the sectional view of the structure of the vertical stratification White-light LED chip of the utility model first embodiment wafer level;
Fig. 2 is the sectional view of the structure of the vertical stratification White-light LED chip of the utility model second embodiment wafer level;
In figure, 101, substrate, 102, epitaxial loayer, 103, fluorescent material mixed layer, 104, metal electrode, 105, metal bonding layer, 106, metallic reflector, 111, metal solder layer, 112, p type semiconductor layer, 113, light emitting epitaxial layer, 114, n type semiconductor layer, 115, roughened layer, 116, passivation layer.
Embodiment
Below in conjunction with schematic diagram, vertical stratification White-light LED chip of the present utility model is described in more detail, which show preferred embodiment of the present utility model, should be appreciated that those skilled in the art can revise the utility model described here, and still realize advantageous effects of the present utility model.Therefore, following description is appreciated that extensively knowing for those skilled in the art, and not as to restriction of the present utility model.
In the following passage, more specifically the utility model is described by way of example with reference to accompanying drawing.According to the following describes and claims, advantage of the present utility model and feature will be clearer.It should be noted that, accompanying drawing all adopts the form that simplifies very much and all uses non-ratio accurately, only in order to object that is convenient, aid illustration the utility model embodiment lucidly.
Core concept of the present utility model is, a kind of vertical stratification White-light LED chip of wafer level is provided, described in this vertical stratification White-light LED chip, fluorescent material mixed layer is directly coated in epi-layer surface, to solve existing vertical stratification White-light LED chip obtaining mixture layer and colorific non-uniformity problem by gluing process coating silica gel and fluorescent material, improve the uniformity of color temperature distribution.
Below enumerate several embodiments of described vertical stratification White-light LED chip, to clearly demonstrate content of the present utility model, will be clear that, content of the present utility model is not restricted to following examples, and other improvement by the routine techniques means of those of ordinary skill in the art are also within thought range of the present utility model.
[the first embodiment]
Below please refer to Fig. 1, it is the sectional view of the structure of the vertical stratification White-light LED chip of the utility model first embodiment.
Vertical stratification White-light LED chip described in the utility model comprises: 101, substrate; 102, epitaxial loayer; 103, fluorescent material mixed layer; 104, metal electrode; 105, metal bonding layer; 106, metallic reflector; 111, metal solder layer; 112, p type semiconductor layer; 113, light emitting epitaxial layer; 114, n type semiconductor layer; 115, roughened layer; 116, passivation layer.
As shown in Figure 1, in the present embodiment, described substrate 101 is conductive substrates, substrate 101 can be selected from organizing material with next, this group material comprises: silicon, aluminium silicon, metal or alloy, in preferred embodiment, substrate 101 chooses aluminium silicon substrate, the less processing being conducive to chip of the angularity of such substrate.Substrate 101 has first surface and second surface.
Metal bonding layer 105 is arranged on the second surface of substrate 101, and preferred embodiment forms for being deposited by gold-tin alloy (AuSn), or is formed by gold (Au) deposition.
The second surface of substrate 101 is also provided with one deck solder layer.In the present embodiment, solder layer 111 is metal solder layer, for the eutectic technology of chip package.The material of solder layer can be the alloy of gold or golden tin, also can be the alloy of aluminium or aluminium.
Metallic reflector 106 is arranged on the surface of metal bonding layer 105.The material in reflector 106 adopts the material of high reverse--bias light, preferably as silver and bazar metal, improves the light emission rate of this vertical stratification White-light LED chip.
Epitaxial loayer 102 is arranged on the surface of metallic reflector, and the material of epitaxial loayer 102 can be gallium nitride-based material, gallium phosphide and material, gallium nitrogen phosphorous-based materials or zinc oxide based material.Epitaxial loayer 102 comprises the p type semiconductor layer 112, light emitting epitaxial layer 113 and the n type semiconductor layer 114 that are cascading from bottom to top, and light emitting epitaxial layer 113 is for exciting the multiple quantum well active layer of ultraviolet light or royal purple light.The structure of the epitaxial loayer 102 in the present embodiment is not limited to P type GaN layer structure-AlGaN multiple quantum well active layer-N-type AlGaN layer, other can excite the epitaxial layer structure of ultraviolet light or royal purple light, if P type GaN layer-InGaN/GaN multiple quantum well active layer-N-type GaN layer is also in thought range of the present utility model.In addition, epitaxial loayer 102 there is one deck roughened layer 115, because epitaxial loayer 102 the superiors are n type semiconductor layer 114 in the present embodiment, so carry out alligatoring to obtain roughened layer 115 to n type semiconductor layer 114 surface, thus improve the luminous efficiency of this vertical stratification White-light LED chip.Roughened layer 115 can be obtained by the method for wet etching alligatoring, dry etching alligatoring and grown photonic crystal.Metal electrode 104 is arranged at epitaxial loayer upper surface, and its metal electrode comprises metal expansion electrode and metal pad electrode.Got up by metal pad electrode protection by the method for photoetching, the thickness of photoetching protecting glue is between 10um-500um.
Fluorescent material mixed layer 103 to be arranged on epitaxial loayer 102 and to make outside metal pad electrode is exposed to, due to epitaxial loayer 102 being in the present embodiment provided with passivation layer 116, so fluorescent material mixed layer 103 is arranged on the upper surface of passivation layer 116, the height of metal electrode is no more than the height of fluorescent material mixed layer; The material of fluorescent material mixed layer 103 comprises fluorescent material and bonding glue, wherein, fluorescent material can be the combination of one or more in yellow fluorescent powder, green emitting phosphor and red fluorescence powder, adhesive glue glassware for drinking water has certain viscosity and hardness, described bonding glue is silicones, modified silicone resin, epoxy resin, denaturation loop epoxy resins, third rare resin, or at least comprises a kind of hybrid resin in above-mentioned resin.Preferably, fluorescent material is YAG system and barium orthosilicate (Barium ortho-Silicate is called for short BOS) is fluorescent material.The thickness of fluorescent material mixed layer is 5um ~ 100um, is preferably 25um, 36um, 45um.For obtaining the vertical stratification White-light LED chip of different-colour, adjust in the scope that this fluorescent material is certain with the proportioning of bonding glue.The size dimension of fluorescent material mixed layer 103 is equal to or greater than the size of epitaxial loayer 102 to form the parcel of sidewall.In the present embodiment, fluorescent material mixed layer 103 is preferably 15% for yellow fluorescent powder (YAG) accounts for silica gel percent concentration for allocation ratio, can also be the mixture of silicones and yellow fluorescent powder (YAG) and nitride red fluorescent powder, can also be the mixture of silicones and yellow fluorescent powder (YAG) and nitride red fluorescent powder, green emitting phosphor.
In the present embodiment, the process realizing fluorescent material mixed layer 103 is: be the litho pattern of 10um-500um in vertical stratification blue chip wafer surface photoetching a layer thickness, be preferably between 60um-110um, the dicing lane of pad electrode and chip is blocked, by even glue, exposure, develops, obtain required litho pattern.
The mixed body of configuration yellow fluorescent powder and silica gel, the percent concentration shared by fluorescent material is 15%, stirs, and vacuumizes in vacuum tank, extracts the bubble between silica gel and yellow fluorescent powder mixture out.The mixture of the fluorescent material configured and silicones is coated in uniformly the surface of LED wafer by point gum machine, adopts squeegee to make its planarization.Leave standstill and toast 2h in baking box LED wafer being placed on after a period of time 150 DEG C and be cured, after thinning machine is thinned to certain thickness, by grinder, grinding and polishing is carried out to it again, finally on chemical-mechanical polishing mathing (CMP), finishing polish can be carried out to it and make its surface carry out planarization.Obtain that there is certain thickness fluorescent material mixed layer 103.By laser scribing means, chip is cut, obtain the vertical stratification White-light LED chip that single-chip has fluorescent material mixed layer 103.In the utility model, the solidification of the mixture of silicones and fluorescent material both can be solidify on drip pan, also can be solidify in an oven.Coated silicones and fluorescent material are coated in the planarization after LED wafer surface, its planarization can be made with squeegee, its deadweight also can be utilized to make its surface planarisation.After reaching required phosphor powder layer thickness after grinding and polishing, also CMP finishing polish can not be carried out.
In the present embodiment, this vertical stratification White-light LED chip epitaxial layers 102 is inspired royal purple light or ultraviolet light, this royal purple light or ultraviolet excitation fluorescent material mixed layer 103 directly send white light in chip-scale, form the white light LEDs that colour temperature is consistent, substantially increase the production efficiency of white light.
[the second embodiment]
The utility model second embodiment is the modification of the first embodiment.Below please refer to Fig. 2, it is the sectional view of the structure of the vertical stratification White-light LED chip of the utility model second embodiment.In the drawings, identical reference number represents and is equal to label in Fig. 1, difference is do not have evaporation metal solder layer 111 in embodiment two, substrate conduction is utilized to save cost like this, but the method that its follow-up packaging technology can not adopt eutectic to weld encapsulates, and the mode of tin cream or elargol can only be adopted to encapsulate.Comparatively embodiment one will be almost for reliability.
In sum, vertical stratification White-light LED chip described in the utility model, compared with prior art, the vertical stratification white light LEDs of the wafer scale that the utility model provides has the following advantages:
1. in vertical stratification White-light LED chip described in the utility model, described fluorescent material mixed layer is directly coated on epitaxial loayer, by photoetching process exposed pad, the silica gel phosphor powder layer of consistency of thickness is obtained by the method for thinning grinding and polishing, can not the phosphor powder layer that obtains of picture point adhesive process be all arc, occur blue circle or yellow circle, and then avoid the problem of colorific inhomogeneities, reduce the product colour temperature difference of same batch, form the white light LEDs that colour temperature is consistent.
2. described in, vertical stratification White-light LED chip sends white light in chip-scale, substantially increases the production efficiency of white light.
Obviously, those skilled in the art can carry out various change and modification to the utility model and not depart from spirit and scope of the present utility model.Like this, if these amendments of the present utility model and modification belong within the scope of the utility model claim and equivalent technologies thereof, then the utility model is also intended to comprise these change and modification.
Claims (10)
1. a vertical stratification White-light LED chip for wafer scale, it comprises: substrate (101), and described substrate has first surface and second surface; The epitaxial loayer (102) be made up of the n type semiconductor layer be cascading from top to bottom (114), light emitting epitaxial layer (113) and p type semiconductor layer (112); Fluorescent material mixed layer (103), it is characterized in that also comprising the metal electrode (104) being arranged on and being connected on epitaxial loayer and with described epitaxial loayer, described metal electrode comprises metal pad electrode and metal expansion electrode, and the outer surface that described fluorescent material mixed layer is arranged on described epitaxial loayer makes outside metal pad electrode is exposed to.
2. the vertical stratification White-light LED chip of a kind of wafer scale as claimed in claim 1, it is characterized in that, described substrate is conductive substrates, described vertical stratification White-light LED chip also comprises metal bonding layer (105), metallic reflector (106) and metal solder layer (111), described metal solder layer is arranged on the second surface of described substrate, its material be gold, gold-tin alloy, aluminum and its alloy any one; Between the first surface that described metallic reflector is arranged at described substrate and p type semiconductor layer; Described metal bonding layer is arranged between metallic reflector and substrate.
3. the vertical stratification White-light LED chip of a kind of wafer scale as described in claim 2, is characterized in that, described vertical stratification White-light LED chip also comprises passivation layer (116), and described passivation layer is arranged on described n type semiconductor layer.
4. the vertical stratification White-light LED chip of a kind of wafer scale as claimed in claim 3, is characterized in that, described vertical stratification White-light LED chip also comprises roughened layer (115), and described roughened layer is arranged between described epitaxial loayer and described fluorescent material mixed layer.
5. the vertical stratification White-light LED chip of a kind of wafer scale as claimed in claim 1, is characterized in that, described light emitting epitaxial layer is the multiple quantum well active layer exciting ultraviolet light or royal purple light.
6. the vertical stratification White-light LED chip of a kind of wafer scale as described in claim 1, is characterized in that, the material of described fluorescent material mixed layer comprises fluorescent material and bonding glue.
7. the vertical stratification White-light LED chip of a kind of wafer scale as claimed in claim 6, is characterized in that, described fluorescent material is one or more combination in yellow fluorescent powder, green emitting phosphor and red fluorescence powder.
8. the vertical stratification White-light LED chip of a kind of wafer scale as claimed in claim 6, is characterized in that, described bonding glue comprises the combination of one or more in silica gel, modified silicone resin, epoxy resin, denaturation loop epoxy resins and third rare resin.
9. the vertical stratification White-light LED chip of a kind of wafer scale described in as arbitrary in claim 1-8, it is characterized in that, the thickness of described fluorescent material mixed layer is 5um ~ 100um.
10. the vertical stratification White-light LED chip of a kind of wafer scale as described in as arbitrary in claim 1-8, it is characterized in that, the size of described fluorescent material mixed layer equals the size dimension of described epitaxial loayer, or is greater than the size dimension of described epitaxial loayer and wraps up the sidewall of described epitaxial loayer.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105702814A (en) * | 2016-03-25 | 2016-06-22 | 映瑞光电科技(上海)有限公司 | Method for re-processing white-light light emitting diode (LED) chip with unqualified test on photoelectric parameter |
| CN105810799A (en) * | 2016-03-25 | 2016-07-27 | 映瑞光电科技(上海)有限公司 | Preparation method for improving brightness of wafer level white-light LED chip and structure of wafer level white-light LED chip |
| CN115458644A (en) * | 2022-10-10 | 2022-12-09 | 硅能光电半导体(广州)有限公司 | Upright white light LED packaging structure and preparation method thereof |
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2014
- 2014-12-16 CN CN201420791571.7U patent/CN204230291U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105702814A (en) * | 2016-03-25 | 2016-06-22 | 映瑞光电科技(上海)有限公司 | Method for re-processing white-light light emitting diode (LED) chip with unqualified test on photoelectric parameter |
| CN105810799A (en) * | 2016-03-25 | 2016-07-27 | 映瑞光电科技(上海)有限公司 | Preparation method for improving brightness of wafer level white-light LED chip and structure of wafer level white-light LED chip |
| CN105702814B (en) * | 2016-03-25 | 2019-01-18 | 映瑞光电科技(上海)有限公司 | A kind of method that the underproof White-light LED chip of photoelectric parameter testing is processed again |
| CN115458644A (en) * | 2022-10-10 | 2022-12-09 | 硅能光电半导体(广州)有限公司 | Upright white light LED packaging structure and preparation method thereof |
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