CN204190712U - A kind of ultrashort wave radio set automatic gain control circuit - Google Patents
A kind of ultrashort wave radio set automatic gain control circuit Download PDFInfo
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- CN204190712U CN204190712U CN201420537300.9U CN201420537300U CN204190712U CN 204190712 U CN204190712 U CN 204190712U CN 201420537300 U CN201420537300 U CN 201420537300U CN 204190712 U CN204190712 U CN 204190712U
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Abstract
The utility model relates to a kind of ultrashort wave radio set automatic gain control circuit, and first the radiofrequency signal RFIN of receiver delivers to numerical-control attenuator I, after draw intermediate-freuqncy signal through frequency mixer.Numerical-control attenuator II is sent on one tunnel, and detector is sent on another road.The intermediate frequency field strength indicating signal IF_RSSI that wave detector detects is analog signal, converts this analog signal to digital signal, and send into FPGA by A/D converter.FPGA adopts the algorithm of sliding window filtering to carry out signal transacting, obtain the mean value of intermediate-freuqncy signal, FPGA judges according to this intermediate frequency field strength indicating signal IF_RSSI, numerical-control attenuator I, numerical-control attenuator II is controlled by RFAGC, IFAGC1 and IFAGC2 holding wire, by SPI Interface Controller variable gain amplifier, the output realizing intermediate-freuqncy signal is constant.Effect is, effectively can carry out automatic growth control in received RF signal wide dynamic range, makes receipts intermediate-freuqncy signal amplitude maintain one comparatively in stability range, realizes the steady output of intermediate-freuqncy signal.
Description
Technical field
The utility model relates to a kind of digital AGC automatic gain control circuit, and particularly one is used for ultrashort wave radio set, can carry out a kind of ultrashort wave radio set automatic gain control circuit of automatic growth control to the receipts radiofrequency signal of wide dynamic range.
Background technology
The function of agc circuit realizes the automatic growth control in system wide dynamic range, and it is widely used in the system of the great dynamic ranges such as forces station, smart antenna, wireless communication system, medical treatment and disk fetch channel.Agc circuit can regulate the gain of these systems, makes the signal that in very large range changes can the output level of stable output.
Owing to affecting by factors such as transmitting power size, reception and transmission range distance, Electromagnetic Wave Propagation declines, the excursion of the input signal of receiver is often very large.Receiver to keep receiving equipment Linear Amplifer in so wide scope, and the unsaturated distortion of signal, just needs the gain controlling receiver, make the level that output signal keeps stable, ensures that receiver normally works.When input signal strength is too little, receiver can not accurately receive required signal, and when incoming signal level is excessive, transistor and other components and parts can damage due to overload, and this does not wish to occur.Usual requirement is when Received signal strength is faint, and receiver gain increases, and when Received signal strength is strong, receiver gain reduces, and output signal so just can be made to keep stable.
In order to solve when the dynamic range of input signal is excessive, outputs level signals is made still to maintain problem in constant range, a kind of patent of invention being applied to full-digital AGC control method in tdma system and system (publication number: CN101075832A) and having authorized, employing full-digital AGC controls, according to intermediate-freuqncy signal characteristic, generate the decision condition information controlling variable gain amplifier, and then control variable gain amplifier, realize the AGC control treatment of whole loop.But this patent of invention is only amplified intermediate-freuqncy signal or is decayed, and do not carry out AGC process to the radiofrequency signal received, when input signal is very large, the analogue device of front end easily causes non-linear, even can be damaged; And this patent of invention carries out AD to intermediate-freuqncy signal to sample laggard line correlation process, AGC processing delay is long, and regulation time is relatively slow.
Thus, design and a kind ofly can seem particularly necessary to the radiofrequency signal received compared with the system of carrying out automatic growth control real-time in wide dynamic range.
Summary of the invention
The purpose of this utility model is to carry out automatic growth control in the radiofrequency signal wide dynamic range received, and makes receipts intermediate-freuqncy signal amplitude maintain one comparatively in stability range, realizes the steady output of intermediate-freuqncy signal.
The technical solution of the utility model is: a kind of ultrashort wave radio set automatic gain control circuit, it is characterized in that: comprise numerical-control attenuator I, frequency mixer, numerical-control attenuator II, wave detector, A/D converter, variable gain amplifier and FPGA, first the radiofrequency signal RFIN that receiver receives delivers to numerical-control attenuator I, after through frequency mixer, draw intermediate-freuqncy signal, intermediate-freuqncy signal divides two-way, numerical-control attenuator II is sent on one tunnel, detector is sent on another road, the intermediate frequency field strength indicating signal IF_RSSI that wave detector detects is analog signal, this analog signal is converted to digital signal by A/D converter, and send into FPGA, intermediate frequency field strength indicating signal must be judged in order to accurate in real time, FPGA adopts the algorithm of sliding window filtering to carry out signal transacting, obtain the mean value of intermediate-freuqncy signal, FPGA judges according to this intermediate frequency field strength indicating signal IF_RSSI, pass through RFAGC, IFAGC1 and IFAGC2 holding wire controls numerical-control attenuator I, numerical-control attenuator II, by SPI Interface Controller variable gain amplifier, the output realizing intermediate-freuqncy signal is constant, wherein numerical-control attenuator I completes radio frequency AGC function, and numerical-control attenuator II and variable gain amplifier complete intermediate frequency AGC function.
The utility model beneficial effect is: (1) is relative to old simulation AGC control technology, the utility model adopts numerically controlled variable gain amplifier, accurately can provide digital gain compensation, there is fast response time, control circuit is simple, control advantage flexibly; (2) the utility model can control radio frequency AGC and intermediate frequency AGC by detecting intermediate frequency field strength indicating signal, and when input radio frequency dynamic range of signals is excessive, the intermediate-freuqncy signal of output still maintains in stability range, thus realizes the steady output of intermediate-freuqncy signal.
Accompanying drawing explanation
Fig. 1 is that the utility model system realizes block diagram.
Embodiment
As shown in Figure 1, a kind of ultrashort wave radio set automatic gain control circuit, comprises numerical-control attenuator I, frequency mixer, numerical-control attenuator II, wave detector, A/D converter, variable gain amplifier and FPGA.
Receiver receive radiofrequency signal RFIN first deliver to numerical-control attenuator I, after draw intermediate-freuqncy signal through frequency mixer.Intermediate-freuqncy signal divides two-way, and numerical-control attenuator II is sent on a road, and detector is sent on another road, and the intermediate frequency field strength indicating signal IF_RSSI that wave detector detects is analog signal, converts this analog signal to digital signal, and send into FPGA by A/D converter.Intermediate frequency field strength indicating signal must be judged in order to accurate in real time, FPGA adopts the algorithm of sliding window filtering to carry out signal transacting, obtain the mean value of intermediate-freuqncy signal, FPGA judges according to this intermediate frequency field strength indicating signal IF_RSSI, numerical-control attenuator I, numerical-control attenuator II is controlled by RFAGC, IFAGC1 and IFAGC2 holding wire, by SPI Interface Controller variable gain amplifier, the output realizing intermediate-freuqncy signal is constant.
FPGA, by detecting the voltage range of intermediate frequency field strength indicating signal IF_RSSI, controls numerical-control attenuator II by holding wire IFAGC1 and IFAGC2, by SPI Interface Controller variable gain amplifier, completes intermediate frequency AGC function; Control numerical-control attenuator I by holding wire RFAGC, complete radio frequency AGC function.Make when input radio frequency dynamic range of signals is very large, the intermediate-freuqncy signal of output still remains in a constant range, realizes the steady output of intermediate-freuqncy signal.
A/D converter is connected with FPGA by three line locking serial ports SPI mouths; Variable gain amplifier is connected with FPGA by three line locking serial ports SPI mouths.
Numerical-control attenuator I is 1 grade, and gain is 32dB; Numerical-control attenuator II is 2 grades, is respectively 16dB and 32dB; Variable gain amplifier overall gain is 34dB.
Numerical-control attenuator I is HE751 chip, for controlling the decay of radiofrequency signal; Numerical-control attenuator II is HE751 chip, for controlling the decay of intermediate-freuqncy signal; Frequency mixer is HSP-158, for radiofrequency signal is converted to intermediate-freuqncy signal; Wave detector is AD8307 chip, for detecting the amplitude of intermediate-freuqncy signal; A/D converter is TLV1572, for intermediate frequency field strength indicating signal is converted to digital signal; Variable gain amplifier is AD8370, for controlling the gain of intermediate-freuqncy signal; Described FPGA is Xilinx XC5VLX110T, the signal collecting and controlling function of completion system.
In sum, above embodiment is only in order to illustrate that the technical solution of the utility model is not intended to limit; All based on above-mentioned basic ideas, do not depart from the various change and modification done in this creation spirit and scope, all should belong to scope disclosed in the utility model.
Claims (4)
1. a ultrashort wave radio set automatic gain control circuit, it is characterized in that: comprise numerical-control attenuator I, frequency mixer, numerical-control attenuator II, wave detector, A/D converter, variable gain amplifier and FPGA, first the radiofrequency signal RFIN that receiver receives delivers to numerical-control attenuator I, after through frequency mixer, draw intermediate-freuqncy signal, intermediate-freuqncy signal divides two-way, numerical-control attenuator II is sent on one tunnel, detector is sent on another road, the intermediate frequency field strength indicating signal IF_RSSI that wave detector detects is analog signal, this analog signal is converted to digital signal by A/D converter, and send into FPGA, intermediate frequency field strength indicating signal must be judged in order to accurate in real time, FPGA adopts the algorithm of sliding window filtering to carry out signal transacting, obtain the mean value of intermediate-freuqncy signal, FPGA judges according to this intermediate frequency field strength indicating signal IF_RSSI, pass through RFAGC, IFAGC1 and IFAGC2 holding wire controls numerical-control attenuator I, numerical-control attenuator II, by SPI Interface Controller variable gain amplifier AD8370, the output realizing intermediate-freuqncy signal is constant,
Wherein numerical-control attenuator I completes radio frequency AGC function, and numerical-control attenuator II and variable gain amplifier complete intermediate frequency AGC function.
2. a kind of ultrashort wave radio set automatic gain control circuit according to claim 1, is characterized in that: described A/D converter is connected with FPGA by three line locking serial ports SPI mouths; Described variable gain amplifier is connected with FPGA by three line locking serial ports SPI mouths.
3. a kind of ultrashort wave radio set automatic gain control circuit according to claim 1, it is characterized in that: described numerical-control attenuator I is 1 grade, gain is 32dB; Described numerical-control attenuator II is 2 grades, is respectively 16dB and 32dB; Described variable gain amplifier overall gain is 34dB.
4. a kind of ultrashort wave radio set automatic gain control circuit according to claim 1, is characterized in that: described numerical-control attenuator I is HE751 chip, for controlling the decay of radiofrequency signal; Described numerical-control attenuator II is HE751 chip, for controlling the decay of intermediate-freuqncy signal; Described frequency mixer is HSP-158, for radiofrequency signal is converted to intermediate-freuqncy signal; Described wave detector is AD8307 chip, for detecting the amplitude of intermediate-freuqncy signal; Described A/D converter is TLV1572, for intermediate frequency field strength indicating signal is converted to digital signal; Described variable gain amplifier is AD8370, for controlling the gain of intermediate-freuqncy signal; Described FPGA is Xilinx XC5VLX110T, the signal collecting and controlling function of completion system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420537300.9U CN204190712U (en) | 2014-09-18 | 2014-09-18 | A kind of ultrashort wave radio set automatic gain control circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420537300.9U CN204190712U (en) | 2014-09-18 | 2014-09-18 | A kind of ultrashort wave radio set automatic gain control circuit |
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| CN204190712U true CN204190712U (en) | 2015-03-04 |
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| CN201420537300.9U Withdrawn - After Issue CN204190712U (en) | 2014-09-18 | 2014-09-18 | A kind of ultrashort wave radio set automatic gain control circuit |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104202002A (en) * | 2014-09-18 | 2014-12-10 | 天津七一二通信广播有限公司 | FPGA (field programmable gate array) based digital AGC (automatic gain control) system and method of ultra-short wave radio set |
| CN105406881A (en) * | 2015-12-07 | 2016-03-16 | 中国电子科技集团公司第五十研究所 | Gain control device and method for table look-up way in software radio station |
| CN106160762A (en) * | 2016-06-28 | 2016-11-23 | 中国科学院微电子研究所 | Automatic gain control system and method for broadband receiver and broadband receiver |
| CN106413050A (en) * | 2016-06-20 | 2017-02-15 | 哈尔滨工业大学（威海） | NanoLOC wireless communication distance estimation and online assessment method |
| CN113949397A (en) * | 2021-10-28 | 2022-01-18 | 安徽隼波科技有限公司 | Gain-adjustable anti-interference broadband receiver |
-
2014
- 2014-09-18 CN CN201420537300.9U patent/CN204190712U/en not_active Withdrawn - After Issue
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104202002A (en) * | 2014-09-18 | 2014-12-10 | 天津七一二通信广播有限公司 | FPGA (field programmable gate array) based digital AGC (automatic gain control) system and method of ultra-short wave radio set |
| CN105406881A (en) * | 2015-12-07 | 2016-03-16 | 中国电子科技集团公司第五十研究所 | Gain control device and method for table look-up way in software radio station |
| CN105406881B (en) * | 2015-12-07 | 2018-12-28 | 中国电子科技集团公司第五十研究所 | The gain control and method of lookup table mode in software radio |
| CN106413050A (en) * | 2016-06-20 | 2017-02-15 | 哈尔滨工业大学（威海） | NanoLOC wireless communication distance estimation and online assessment method |
| CN106160762A (en) * | 2016-06-28 | 2016-11-23 | 中国科学院微电子研究所 | Automatic gain control system and method for broadband receiver and broadband receiver |
| CN106160762B (en) * | 2016-06-28 | 2021-03-12 | 中国科学院微电子研究所 | Automatic gain control system and method for broadband receiver and broadband receiver |
| CN113949397A (en) * | 2021-10-28 | 2022-01-18 | 安徽隼波科技有限公司 | Gain-adjustable anti-interference broadband receiver |
| CN113949397B (en) * | 2021-10-28 | 2022-12-27 | 安徽隼波科技有限公司 | Gain-adjustable anti-interference broadband receiver |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20150304 Effective date of abandoning: 20171212 |
|
| AV01 | Patent right actively abandoned |