CN104242835A - FPGA (field programmable gate array)-based ALC (automatic level control) system and method for ultra-short wave radio set - Google Patents
FPGA (field programmable gate array)-based ALC (automatic level control) system and method for ultra-short wave radio set Download PDFInfo
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Abstract
The invention relates to an FPGA (field programmable gate array)-based ALC (automatic level control) system and an FPGA-based ALC method for an ultra-short wave radio set. A transmission excitation signal is transmitted to a numerical control attenuator, and is subjected to the power amplification of a power amplification module, the amplitude of the excitation signal output by the power amplification module is detected by a directional coupler and a detector, the analogue signal is converted into a digital signal by an A/D (analogue/digital) converter, and the digital signal is transmitted to an FPGA. The FPGA is used for processing data to obtain an excitation signal amplitude average, i.e. a forward detection voltage value, by adopting a sliding window filtering algorithm, reading an ALC voltage reference value corresponding to a current working state from a memory according to current working frequency, comparing the forward detection voltage value and the ALC voltage reference value, further regulating the attenuation of the numerical control attenuator, and controlling the attenuation of the numerical control attenuator by virtue of a parallel physical line. According to the system and the method, the amplitude of the transmission excitation signal can be effectively kept within a more stable range, and a transmission power signal can be stably output.
Description
Technical field
The present invention relates to a kind of auto level control system, particularly a kind of ultrashort wave radio set ALC control system based on FPGA and method.
Background technology
In the design of the power amplifier module such as shortwave, ultrashort wave, if input range is excessive, after power amplifier amplifies, likely produce very large output signal and damage equipment.In order to overcome the above problems, a kind of ALC of simulation realizes the automatic level control circuit (Authorization Notice No.: CN202978829U) of power amplifier module with the utility model patent of authorizing, analogy method is adopted to realize power amplifier ALC control circuit, feed back to input by coupler circuit coupled signal to control analog attenuation lattice network, realize ALC auto level control.But the ALC underaction that this analogy method controls, and change slowly, and to be not suitable in ultrashort wave radio set in TDMA quickly networking applied environment.
Auto level control, be called for short ALC:Automatic Level Control, its effect is, when the amplitude of input signal in very large range fluctuates, by controlling the attenuation of attenuator or the gain of amplifier, making the amplitude of output signal remain constant or being stabilized in a constant scope.Namely when output signal value is greater than the reference level value of current setting, even if input signal increases again, output signal also remains at the output corresponding with current ALC controlling value, and the signal that this makes it possible to ensure to output to power amplifier module keeps stable, in order to avoid the excessive and damage equipment of power.
Thus, design a kind of can the control system of adjustment power amplifier power of fast and flexible, make when input signal power alters a great deal or alters a great deal on a certain frequency in certain frequency bandwidth range, output signal power still keeps stable digital ALC control system to seem particularly necessary in this frequency bandwidth.
Summary of the invention
In view of the deficiency that prior art exists, the invention provides a kind of ultrashort wave radio set ALC control system based on FPGA and method, the object of the invention is to carry out auto level control to the transmitting power in radio station, make to be input to sending out when pumping signal amplitude changes of power amplifier module and can ensure that output signal power keeps constant within the specific limits.
The present invention for achieving the above object, the technical scheme adopted is: a kind of ultrashort wave radio set ALC control system based on FPGA, it is characterized in that: comprise numerical-control attenuator, power amplifier module, directional coupler, wave detector, A/D converter, FPGA, memory, ARM, send out pumping signal and first send into numerical-control attenuator, power amplification is carried out by power amplifier module, the pumping signal amplitude of power amplifier output is detected through directional coupler and wave detector, this pumping signal amplitude is analog signal, convert this analog signal to digital signal by A/D converter, and send into FPGA; In order to ensure that signals collecting is accurate, FPGA adopts sliding window filtering algorithm to process the data after A/D conversion, and obtain pumping signal amplitude average value, this mean value is forward and detects magnitude of voltage; FPGA reads ALC voltage reference value corresponding to current operating state according to current operating frequency, forward is detected magnitude of voltage and ALC voltage reference value compares, and then the attenuation of adjustment numerical-control attenuator, by the attenuation of concurrent physical line traffic control numerical-control attenuator; ARM issues to FPGA and arranges query statement, arranges the ALC magnitude of voltage under inquiry current operating state and the decay code value of numerical-control attenuator in real time.
Based on a ultrashort wave radio set ALC control method of FPGA, it is characterized in that: concrete steps are:
(1) before system worked well, power operation to be put to system, be stored in the corresponding address of memory by the decay code preset value of numerical-control attenuator and ALC voltage reference value, concrete operations are: send different values to change signal attenuation by FPGA to numerical-control attenuator, FPGA calculates magnitude of voltage corresponding to performance number under each frequency, i.e. ALC voltage reference value AFWDini, when stable output power is at steady state value, ARM issues control command to FPGA, ALC voltage reference value AFWDini and decay code preset value ATT is stored in the corresponding address of memory according to current operating frequency by FPGA,
(2) system is when normally working, send out pumping signal and be first admitted to numerical-control attenuator, then power amplification process is carried out through power amplifier module, transmission power intensity is increased so that expand transmitting boundary, directional coupler detects power amplifier module pumping signal of sending out out, and to FPGA after the forward power detection signal detected being carried out A/D conversion;
(3) in order to ensure that signals collecting is accurate, FPGA does the filtering algorithm process of a sliding window to the data after A/D conversion, calculates mean value, obtains current forward and detects magnitude of voltage AFWD;
(4) FPGA reads ALC voltage reference value AFWDini corresponding to current operating state according to current operating frequency from memory, forward is detected magnitude of voltage and ALC voltage reference value compares, and then the attenuation of adjustment numerical-control attenuator;
(5) first operating frequency is judged, and the forward after sampling is detected magnitude of voltage compared with the ALC voltage reference value of ongoing frequency, wherein voltage difference V0 is a historical experience value, be generally 0.05V, AFWD is that forward detects magnitude of voltage, AFWDini is ALC voltage reference value, adjusts as follows according to comparative result:
If AFWD-AFWDini>=+V0, then should reduce power, make the decay code preset value ATT of numerical-control attenuator add 1,
If AFWD-AFWDini<=-V0, then answer increasing power, make the decay code preset value ATT of numerical-control attenuator subtract 1,
If-V0<AFWD-AFWDini<+V0, then do not change power, the decay code preset value of numerical-control attenuator is remained unchanged;
(6) in real-time adjustment process, the decay code value issuing ALC magnitude of voltage under query statement real-time query current operating state and numerical-control attenuator to FPGA by ARM, is beneficial to designer and adjusts radio station putting maintenance into practice;
Adjusted by above-mentioned steps, can ensure that input sends out pumping signal when wide variation, the radiofrequency signal of output still maintains in constant range, thus reaches the object of radio station transmitting power stable output.
The present invention has positive effect: (1) the present invention adopts digital form control ALC system, accurately can regulate and send out pumping signal level value, there is fast response time, control is flexible, control circuit is simple, is convenient to the advantages such as software real-time upgrading and online modification.(2) attenuation by controlling numerical-control attenuator changes the pumping signal amplitude being input to power amplifier module, thus reaches the object of stable output signal power.
Accompanying drawing explanation
Fig. 1 is that system of the present invention realizes block diagram;
Fig. 2 is ALC control method flow chart of the present invention.
Embodiment
As shown in Figure 1, a kind of ultrashort wave radio set ALC control system based on FPGA, comprises numerical-control attenuator, power amplifier module, directional coupler, wave detector, A/D converter, FPGA, memory and ARM.
Send out pumping signal and first send into numerical-control attenuator, carry out power amplification by power amplifier module, detect the pumping signal amplitude of power amplifier output through directional coupler and wave detector, this pumping signal amplitude is analog signal, convert this analog signal to digital signal by A/D converter, and send into FPGA; In order to ensure that signals collecting is accurate, FPGA adopts sliding window filtering algorithm to process the data after A/D conversion, and obtain pumping signal amplitude average value, this mean value is forward and detects magnitude of voltage; FPGA reads ALC voltage reference value corresponding to current operating state according to current operating frequency from memory, forward is detected magnitude of voltage and ALC voltage reference value compares, and then the attenuation of adjustment numerical-control attenuator, by the attenuation of concurrent physical line traffic control numerical-control attenuator; ARM issues to FPGA and arranges query statement, arranges the ALC magnitude of voltage under inquiry current operating state and the decay code value of numerical-control attenuator in real time.
Send out after pumping signal amplified by power amplifier module, output drive signal amplitude is detected by directional coupler, after A/D converter, send into FPGA carry out data processing, FPGA reads ALC voltage reference value corresponding to current operating state according to current operating frequency from memory, forward is detected magnitude of voltage and ALC voltage reference value compares, by the attenuation of concurrent physical line traffic control numerical-control attenuator, ensure that output signal power keeps constant within the specific limits.
A/D converter is connected by SPI interface with FPGA; Memory and FPGA pass through I
2c interface connects; ARM and FPGA is connected by asynchronous serial port; Numerical-control attenuator is connected by concurrent physical line with FPGA.
Numerical-control attenuator has 32 grades, decay stepping 0.5dB.
Numerical-control attenuator is HE751 device, for controlling the decay sending out pumping signal; Power amplifier module is PA030512120 device, for power amplification; Directional coupler is DBTC-18-4-75LX device, for flowing to monitoring and the sampling of radiofrequency signal; Wave detector is AD8307 device, for detecting pumping signal amplitude; A/D converter is TLV1572 device, is converted to digital signal for forward is detected voltage analog signal; FPGA is Spartan-6 XC6SLX45 device, for control ALC system; Memory is M95512 device, for storing ALC voltage reference value and decay code preset value; ARM is DM3730CUSUA100 device, for issuing the decay code value of ALC magnitude of voltage under query statement real-time query current operating state and numerical-control attenuator to FPGA.
As shown in Figure 2, a kind of ultrashort wave radio set ALC control method based on FPGA, concrete steps are:
(1) before system worked well, power operation to be put to system, be stored in the corresponding address of memory by the decay code preset value of numerical-control attenuator and ALC voltage reference value, concrete operations are: send different values to change signal attenuation by FPGA to numerical-control attenuator, FPGA calculates magnitude of voltage corresponding to performance number under each frequency, i.e. ALC voltage reference value AFWDini, when stable output power is at steady state value, ARM issues control command to FPGA, ALC voltage reference value AFWDini and decay code preset value ATT is stored in the corresponding address of memory according to current operating frequency by FPGA,
(2) system is when normally working, send out pumping signal and be first admitted to numerical-control attenuator, then power amplification process is carried out through power amplifier module, transmission power intensity is increased so that expand transmitting boundary, directional coupler detects power amplifier module pumping signal of sending out out, and to FPGA after the forward power detection signal detected being carried out A/D conversion;
(3) in order to ensure that signals collecting is accurate, FPGA does the filtering algorithm process of a sliding window to the data after A/D conversion, calculates mean value, obtains current forward and detects magnitude of voltage AFWD;
(4) FPGA reads ALC voltage reference value AFWDini corresponding to current operating state according to current operating frequency from memory, forward is detected magnitude of voltage and ALC voltage reference value compares, and then the attenuation of adjustment numerical-control attenuator;
(5) first operating frequency is judged, and the forward after sampling is detected magnitude of voltage compared with the ALC voltage reference value of ongoing frequency, wherein voltage difference V0 is a historical experience value, be generally 0.05V, AFWD is that forward detects magnitude of voltage, AFWDini is ALC voltage reference value, adjusts as follows according to comparative result:
If AFWD-AFWDini>=+V0, then should reduce power, make the decay code preset value ATT of numerical-control attenuator add 1,
If AFWD-AFWDini<=-V0, then answer increasing power, make the decay code preset value ATT of numerical-control attenuator subtract 1,
If-V0<AFWD-AFWDini<+V0, then do not change power, the decay code preset value of numerical-control attenuator is remained unchanged;
(6) in real-time adjustment process, the decay code value issuing ALC magnitude of voltage under query statement real-time query current operating state and numerical-control attenuator to FPGA by ARM, is beneficial to designer and adjusts radio station putting maintenance into practice;
Adjusted by above-mentioned steps, can ensure that input sends out pumping signal when wide variation, the radiofrequency signal of output is still tieed up
Be held in constant range, thus reach the object of radio station transmitting power stable output.
The present invention can realize following function: (1) FPGA reads ALC voltage reference value corresponding to current operating state according to present operating frequency, forward is detected voltage and ALC voltage reference value compares, and then the attenuation of adjustment numerical-control attenuator, namely change the pumping signal amplitude being input to power amplifier, thus reach the object of stable radio station transmitting power; (2) the present invention to issue to FPGA by ARM and arranges query statement and change in real time or the decay code value of the ALC magnitude of voltage inquired about under current operating state and numerical-control attenuator, is beneficial to designer's on-line maintenance.(3) adopt digital form control ALC system, accurately can regulate and send out pumping signal level value, there is fast response time, control is flexible, control circuit is simple, is convenient to the advantage such as software real-time upgrading and online modification maintenance.
In sum, above embodiment is only in order to illustrate that technical scheme of the present invention is not intended to limit; All based on above-mentioned basic ideas, do not depart from the various change and modification done in this creation spirit and scope, all should belong to scope disclosed in this invention.
Claims (5)
1. the ultrashort wave radio set ALC control system based on FPGA, it is characterized in that: comprise numerical-control attenuator, power amplifier module, directional coupler, wave detector, A/D converter, FPGA, memory, ARM, send out pumping signal and first send into numerical-control attenuator, power amplification is carried out by power amplifier module, the pumping signal amplitude of power amplifier output is detected through directional coupler and wave detector, this pumping signal amplitude is analog signal, convert this analog signal to digital signal by A/D converter, and send into FPGA; In order to ensure that signals collecting is accurate, FPGA adopts sliding window filtering algorithm to process the data after A/D conversion, and obtain pumping signal amplitude average value, this mean value is forward and detects magnitude of voltage; FPGA reads ALC voltage reference value corresponding to current operating state according to current operating frequency, forward is detected magnitude of voltage and ALC voltage reference value compares, and then the attenuation of adjustment numerical-control attenuator, by the attenuation of concurrent physical line traffic control numerical-control attenuator; ARM issues to FPGA and arranges query statement, arranges the ALC magnitude of voltage under inquiry current operating state and the decay code value of numerical-control attenuator in real time.
2. a kind of ultrashort wave radio set ALC control system based on FPGA according to claim 1, is characterized in that: described A/D converter is connected by SPI interface with FPGA; Described memory and FPGA pass through I
2c interface connects; Described ARM and FPGA is connected by asynchronous serial port; Numerical-control attenuator is connected by concurrent physical line with FPGA.
3. a kind of ultrashort wave radio set ALC control system based on FPGA according to claim 1, is characterized in that: described numerical-control attenuator has 32 grades, decay stepping 0.5dB.
4. a kind of ultrashort wave radio set ALC control system based on FPGA according to claim 1, is characterized in that: described numerical-control attenuator is HE751 device; Described power amplifier module is PA030512120 device; Described directional coupler is DBTC-18-4-75LX device; Described wave detector is AD8307 device; Described A/D converter is TLV1572 device; Described memory is M95512 device; Described FPGA is Spartan-6 XC6SLX45 device; Described ARM is DM3730CUSUA100 device.
5., based on a ultrashort wave radio set ALC control method of FPGA, it is characterized in that: concrete steps are:
(1) before system worked well, power operation to be put to system, be stored in the corresponding address of memory by the decay code preset value of numerical-control attenuator and ALC voltage reference value, concrete operations are: send different values to change signal attenuation by FPGA to numerical-control attenuator, FPGA calculates magnitude of voltage corresponding to performance number under each frequency, i.e. ALC voltage reference value AFWDini, when stable output power is at steady state value, ARM issues control command to FPGA, ALC voltage reference value AFWDini and decay code preset value ATT is stored in the corresponding address of memory according to current operating frequency by FPGA,
(2) system is when normally working, send out pumping signal and be first admitted to numerical-control attenuator, then power amplification process is carried out through power amplifier module, transmission power intensity is increased so that expand transmitting boundary, directional coupler detects power amplifier module pumping signal of sending out out, and to FPGA after the forward power detection signal detected being carried out A/D conversion;
(3) in order to ensure that signals collecting is accurate, FPGA does the filtering algorithm process of a sliding window to the data after A/D conversion, calculates mean value, obtains current forward and detects magnitude of voltage AFWD;
(4) FPGA reads ALC voltage reference value AFWDini corresponding to current operating state according to current operating frequency from memory, forward is detected magnitude of voltage and ALC voltage reference value compares, and then the attenuation of adjustment numerical-control attenuator;
(5) first operating frequency is judged, and the forward after sampling is detected magnitude of voltage compared with the ALC voltage reference value of ongoing frequency, wherein voltage difference V0 is a historical experience value, be generally 0.05V, AFWD is that forward detects magnitude of voltage, AFWDini is ALC voltage reference value, adjusts as follows according to comparative result:
If AFWD-AFWDini>=+V0, then should reduce power, make the decay code preset value ATT of numerical-control attenuator add 1,
If AFWD-AFWDini<=-V0, then answer increasing power, make the decay code preset value ATT of numerical-control attenuator subtract 1,
If-V0<AFWD-AFWDini<+V0, then do not change power, the decay code preset value of numerical-control attenuator is remained unchanged;
(6) in real-time adjustment process, the decay code value issuing ALC magnitude of voltage under query statement real-time query current operating state and numerical-control attenuator to FPGA by ARM, is beneficial to designer and adjusts radio station putting maintenance into practice;
Adjusted by above-mentioned steps, can ensure that input sends out pumping signal when wide variation, the radiofrequency signal of output still maintains in constant range, thus reaches the object of radio station transmitting power stable output.
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| CN114415778A (en) * | 2022-01-14 | 2022-04-29 | 中国电子科技集团公司第十研究所 | Automatic debugging method for ALC loop parameters |
| CN114415778B (en) * | 2022-01-14 | 2023-06-27 | 中国电子科技集团公司第十研究所 | ALC loop parameter automatic debugging method |
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Address after: 300462 Binhai New Area, Tianjin economic and Technological Development Zone, North Street, No. 141 Applicant after: Tianjin 712 Communications Broadcasting Limited by Share Ltd Address before: 300462 Binhai New Area, Tianjin economic and Technological Development Zone, North Street, No. 141 Applicant before: Tianjin 712 Communication Broadcast Co., Ltd. |
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