CN204103930U - Simple and easy digital data transmission performance evaluation instrument - Google Patents
Simple and easy digital data transmission performance evaluation instrument Download PDFInfo
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- CN204103930U CN204103930U CN201420590053.9U CN201420590053U CN204103930U CN 204103930 U CN204103930 U CN 204103930U CN 201420590053 U CN201420590053 U CN 201420590053U CN 204103930 U CN204103930 U CN 204103930U
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Abstract
The utility model discloses a kind of simple and easy digital data transmission performance evaluation instrument, comprise digital signal generation module, pseudo-random signal generation module, described digital signal generation module connects a signal input part of adder Module through low-pass filtering module, described pseudo-random signal generation module is through another signal input part of attenuation network model calling adder Module, the signal output part of this adder Module is through noise processed model calling digital signal processing module signal input part, digital signal generation module is also connected with another signal input part of described digital signal processing module, the output of described digital signal processing module is connected with eye pattern display module.Its remarkable result is: peripheral circuit is simple, reliable and stable, ensureing the accurate of signal phase, improve the anti-interference of signal, ensure that the accuracy that transmission performance detects by arranging noise processed module by arranging attenuation network.
Description
Technical field
The utility model relates to digital signal transmission technique field, specifically, is a kind of simple and easy digital data transmission performance evaluation instrument.
Background technology
Because digital signal can be subject to the impact of the factor such as transmission line impedance and noise in the process of transmission, signal is made to occur to propagate the phenomenons such as decline, intersymbol interference, contiguous radio frequency channel interference, existing digital data transmission performance evaluation instrument is only applicable to specific occasion mostly, along with the extensive use of digital transmission technology, need parameter and the debugging of more various communication test instrument completion system parameter.Digital Transmission performance evaluation instrument is as a kind of equipment of digital communication system design and test, play an important role in the engineering construction and regular maintenance of digital transmission system, it is the most basic in digital communication, most important tester, by it, transmission equipment is detected, thus make staff can more rapidly, find problem root more easily.
In prior art, the circuit structure that common simple and easy digital data transmission performance evaluation instrument adopts is usually as Chinese patent CN 202872801U is disclosed, digital signal generator module is adopted to produce digital signal sequences as derived digital signal, analogue transmission channels is carried out by low pass filter and pseudo-random signal generator module, then export two paths of signals after digital signal processing module processing signals, observe the eye pattern of two paths of signals finally by eye pattern display module.But its defect existed is: the phase place of pseudo-random signal is not accurate enough, the signal noise before data analysis is comparatively large, and the anti-interference of signal is poor, affects the accuracy of Digital Transmission Performance Detection.
Utility model content
For the deficiencies in the prior art, the purpose of this utility model is to provide a kind of simple and easy digital data transmission performance evaluation instrument, this analyzer structure is simple, stable performance, by the decay of attenuation network analog channel, by noise processed module, signal is carried out removal noise processed, analysis result is accurately clear.
For achieving the above object, a kind of simple and easy digital data transmission performance evaluation instrument of the utility model statement, comprise digital signal generation module, pseudo-random signal generation module, low-pass filtering module, adder Module, digital signal processing module and eye pattern display module, described digital signal generation module is for generation of digital signal sequences, described low pass filter blocks and pseudo-random signal generation module are respectively used to amplitude-frequency characteristic and the noise of analog channel, described adder Module is used for the superposition of digital signal and noise, described digital signal processing module is used for process to received signal and exports two paths of signals, described eye pattern display module is for observing the eye pattern of the two paths of signals exported from digital signal processing module, good and bad with the performance weighing digital signal transmission system, its key is: described digital signal generation module connects a signal input part of adder Module through low-pass filtering module, described pseudo-random signal generation module is through another signal input part of attenuation network model calling adder Module, the signal output part of this adder Module is through the signal input part of digital signal processing module described in noise processed model calling, described digital signal generation module is also connected with another signal input part of described digital signal processing module, the output of described digital signal processing module is connected with described eye pattern display module,
Described attenuation network module adopts T-shaped resistance decrement network, comprise resistance R1, one end of this resistance R1 is connected with the signal output part of described pseudo-random signal generation module, connects a signal input part of described adder Module after the other end crosstalk resistance R2 of this resistance R1;
Described noise processed module adopts MAX913 chip, first pin of this chip connects 5V positive direct-current power supply, 3rd pin is connected with the signal output part of described adder Module through resistance R1, 4th pin meets 5V and bears DC power supply, ground connection after 5th pin and the 6th pin serial connection, 7th pin connects the signal input part of described digital signal processing module through resistance R3, 7th pin also crosstalk is connected with the second pin after hindering R4, the public connecting end of resistance R4 and the second pin is ground connection after series resistor R2 also, 7th pin is also connected with the anode of voltage stabilizing didoe D1, the negative electrode of voltage stabilizing didoe D1 is connected with the negative electrode of voltage stabilizing didoe D2, the plus earth of voltage stabilizing didoe D2.
When practice, the digital signal sequences that digital signal generation module produces sends into an input of adder Module after low-pass filtering module, pseudo-random signal generation module produces a pseudo-random signal sequences as analogue noise signal, and carry out through attenuation network module another input that analog channel attenuation processing sends into adder Module, the superposed signal that adder Module exports sends into digital signal processing module after the denoising of noise processed module, digital signal processing module carries out frequency abstraction to the clock signal that the signal after denoising and digital signal generation module send and exports two paths of signals respectively, one tunnel is the synchronizing clock signals extracted from analogue transmission channels, one tunnel exports data sequence, then intersymbol interference and noise is analyzed on the impact of digital signal transmission system performance by eye pattern display module, thus the performance weighing this system is good and bad.One's duty analyzer peripheral circuit is simple, reliable and stable, ensureing the accurate of signal phase, improve the anti-interference of signal, ensure that the accuracy that transmission performance detects by arranging noise processed module by arranging attenuation network.
Be connected with single-chip microcomputer at the control signal input of described digital signal generation module, the signal output part of this single-chip microcomputer is also connected with display screen.
By arranging said structure, can easily the data transfer rate of digital signal generating module, Signal coding information be controlled and be gathered, and be shown by display screen.
Described digital signal generation module and pseudo-random signal generation module all adopt fpga chip.
Utilize FPGA to design generation digital signal sequences generator Measures compare easy, be easy to realize the longer digital signal sequences of figure place, also can practical function emulation and analog simulation.
The data transfer rate of the digital signal sequences that described digital signal generation module exports is 10 ~ 100Kbps, and it is adjustable to press 10Kbps; The data transfer rate of the pseudo-random signal sequences that described pseudo-random signal generator module exports is 10Mbps, and peak-to-peak value is 100mV.
Described low-pass filtering module adopts three active filter circuit compositions, and the cut-off frequency of three active filter circuits is respectively 100kHz, 200kHz and 500KHz, and attenuation outside a channel is 60dB/ ten frequency multiplication.
Low-pass filtering module adopts active filter circuit composition, and can make output voltage at high band with speed decline faster, filter effect improves.
Described adder Module comprises two pieces of 0P27 chips and one piece of AD827 chip, wherein one piece of 0P27 chip and AD827 chip form front stage circuits, respectively as the follower of primary signal and noise signal, another block 0P27 chip forms late-class circuit, adopts the mode of homophase input to superpose primary signal and noise signal.
Observe intersymbol interference and noise conveniently, intuitively to the impact of systematic function, thus draw the transmission performance of digital signal, described eye pattern display module adopts oscilloscope.
Remarkable result of the present utility model is: peripheral circuit is simple, reliable and stable, ensureing the accurate of signal phase, improve the anti-interference of signal, ensure that the accuracy that transmission performance detects by arranging noise processed module by arranging attenuation network module.
Accompanying drawing explanation
Fig. 1 is schematic block circuit diagram of the present utility model;
Fig. 2 is the circuit theory diagrams of attenuation network in Fig. 1;
Fig. 3 is the circuit theory diagrams of noise processed module;
The active filter circuit schematic diagram of Fig. 4 to be cut-off frequency be 100KHz;
The active filter circuit schematic diagram of Fig. 5 to be cut-off frequency be 200KHz;
The active filter circuit schematic diagram of Fig. 6 to be cut-off frequency be 500KHz;
Fig. 7 is the circuit theory diagrams of adder.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present utility model and operation principle are described in further detail.
As shown in Figure 1, a kind of simple and easy digital data transmission performance evaluation instrument, comprise digital signal generator, pseudo-random signal generator, low pass filter, adder, Digital Signal Analysis circuit and eye pattern display module, a signal output part of described digital signal generator is connected a signal input part of adder successively with electric capacity through low pass filter, described pseudo-random signal generator connects another signal input part of adder through attenuation network, the signal output part of this adder is through the signal input part of Digital Signal Analysis circuit described in noise processed model calling, described digital signal generator is also connected with another signal input part of described Digital Signal Analysis circuit, the output of described Digital Signal Analysis circuit is connected with described eye pattern display module, be connected with STC89C51 single-chip microcomputer at the control signal input of described digital signal generator, the signal output part of this single-chip microcomputer is also connected with LCD display.
Described Single-chip Controlling digital signal generator generates data transfer rate and the type of coding of signal; Described digital signal generator is for generation of the digital signal sequences as derived digital signal; Described low pass filter blocks and pseudo-random signal generation module are respectively used to amplitude-frequency characteristic and the noise of analog channel; Described adder Module is used for the superposition of digital signal and noise; Described noise processed module is for removing noise jamming; Described Digital Signal Analysis circuit is used for carrying out frequency abstraction to signal after denoising and clock signal, and exports two paths of signals; Described eye pattern display module is for observing the eye pattern of the two paths of signals exported from digital signal processing module, good and bad with the performance weighing digital signal transmission system.Wherein, Digital Signal Analysis circuit adopts fpga chip to carry out frequency abstraction.
In this example, the m sequence digital signal that described digital signal generator adopts fpga chip to produce is as derived digital signal, the m Sequence pseudo random digital signal that described pseudo-random signal generator adopts fpga chip to produce is as noise signal, the data transfer rate of the digital signal sequences that described digital signal generator exports is 10 ~ 100Kbps, and it is adjustable to press 10Kbps; The data transfer rate of the pseudo-random signal sequences that described pseudo-random signal generator exports is 10Mbps, and peak-to-peak value is 100mV.
M sequence is commonly used a linear shift register with feedback network and is produced, known by digital knowledge, n level linear shift register has 2n kind state, by feedback control for networked control shift register by the recurrent state of the 2n-1 kind state except complete " 0 " state as linear shift register.
The key of structure m sequencer determines the feedback network of its n level shift register, and the relation of feedback network and register at different levels can represent f (x)=1+C1X+C2X with a n level multinomial
2+ ... + Cn-1X
n-1+ CnX
n, in formula, Ci (i=1,2 ..., n-1) represent and the connection of shift register and feedback network indicate connection during Ci=1, on the contrary be that f (x) is called the generator polynomial of M sequence without connecting.
Derived digital signal is expressed as f1 (x)=1+X
2+ X
3+ X
4+ X
8, then n=8, m sequence length is 255; Pseudo-random signal is expressed as f2 (x)=1+X+X
4+ X
5+ X
12, then n=12, m sequence length is 4095.
As shown in Figure 2, described attenuation network adopts T-shaped resistance decrement network, comprise resistance R1, one end of this resistance R1 is connected with the signal output part of described pseudo-random signal generator, connects a signal input part of described adder after the other end crosstalk resistance R2 of this resistance R1.
As shown in Figure 3, described noise processed module adopts MAX913 chip, first pin of this chip connects 5V positive direct-current power supply, 3rd pin is connected with the signal output part of described adder Module through resistance R1, 4th pin meets 5V and bears DC power supply, ground connection after 5th pin and the 6th pin serial connection, 7th pin connects the signal input part of described digital signal processing module through resistance R3, 7th pin also crosstalk is connected with the second pin after hindering R4, the public connecting end of resistance R4 and the second pin is ground connection after series resistor R2 also, 7th pin is also connected with the anode of voltage stabilizing didoe D1, the negative electrode of voltage stabilizing didoe D1 is connected with the negative electrode of voltage stabilizing didoe D2, the plus earth of voltage stabilizing didoe D2.
As Figure 4-Figure 6, three active filter circuits that described low pass filter is built by one piece of OP27 chip and one piece of AD827 chip form, and in figure, U1 is OP27 chip, and U2A and U2B is two operational amplifiers in one piece of AD827 chip; The cut-off frequency of three active filter circuits is respectively 100kHz, 200kHz and 500KHz, and attenuation outside a channel is 60dB/ ten frequency multiplication.
As shown in Figure 7, described adder comprises two pieces of 0P27 chips and one piece of AD827 chip, wherein one piece of 0P27 chip and one piece of AD827 chip form front stage circuits, respectively as the follower of primary signal and noise signal, another block 0P27 chip forms late-class circuit, adopts the mode of homophase input to superpose primary signal and noise signal.
In the present embodiment, described eye pattern display module adopts oscilloscope.
This programme operation principle is:
The digital signal sequences that digital signal generator produces carries out Synchronization, then after low pass filter, send into an input of adder Module, pseudo-random signal generator produces a pseudo-random signal sequences as analogue noise signal, and after attenuation network processes, send into another input of adder, the two paths of signals of adder to input carries out overlap-add procedure, and Digital Signal Analysis circuit is sent into after the denoising of noise processed module, Digital Signal Analysis circuit carries out frequency abstraction to the clock signal that the signal after denoising and digital signal generator send and exports two paths of signals respectively, one tunnel is the synchronizing clock signals extracted from analogue transmission channels, one tunnel exports data sequence, then the two paths of signals of digitalsignalanalyzer output is observed by oscilloscope,
Without intersymbol interference and noise ideally, waveform is undistorted, and each code element will overlap, finally on oscilloscope it is seen that border line not only carefully but also clearly " eyes ", " eye " is opened maximum.When there being intersymbol interference, wave distortion, code element not exclusively overlaps, and the border line of eye pattern will be unintelligible, causes " eye " part closed.If add the impact of noise, then make the lines of eye pattern thicken, " eye " is opened little, and therefore, the size that " eye " opens illustrates the degree of distortion, reflects the power of intersymbol interference.Thus, the size of opening according to " eye " on eye pattern can show the impact of intersymbol interference and noise intuitively, thus evaluates the quality of a digital signal transmission system performance.
Claims (7)
1. a simple and easy digital data transmission performance evaluation instrument, comprise digital signal generation module, pseudo-random signal generation module, low-pass filtering module, adder Module, digital signal processing module and eye pattern display module, described digital signal generation module is for generation of digital signal sequences, described low pass filter blocks and pseudo-random signal generation module are respectively used to amplitude-frequency characteristic and the noise of analog channel, described adder Module is used for the superposition of digital signal and noise, described digital signal processing module is used for process to received signal and exports two paths of signals, described eye pattern display module is for observing the eye pattern of the two paths of signals exported from digital signal processing module, good and bad with the performance weighing digital signal transmission system, it is characterized in that: a signal output part of described digital signal generation module connects a signal input part of adder Module through low-pass filtering module, described pseudo-random signal generation module is through another signal input part of attenuation network model calling adder Module, the signal output part of this adder Module is through the signal input part of digital signal processing module described in noise processed model calling, described digital signal generation module is also connected with another signal input part of described digital signal processing module, the output of described digital signal processing module is connected with described eye pattern display module,
Described attenuation network module adopts T-shaped resistance decrement network, comprise resistance R1, one end of this resistance R1 is connected with the signal output part of described pseudo-random signal generation module, connects a signal input part of described adder Module after the other end crosstalk resistance R2 of this resistance R1;
Described noise processed module adopts MAX913 chip, first pin of this chip connects 5V positive direct-current power supply, 3rd pin is connected with the signal output part of described adder Module through resistance R1, 4th pin meets 5V and bears DC power supply, ground connection after 5th pin and the 6th pin serial connection, 7th pin connects the signal input part of described digital signal processing module through resistance R3, 7th pin also crosstalk is connected with the second pin after hindering R4, the public connecting end of resistance R4 and the second pin is ground connection after series resistor R2 also, 7th pin is also connected with the anode of voltage stabilizing didoe D1, the negative electrode of voltage stabilizing didoe D1 is connected with the negative electrode of voltage stabilizing didoe D2, the plus earth of voltage stabilizing didoe D2.
2. simple and easy digital data transmission performance evaluation instrument according to claim 1, is characterized in that: be connected with single-chip microcomputer at the control signal input of described digital signal generation module, the signal output part of this single-chip microcomputer is also connected with display screen.
3. simple and easy digital data transmission performance evaluation instrument according to claim 1, is characterized in that: described digital signal generation module and pseudo-random signal generation module all adopt fpga chip.
4. simple and easy digital data transmission performance evaluation instrument according to claim 3, is characterized in that: the data transfer rate of the digital signal sequences that described digital signal generation module exports is 10 ~ 100Kbps, and it is adjustable to press 10Kbps; The data transfer rate of the pseudo-random signal sequences that described pseudo-random signal generation module exports is 10Mbps, and peak-to-peak value is 100mV.
5. simple and easy digital data transmission performance evaluation instrument according to claim 1, it is characterized in that: described low-pass filtering module adopts three active filter circuit compositions, the cut-off frequency of three active filter circuits is respectively 100kHz, 200kHz and 500KHz, and attenuation outside a channel is 60dB/ ten frequency multiplication.
6. simple and easy digital data transmission performance evaluation instrument according to claim 1, it is characterized in that: described adder Module comprises two pieces of 0P27 chips and one piece of AD827 chip, wherein one piece of 0P27 chip and AD827 chip form front stage circuits, respectively as the follower of primary signal and noise signal, another block 0P27 chip forms late-class circuit, adopts the mode of homophase input to superpose primary signal and noise signal.
7. simple and easy digital data transmission performance evaluation instrument according to claim 1, is characterized in that: described eye pattern display module adopts oscilloscope.
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| CN109471112A (en) * | 2018-10-10 | 2019-03-15 | 浙江大学 | It is a kind of can acoustic resistive wave interference ultrasonic distance-measuring sensor and its distance measuring method |
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| CN109471112A (en) * | 2018-10-10 | 2019-03-15 | 浙江大学 | It is a kind of can acoustic resistive wave interference ultrasonic distance-measuring sensor and its distance measuring method |
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