CN204089752U - A kind of ultrahigh speed time sequence control device - Google Patents
A kind of ultrahigh speed time sequence control device Download PDFInfo
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- CN204089752U CN204089752U CN201420474360.0U CN201420474360U CN204089752U CN 204089752 U CN204089752 U CN 204089752U CN 201420474360 U CN201420474360 U CN 201420474360U CN 204089752 U CN204089752 U CN 204089752U
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- backward counter
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Abstract
The utility model belongs to the real-time control field of ballistic range ultrahigh speed, relate to ultrahigh speed time sequence control device, control device is made up of four-way trigger, two class frequency generators, two groups of forward-backward counters, one group of register, one group of display selection, decoder and one group of control circuit; The utility model adopts LSTTL integrated circuit composition, and compared to existing programmable logic device, not only cost is low, and structure is simple; Basis of the present utility model adopts four kinds of control models combine, delays time to control is easy to adjust and control precision is high.
Description
Technical field
The invention belongs to the real-time control field of ballistic range ultrahigh speed, relate to a kind of ultrahigh speed time sequence control device.
Background technology
Ballistic range is one of important tests equipment of the experimental study such as aerodynamic force, reentry physics phenomenon, hypervelocity impact carrying out guided missile, rocket, satellite, airship and other super speed vehicles.At present, making a video recording to the model of high-speed flight in ballistic range needs the light source flash of light moment to testing equipment accurately to control, in ballistic range test, the test section limited length because model flight speed is very high, the duration that model moves in test section is very short, usually only has a millisecond magnitude.
At present, in ballistic range, sequencing control has multiple device, such as arranges delay time to realize the instantaneous measurement of testing equipment to high-speed flight target, is undertaken calculating and time delay by a series of control circuit, and carves output control triggering signal in due course.But also do not have a kind of namely simple, with low cost again at present, and control accurate and changeable device.
Summary of the invention
The object of this invention is to provide a kind of simple, cost is low, and controls the time sequence control device of transient working starting time of accurate and changeable control testing equipment.
To achieve the above object of the invention, the invention provides a kind of ultrahigh speed time sequence control device, comprise control circuit and crystal oscillator, input parallel connection access the first trigger, the second trigger, the 3rd trigger, the 4th trigger, first frequency generator and the second frequency generator of control circuit, the output access control circuit of crystal oscillator;
Can phase trans-substitution between first trigger, the second trigger, the 3rd trigger, the 4th trigger;
The output of control circuit is connected in parallel the first forward-backward counter and the second forward-backward counter, described control circuit is used for controlling by way of the first trigger as maincenter, second trigger, the signal of the 3rd trigger or the 4th trigger enters addition or the subtraction of the first forward-backward counter or the second forward-backward counter and the first forward-backward counter and the second forward-backward counter, the output of the first forward-backward counter is connected in parallel the first output circuit and register, register output connects display and selects, the output of the second forward-backward counter is connected in parallel the second output circuit and display is selected, display selects output to connect decoder, decoder connects display,
First dial switch accesses the first inverter, and the first inverter accesses the first forward-backward counter, and the second dial switch accesses the second inverter, and the second inverter accesses the second forward-backward counter.
Preferably, the output of crystal oscillator accesses first frequency generator and second frequency generator respectively, first frequency generator and second frequency generator access control circuit.
Further, described crystal oscillator is the crystal oscillator of master clock frequency 8MHz, produces the clock of 1MHz after first frequency generator and second frequency generator frequency division.
Preferably, the output of the first forward-backward counter connects first and overflows indicating circuit, and the output of the second forward-backward counter connects second and overflows indicating circuit.
The present invention adopts LSTTL integrated circuit to form, and not only cost is low, and structure is simple; The present invention derives four kinds of control models, and according to the work of the time delay interval control testing equipment that signal exports, not only delays time to control regulable control precision is high, and mode is changeable, is easy to operation.
Accompanying drawing explanation
Fig. 1 is the logic diagram of circuit of time sequence control device of the present invention.
Fig. 2 is four input control pattern diagram.
Fig. 3 is three input control pattern diagram.
Fig. 4 is two input control pattern diagram.
Fig. 5 is an input control pattern diagram.
Embodiment
A kind of high speed time sequence control device, as shown in Figure 1, comprise control circuit 5 and crystal oscillator 8, input parallel connection access the first trigger 1, second trigger 2, the 3rd trigger 3, the 4th trigger 4, first frequency generator 6 and the second frequency generator 7 of control circuit 5, output access control circuit 5, first frequency generator 6 and the second frequency generator 7 respectively of crystal oscillator 8;
Can phase trans-substitution between first trigger 1, second trigger 2, the 3rd trigger 3, the 4th trigger 4;
The output of control circuit 5 is connected in parallel the first forward-backward counter 11 and the second forward-backward counter 14, described control circuit 5 is used for controlling by way of the first trigger 1 as maincenter, second trigger 2, the signal of the 3rd trigger 3 or the 4th trigger (4) enters addition or the subtraction of the first forward-backward counter 11 or the second forward-backward counter 14 and the first forward-backward counter 11 and the second forward-backward counter 14, the output of the first forward-backward counter 11 is connected in parallel the first output circuit 19, first overflows indicating circuit 18 and register 12, register 12 output connects display selection 13, the output of the second forward-backward counter 14 is connected in parallel the second output circuit 22, second overflows indicating circuit 21 and display selection 13, display selection 13 output connects decoder 17, decoder 17 connects display 20,
First dial switch 9 accesses the first inverter 10, first inverter 10 and accesses the first forward-backward counter 11, second dial switch 16 and access the second inverter 15, second inverter 15 and access the second forward-backward counter 14.
For the first trigger 1, when sequential triggering signal is carried in the first trigger 1, first trigger 1 level upset, output becomes low level, after next clock leading edge arrives, the first trigger 1 level upset, its output becomes high level, be sent to control circuit 5, control the first forward-backward counter 11 and the second forward-backward counter 14 works.
Because clock frequency is that the crystal oscillator of 1MHz is little, so form clock circuit by the crystal oscillator 8 of master clock frequency 8MHz, first frequency generator 6 and second frequency generator 7 to carry out frequency division, the clock that crystal oscillator 8 can produce 1MHz after first frequency generator 6 and second frequency generator 7 frequency division is for during survey and count.
After first dial switch 9 arranges numerical value, be transferred to the first forward-backward counter 11 through the first inverter 10, when the first forward-backward counter 11 receives the input of control circuit 5 low level, obtain the data that the first inverter 10 is inserted.
The content of the first forward-backward counter 11 and the second forward-backward counter 14 shows by showing selection 13, and when this display selects 13 to press, setting data is sent to decoder 17, is transferred to display 20 and displays after decoding.
The high speed sequential control method of above-mentioned time sequence control device, comprises following 4 kinds of control models:
In the ballistic range of target flight, be placed with the transducer of 4 equidistant placements, the echo signal that 4 transducers collect is linked into trigger control circuit 5 after the first trigger 1, second trigger 2, the 3rd trigger 3, the 4th trigger 4 successively, then enters the first forward-backward counter 11 or the second forward-backward counter 14 as requested.
Four input control patterns: when inputting four road signals on time sequence control device, input signal accesses the first trigger 1 respectively, second trigger 2, 3rd trigger 3, 4th trigger 4 is also sent to control circuit 5, control circuit 5 is respectively by the first trigger 1, the signal of the second trigger 2 is sent to the first forward-backward counter 11, after first first trigger 1 signal passes to the first forward-backward counter 11, first forward-backward counter 11 starts to do and adds counting, when the second trigger 2 signal passes to the first forward-backward counter 11, first forward-backward counter 11 starts to do and subtracts counting, subtract count value to be arranged by the first dial switch 9, when subtract be counted as zero time, second trigger 2 signal passes to the first output circuit 19, the signal of the 3rd trigger 3, the 4th trigger 4 is sent to the second forward-backward counter 14 by same control circuit 5 respectively, after first 3rd trigger 3 signal passes to the second forward-backward counter 14, second forward-backward counter 14 starts to do and adds counting, when the 4th trigger 4 signal passes to the second forward-backward counter 14, second forward-backward counter 14 starts to do and subtracts counting, subtract count value to be arranged by the second dial switch 16, when subtract be counted as zero time the 4th trigger 4 signal pass to the second output circuit 22,
First output circuit 19 and the second output circuit 22 can be received in a testing equipment simultaneously, realize 2 states of a control testing equipment; Also can receive in 2 testing equipments simultaneously, thus two testing equipments can be controlled simultaneously.
Three input control patterns: when inputting three road signals on time sequence control device, one in 4 triggers unsettled, 3 flip-flop operation, such as the second trigger 2 inputs unsettled, input signal accesses the first trigger 1, the 3rd trigger 3, the 4th trigger 4 be sent to control circuit 5 respectively, wherein, the 3rd trigger 3 signal portion is two, is respectively the 3rd trigger 3 first strands of signals and the 3rd trigger 3 second strands of signals; First trigger 1 signal is sent to the first forward-backward counter 11 by control circuit 5, after first trigger 1 signal reaches the first forward-backward counter 11, first forward-backward counter 11 starts to do and adds counting, when the 3rd trigger 3 first strands of signals pass to the first forward-backward counter 11, first forward-backward counter 11 starts to do and subtracts counting, subtract count value to be arranged by the first dial switch 9, when subtract be counted as zero time the 3rd trigger 3 first strands of signals pass to the first output circuit 19; The signal of the 3rd trigger 3 second strands of signals, the 4th trigger 4 is sent to the second forward-backward counter 14 by same control circuit 5 respectively, first 3rd 3 second strands, trigger signal passes to the second forward-backward counter 14, second forward-backward counter 14 starts to do and adds counting, when the 4th trigger 4 signal passes to the second forward-backward counter 14, second forward-backward counter 14 starts to do and subtracts counting, subtract count value to be arranged by the second dial switch 16, when subtract be counted as zero time the 4th trigger 4 signal pass to the second output circuit 22;
Register 12 binding time just can calculate the time of delay of testing equipment.
Two input control patterns: when inputting two road signals on time sequence control device, first trigger 1, the 3rd trigger 3 input unsettled, input signal accesses the second trigger 2, the 4th trigger 4 be sent to control circuit 5 respectively, wherein, second trigger 2 signal portion is two, is respectively the second trigger 2 signal A and the second trigger 2 signal B; After second trigger 2 signal A is sent to the first forward-backward counter 11 by control circuit 5, first forward-backward counter 11 starts to do and adds counting, when the 4th trigger 4 signal passes to the first forward-backward counter 11, first forward-backward counter 11 starts to do and subtracts counting, subtract count value to be arranged by the first dial switch 9, when subtract be counted as zero time the 4th trigger 4 signal pass to the first output circuit 19; While second trigger 2 signal A is sent to the first forward-backward counter 11 by control circuit 5, second trigger 2 signal B is sent to the second forward-backward counter 14, second forward-backward counter 14 starts to do and subtracts counting, subtract count value to be arranged by the second dial switch 16, when subtract be counted as zero time the second trigger 2 signal B pass to the second output circuit 22;
Two input control patterns can be used for two actions of a control testing equipment.
One input control pattern: when inputting a road signal on time sequence control device, 3 in 4 triggers unsettled, 1 flip-flop operation, such as the first trigger 1, second trigger 2, the 3rd trigger 3 input unsettled, input signal access the 4th trigger 4 is also sent to control circuit 5,4th trigger 4 signal is sent to the second forward-backward counter 14 by control circuit 5, second forward-backward counter 14 starts to do and subtracts counting, subtract count value to be arranged by the second dial switch 16, when subtract be counted as zero time the 4th trigger 4 signal pass to the second output circuit 22.
Any one trigger in one input control pattern can be used for control testing equipment.
In above four kinds of input control patterns, can phase trans-substitution between the first trigger 1, second trigger 2, the 3rd trigger 3, the 4th trigger 4.
In above four kinds of input control patterns, when 2 forward-backward counters carry out subtracting counting, initial value differs the stop value being decided to be and adding counting, and the initial value subtracting counting is controlled by dial switch.
First forward-backward counter 11 adds counting to circulating to start from scratch during peaking in the process adding counting, first overflows indicating circuit 18 is used for record first forward-backward counter 11 arrived peak value several times in the process adding counting, second overflows indicating circuit 21, and be used for record second forward-backward counter 14 arrived peak value several times in the process adding counting.
The signal that first output circuit 19 and the second output circuit 22 export is connected to testing equipment, for testing equipment provides timing control signal.
Claims (4)
1. a high speed time sequence control device, it is characterized in that, time sequence control device comprises control circuit (5) and crystal oscillator (8), the input parallel connection of control circuit (5) accesses the first trigger (1), the second trigger (2), the 3rd trigger (3), the 4th trigger (4), first frequency generator (6) and second frequency generator (7), the output access control circuit (5) of crystal oscillator (8);
Can phase trans-substitution between first trigger (1), the second trigger (2), the 3rd trigger (3), the 4th trigger (4);
The output of control circuit (5) is connected in parallel the first forward-backward counter (11) and the second forward-backward counter (14), described control circuit (5) is used for controlling by way of the first trigger (1) as maincenter, second trigger (2), 3rd trigger (3), the signal of the 4th trigger (4) enters addition or the subtraction of the first forward-backward counter (11) or the second forward-backward counter (14) and the first forward-backward counter (11) and the second forward-backward counter (14), the output of the first forward-backward counter (11) is connected in parallel the first output circuit (19) and register (12), register (12) output connects display and selects (13), the output of the second forward-backward counter (14) is connected in parallel the second output circuit (22) and (13) are selected in display, display selects (13) output to connect decoder (17), decoder (17) connects display (20),
First dial switch (9) accesses the first inverter (10), first inverter (10) accesses the first forward-backward counter (11), second dial switch (16) accesses the second inverter (15), and the second inverter (15) accesses the second forward-backward counter (14).
2. time sequence control device according to claim 1, it is characterized in that, the output of crystal oscillator (8) accesses first frequency generator (6) and second frequency generator (7) respectively, first frequency generator (6) and second frequency generator (7) access control circuit (5).
3. time sequence control device according to claim 2, it is characterized in that, the crystal oscillator that described crystal oscillator (8) is master clock frequency 8MHz, produces the clock of 1MHz after first frequency generator (6) and second frequency generator (7) frequency division.
4. time sequence control device according to claim 1, it is characterized in that, the output of the first forward-backward counter (11) connects first and overflows indicating circuit (18), and the output of the second forward-backward counter (14) connects second and overflows indicating circuit (21).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420474360.0U CN204089752U (en) | 2014-08-21 | 2014-08-21 | A kind of ultrahigh speed time sequence control device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420474360.0U CN204089752U (en) | 2014-08-21 | 2014-08-21 | A kind of ultrahigh speed time sequence control device |
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| CN204089752U true CN204089752U (en) | 2015-01-07 |
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| CN201420474360.0U Withdrawn - After Issue CN204089752U (en) | 2014-08-21 | 2014-08-21 | A kind of ultrahigh speed time sequence control device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104333349A (en) * | 2014-08-21 | 2015-02-04 | 中国空气动力研究与发展中心超高速空气动力研究所 | Device and method for ultra-high speed sequential control |
-
2014
- 2014-08-21 CN CN201420474360.0U patent/CN204089752U/en not_active Withdrawn - After Issue
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104333349A (en) * | 2014-08-21 | 2015-02-04 | 中国空气动力研究与发展中心超高速空气动力研究所 | Device and method for ultra-high speed sequential control |
| CN104333349B (en) * | 2014-08-21 | 2017-04-19 | 中国空气动力研究与发展中心超高速空气动力研究所 | Device and method for ultra-high speed sequential control |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20150107 Effective date of abandoning: 20170419 |
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| AV01 | Patent right actively abandoned |