CN204046933U - Multilayer circuit board - Google Patents

Multilayer circuit board Download PDF

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Publication number
CN204046933U
CN204046933U CN201490000038.2U CN201490000038U CN204046933U CN 204046933 U CN204046933 U CN 204046933U CN 201490000038 U CN201490000038 U CN 201490000038U CN 204046933 U CN204046933 U CN 204046933U
Authority
CN
China
Prior art keywords
registration holes
circuit board
multilayer circuit
application
internal layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201490000038.2U
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Chinese (zh)
Inventor
史利利
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
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Filing date
Publication date
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Application granted granted Critical
Publication of CN204046933U publication Critical patent/CN204046933U/en
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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

This application discloses a kind of multilayer circuit board, it is in outer and internal layer plate diagonal end positions, correspondence is provided with a pair registration holes, make the accurate contraposition of energy realizing circuit figure between upper and lower plate, in addition, because registration holes periphery is provided with porose disc, adopt the size relationship of registration holes and porose disc, contraposition deviation size can be determined.

Description

Multilayer circuit board
Technical field
The application relates to circuit field, particularly relates to a kind of multilayer circuit board.
Background technology
In printed wiring board field, the compound wiring board be made up of three ply board part is generally called multilayer circuit board.After the internal layer plate of multilayer circuit board completes, need to carry out stitching operation together with outer plate, thus formation multilayer circuit board, the alignment mode of traditional multilayer circuit board, generally on plate, offer single registration holes carry out contraposition, the problem that this mode easily causes the not cleer and peaceful deviation size in contraposition direction not easily to determine.
Summary of the invention
The application is intended to one of solve the problems of the technologies described above at least to a certain extent.
The application provides a kind of multilayer circuit board, comprise: the outer plate being provided with outer-layer circuit, and to be placed in inside this outer plate and to be provided with the internal layer plate of internal layer circuit, described outer plate is provided with the first registration holes in its cornerwise end positions, described internal layer plate is provided with the second registration holes in its cornerwise end positions, and described first registration holes is corresponding with this second registration holes position.
Further, the periphery of described first registration holes and the second registration holes is provided with porose disc.
Further, described porose disc is rounded stepped.
Further, described registration holes diameter is 0.8-1.5mm.
Further, described registration holes diameter is 1.0mm.
The beneficial effect of the application is:
By providing a kind of multilayer circuit board, it is in outer and internal layer plate diagonal end positions, correspondence is provided with a pair registration holes, make the accurate contraposition of energy realizing circuit figure between upper and lower plate, in addition, because registration holes periphery is provided with porose disc, adopt the size relationship of registration holes and porose disc, contraposition deviation size can be determined.
Accompanying drawing explanation
Fig. 1 is the structural representation of the multilayer circuit board of the embodiment of the present application.
Embodiment
Be described below in detail the embodiment of the application, the example of described embodiment is shown in the drawings, and wherein same or similar label represents same or similar element or has element that is identical or similar functions from start to finish.Be exemplary below by the embodiment be described with reference to the drawings, be intended to for explaining the application, and the restriction to the application can not be interpreted as.
In the description of the application, it will be appreciated that, term " " center ", " longitudinal direction ", " transverse direction ", " length ", " width ", " thickness ", " on ", D score, " front ", " afterwards ", " left side ", " right side ", " vertically ", " level ", " top ", " end " " interior ", " outward ", " clockwise ", orientation or the position relationship of the instruction such as " counterclockwise " are based on orientation shown in the drawings or position relationship, only the application and simplified characterization for convenience of description, instead of indicate or imply that the device of indication or element must have specific orientation, with specific azimuth configuration and operation, therefore the restriction to the application can not be interpreted as.
In addition, term " first ", " second " only for describing object, and can not be interpreted as instruction or hint relative importance or imply the quantity indicating indicated technical characteristic.Thus, be limited with " first ", the feature of " second " can express or impliedly comprise one or more these features.In the description of the application, the implication of " multiple " is two or more, unless otherwise expressly limited specifically.
In this application, unless otherwise clearly defined and limited, the term such as term " installation ", " being connected ", " connection ", " fixing " should be interpreted broadly, and such as, can be fixedly connected with, also can be removably connect, or connect integratedly; Can be mechanical connection, also can be electrical connection; Can be directly be connected, also indirectly can be connected by intermediary, can be the connection of two element internals.For the ordinary skill in the art, above-mentioned term concrete meaning in this application can be understood as the case may be.
In this application, unless otherwise clearly defined and limited, fisrt feature second feature it " on " or D score can comprise the first and second features and directly contact, also can comprise the first and second features and not be directly contact but by the other characterisation contact between them.And, fisrt feature second feature " on ", " top " and " above " comprise fisrt feature directly over second feature and oblique upper, or only represent that fisrt feature level height is higher than second feature.Fisrt feature second feature " under ", " below " and " below " comprise fisrt feature directly over second feature and oblique upper, or only represent that fisrt feature level height is less than second feature.
By reference to the accompanying drawings the application is described in further detail below by embodiment.
Please refer to Fig. 1, the application provides a kind of multilayer circuit board, comprising: the outer plate 1 being provided with outer-layer circuit 11, and to be placed in inside this outer plate 1 and to be provided with the internal layer plate 2 of internal layer circuit 21.Outer plate 1 is provided with the first registration holes 12 in its cornerwise end positions.It is corresponding with this second registration holes 22 position that internal layer plate 2 is provided with the second registration holes 22, first registration holes 12 in its cornerwise end positions.First and second registration holes diameter can be 0.8-1.5mm, as adopted 0.8,0.9,1.0,1.2,1.5mm diameter.Like this, in outer and internal layer plate diagonal end positions, correspondence is provided with a pair registration holes, makes the accurate contraposition of energy realizing circuit figure between upper and lower plate.
In addition, the periphery of the first registration holes 12 and the second registration holes 22 can be provided with porose disc.Porose disc is rounded stepped.Because registration holes periphery is provided with porose disc, adopt the size relationship of registration holes and porose disc, contraposition deviation size can be determined.
Like this, in outer and internal layer plate diagonal end positions, correspondence is provided with a pair registration holes, make the accurate contraposition of energy realizing circuit figure between upper and lower plate, in addition, because registration holes periphery is provided with porose disc, adopt the size relationship of registration holes and porose disc, contraposition deviation size can be determined.
In the description of this specification, at least one embodiment that specific features, structure, material or feature that the description of reference term " execution mode ", " some execution modes ", " embodiment ", " some embodiments ", " example ", " concrete example " or " some examples " etc. means to describe in conjunction with this embodiment or example are contained in the application or example.In this manual, identical embodiment or example are not necessarily referred to the schematic representation of above-mentioned term.And the specific features of description, structure, material or feature can combine in an appropriate manner in any one or more embodiment or example.
Above content is the further description done the application in conjunction with concrete execution mode, can not assert that the concrete enforcement of the application is confined to these explanations.For the application person of an ordinary skill in the technical field, under the prerequisite not departing from the application's design, some simple deduction or replace can also be made.

Claims (5)

1. a multilayer circuit board, comprise: the outer plate being provided with outer-layer circuit, and to be placed in inside this outer plate and to be provided with the internal layer plate of internal layer circuit, it is characterized in that, described outer plate is provided with the first registration holes in its cornerwise end positions, described internal layer plate is provided with the second registration holes in its cornerwise end positions, and described first registration holes is corresponding with this second registration holes position.
2. multilayer circuit board as claimed in claim 1, it is characterized in that, the periphery of described first registration holes and the second registration holes is provided with porose disc.
3. multilayer circuit board as claimed in claim 2, it is characterized in that, described porose disc is rounded stepped.
4. multilayer circuit board as claimed in claim 2, it is characterized in that, described registration holes diameter is 0.8-1.5mm.
5. multilayer circuit board as claimed in claim 4, it is characterized in that, described registration holes diameter is 1.0mm.
CN201490000038.2U 2014-04-09 2014-04-09 Multilayer circuit board Expired - Fee Related CN204046933U (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2014/074951 WO2015154240A1 (en) 2014-04-09 2014-04-09 Multilayer circuit board

Publications (1)

Publication Number Publication Date
CN204046933U true CN204046933U (en) 2014-12-24

Family

ID=52247550

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201490000038.2U Expired - Fee Related CN204046933U (en) 2014-04-09 2014-04-09 Multilayer circuit board

Country Status (2)

Country Link
CN (1) CN204046933U (en)
WO (1) WO2015154240A1 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201828771U (en) * 2010-08-25 2011-05-11 深圳中富电路有限公司 Film semi-automatic alignment device
CN102469703A (en) * 2010-11-16 2012-05-23 富葵精密组件(深圳)有限公司 Method for manufacturing blind holes of circuit board
CN103037637A (en) * 2011-09-30 2013-04-10 富葵精密组件(深圳)有限公司 Multilayer circuit board and manufacture method of multilayer circuit board

Also Published As

Publication number Publication date
WO2015154240A1 (en) 2015-10-15

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Legal Events

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20141224

Termination date: 20170409

CF01 Termination of patent right due to non-payment of annual fee