CN204045580U - A kind of electro-migration testing structure - Google Patents
A kind of electro-migration testing structure Download PDFInfo
- Publication number
- CN204045580U CN204045580U CN201420463368.7U CN201420463368U CN204045580U CN 204045580 U CN204045580 U CN 204045580U CN 201420463368 U CN201420463368 U CN 201420463368U CN 204045580 U CN204045580 U CN 204045580U
- Authority
- CN
- China
- Prior art keywords
- metal
- guard ring
- electro
- metal pad
- trap
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Abstract
The utility model provides a kind of electro-migration testing structure, is positioned on wafer Cutting Road, comprises test structure main body, guard ring, the first metal pad, the second metal pad, the 3rd metal pad and the 4th metal pad; Described test structure main body is positioned at described guard ring, described first, second, third and the 4th metal pad be positioned at outside described guard ring; Described test structure main body is connected with the trap syndeton of crossing over described guard ring respectively by between each metal pad.Described guard ring is connected with the P type heavily doped layer in the middle of described trap syndeton; Described P type substrate and described guard ring are all by described 3rd metal pad ground connection.Be positioned on Cutting Road in electro-migration testing structure of the present utility model, and have guard ring to protect, when crystal grain can be avoided to cut, switch to the problem that guard ring causes chip layering simultaneously.
Description
Technical field
The utility model belongs to field of semiconductor manufacture, relates to a kind of test structure, particularly relates to a kind of electro-migration testing structure.
Background technology
It is a project in Product-level reliability testing (PLR) during electro-migration testing; in low K postchannel process, the guard ring (Guard Ring) around electro-migration testing structure module can prevent steam in crystal grain cutting process from entering test structure affects test result.Guard ring forms by the multiple layer metal on active area is stacking.
Refer to Fig. 1, be shown as the vertical view that existing electro-migration testing structure is arranged in Cutting Road, wherein Cutting Road defined by the region between two sealing rings 101.As shown in Figure 1, test structure main body and metal pad 103 are all positioned at guard ring 102.Refer to Fig. 2, be shown as the enlarged drawing of Fig. 1, as shown in Figure 2, test structure main body 104 is positioned at metal pad 103 side (in order to clear display test structure main body, Fig. 2 is not by former scale).Width due to Cutting Road is generally 60 microns; and the size of metal pad is generally the length of side is 55 microns square; therefore the making space width leaving test structure main body 104 and guard ring for only has 2.5 microns; easy circuit for generating design rule mistake (DRC errors), causes the problems such as short circuit.Meanwhile, because guard ring needs to surround metal pad, therefore guard ring almost occupies whole Cutting Road, can cut to guard ring when crystal grain cuts, and is easy to cause chip lamination problem, and the possible cause of layering is the high density metal in Cutting Road region.
Remove guard ring and the width of electro-migration testing structure be limited in the lamination problem of chip when can to solve laser cutting within 30 microns, but not having guard ring, electro-migration testing structure is easy to, by moisture attacks, affect test result.
Existing a kind of solution is chip area test structure being made in MPW (MPW); but not on Cutting Road; so just can avoid the guard ring around Cutting Road test structure and test structure itself; but; such meeting additionally takies a chip area, makes this region can not be used for making chip, causes the core number in each wafer to reduce; waste wafer area, cause cost increase.Another kind of way does not make electro-migration testing structure, but whether the manufacture craft that just cannot detect metal interconnecting wires like this meets the demands.
And under current 40nm process node, just meet with serious chip lamination problem, along with the development of technology, more need to be absorbed in structure design of test, to prevent less process node as the chip lamination problem under 28nm high-K metal gate and polysilicon process in advance.
Therefore, provide a kind of new electro-migration testing structure can be positioned on Cutting Road and have guard ring, making test structure main body not by erosions such as steam, when crystal grain can not be caused again to cut, the problem of chip layering is necessary simultaneously.
Utility model content
The shortcoming of prior art in view of the above, the purpose of this utility model is to provide a kind of electro-migration testing structure, easily causes the problem of chip layering for solving electro-migration testing structure of the prior art.
For achieving the above object and other relevant objects, the utility model provides a kind of electro-migration testing structure, be positioned on wafer Cutting Road, comprise test structure main body, guard ring, the first metal pad, the second metal pad, the 3rd metal pad and the 4th metal pad;
Described test structure main body is positioned at described guard ring, described first, second, third and the 4th metal pad be positioned at outside described guard ring;
Described test structure main body is connected respectively by a trap syndeton with between each metal pad; Described trap syndeton to comprise between the ground floor that connects successively metal interconnecting layer between metal interconnecting layer, the first N-type heavily doped layer, N trap, the second N-type heavily doped layer and the second layer, wherein, described N trap is formed in P type substrate, described first N-type heavily doped layer and the second N-type heavily doped layer are all formed on described N trap, be formed with P type heavily doped layer and isolated by isolation structure between described first N-type heavily doped layer and the second N-type heavily doped layer;
Described guard ring is connected with described P type heavily doped layer;
Described P type substrate and described guard ring are all connected with described 3rd metal pad.
Alternatively, described test structure main body comprises metal wire to be measured and the dummy metal around described metal wire to be measured; The first end of described metal wire to be measured and the second end are connected with the first upper strata metal wire and the second upper strata metal wire respectively by metal plug; Described first upper strata metal wire comprises the first voltage measurement port and the first current measurement port, and described second upper strata metal wire comprises the second voltage measurement port and the second current measurement port; Described first voltage measurement port, the first current measurement port, the second voltage measurement port and the second current measurement port are connected with described first, second, third, fourth metal pad respectively by a described trap syndeton.
Alternatively, described dummy metal comprise one around described metal wire to be measured closed becket and be distributed in some metal wires of described becket both sides.
Alternatively, between the described second layer, metal interconnecting layer is connected to corresponding metal pad by the 3rd upper strata metal wire.
Alternatively, described P type substrate is connected with described 3rd metal pad by metal interconnecting layer between third layer and the 4th upper strata metal wire successively.
Alternatively, described N trap is other is also formed with P trap.
Alternatively, described guard ring is positioned in the middle part of described Cutting Road, and except described first, second, third and the 4th except metal pad, the peak width that described electro-migration testing structure comprises metal is less than or equal to 30 microns.
Alternatively, described first, second, third and the 4th metal pad be positioned in the middle part of described Cutting Road, and the top-level metallic width of each metal pad is less than or equal to 30 microns.
Alternatively, described isolation structure be shallow trench isolation from.
As mentioned above, electro-migration testing structure of the present utility model, there is following beneficial effect: in (1) electro-migration testing structure, the only protected ring protection of test structure main body, metal pad is positioned at outside guard ring, and guard ring width can significantly be reduced, as controlled within 30 microns, thus more crystal grain cutting room can be left in guard ring both sides, switches to the problem that guard ring causes chip layering when avoiding crystal grain to cut; (2) because metal pad is positioned at outside guard ring, make in guard ring larger for the space making test structure main body, thus Design Rule Checking mistake (DRC errors) can be avoided, prevent from being short-circuited between metal wire to be measured and dummy metal phenomenon; (3) be connected by trap syndeton between the test structure main body in guard ring and the metal pad outside guard ring, wherein, N trap and be inverted status between P type substrate, P type heavily doped layer and P trap, only has N trap by current delivery to N-type heavily doped layer, form connecting path, and guard ring is by P type heavily doped layer ground connection, electric current is not had to pass through; 4) electro-migration testing structure is still arranged on wafer Cutting Road, do not take the chip manufacturing space on wafer, and test structure main body has guard ring to protect, and ensures the accuracy of test result; 5) because test structure main body has enough making spaces, short circuit phenomenon can being avoided to occur, therefore, without the need to drawing extra test lead from dummy metal in electro-migration testing structure, improve the parsimony of electro-migration testing structure.
Accompanying drawing explanation
Fig. 1 is shown as the schematic top plan view that electro-migration testing structure in prior art is arranged in Cutting Road.
Fig. 2 is shown as the enlarged drawing of structure shown in Fig. 1.
Fig. 3 is shown as the schematic top plan view that electro-migration testing structure of the present utility model is arranged in Cutting Road.
What Fig. 4 was shown as trap syndeton in electro-migration testing structure of the present utility model overlooks enlarged drawing.
Fig. 5 is shown as the cutaway view of trap syndeton in electro-migration testing structure of the present utility model.
Fig. 6 is shown as the cutaway view in electro-migration testing structure of the present utility model.
Element numbers explanation
101,212 sealing rings
102,202 guard rings
103 metal pads
104,201 test structure main bodys
203 first metal pads
204 second metal pads
205 the 3rd metal pads
206 the 4th metal pads
207 trap syndetons
208 P type substrate
209 the 3rd upper strata metal wires
Metal interconnecting layer between 210 third layer
211 the 4th upper strata metal wires
2011 metal wires to be measured
2012 dummy metals
2013 metal plugs
2014 first upper strata metal wires
2015 second upper strata metal wires
2016 first voltage measurement ports
2017 first current measurement ports
2018 second voltage measurement ports
2019 second current measurement ports
Metal interconnecting layer between 2071 ground floors
Metal interconnecting layer between 2072 second layers
2073 N traps
2074 first N-type heavily doped layers
2075 second N-type heavily doped layers
2076 P type heavily doped layers
2077 isolation structures
W
1cutting Road width
W
2electro-migration testing structure comprises the peak width of metal
W
3the top-level metallic width of metal pad
Embodiment
By particular specific embodiment, execution mode of the present utility model is described below, person skilled in the art scholar the content disclosed by this specification can understand other advantages of the present utility model and effect easily.
Refer to Fig. 3 to Fig. 6.Notice, structure, ratio, size etc. that this specification institute accompanying drawings illustrates, content all only in order to coordinate specification to disclose, understand for person skilled in the art scholar and read, and be not used to limit the enforceable qualifications of the utility model, therefore the not technical essential meaning of tool, the adjustment of the modification of any structure, the change of proportionate relationship or size, do not affecting under effect that the utility model can produce and the object that can reach, still all should drop on technology contents that the utility model discloses and obtain in the scope that can contain.Simultaneously, quote in this specification as " on ", D score, "left", "right", " centre " and " one " etc. term, also only for ease of understanding of describing, and be not used to limit the enforceable scope of the utility model, the change of its relativeness or adjustment, under changing technology contents without essence, when being also considered as the enforceable category of the utility model.
Refer to Fig. 3, the utility model provides a kind of electro-migration testing structure, be positioned on wafer Cutting Road, comprise test structure main body 201, guard ring 202, first metal pad 203, second metal pad 204, the 3rd metal pad 205 and the 4th metal pad 206; Described test structure main body 201 is positioned at described guard ring 202, described first, second, third and the 4th metal pad be positioned at outside described guard ring 202; Described test structure main body 201 is connected respectively by a trap syndeton 207 with between each metal pad.
Refer to Fig. 4 and Fig. 5, wherein, what Fig. 4 was shown as described trap syndeton 207 overlooks enlarged drawing, and Fig. 5 is shown as the cutaway view of described trap syndeton.As shown in the figure, described trap syndeton 207 to comprise between the ground floor that connects successively metal interconnecting layer 2072 between metal interconnecting layer 2071, first N-type heavily doped layer 2074, N trap 2073, second N-type heavily doped layer 2075 and the second layer, wherein, described N trap 2073 is formed in P type substrate 208, described first N-type heavily doped layer 2074 and the second N-type heavily doped layer 2075 are all formed on described N trap 2073, be formed with P type heavily doped layer 2076 and isolated by isolation structure 2077 between described first N-type heavily doped layer 2074 and the second N-type heavily doped layer 2075.Described isolation structure 2077 can be that shallow trench isolation is from (STI).
Concrete; between described ground floor, between metal interconnecting layer 2071 and the second layer, metal interconnecting layer 2072 is multilevel metal interconnection structure; form by contact bolt, more metal layers and multiple layer metal connector are stacking on the active area; in order to illustrated convenience in Fig. 5; only depict two-layer; and practical structures can be more multi-layered, should too not limit protection range of the present utility model herein.
As shown in Figure 1, described guard ring 202 is connected with described P type heavily doped layer 2076, and namely between described ground floor, metal interconnecting layer 2071 is positioned at described guard ring 202, and described second interlayer metal 2072 is positioned at outside described guard ring 202.Further, described P type substrate 208 and described guard ring 202 are all connected with described 3rd metal pad 205.It is pointed out that the P type substrate region 208 in Fig. 3 shown in fine dotted line frame is not actual size, only for the ease of distinguishing N trap and P type substrate, in fact, what the wafer entirety at described electro-migration testing structure place adopted is P type substrate.
Concrete, described test structure main body 201 comprises metal wire 2011 to be measured and the dummy metal 2012 (dummy metal) around described metal wire 2011 to be measured; The first end of described metal wire to be measured 2011 and the second end are connected with the first upper strata metal wire 2014 and the second upper strata metal wire 2015 respectively by metal plug 2013; Described first upper strata metal wire 2014 comprises the first voltage measurement port 2016 and the first current measurement port 2017, and described second upper strata metal wire 2015 comprises the second voltage measurement port 2018 and the second current measurement port 2019; Described first voltage measurement port 2016, first current measurement port 2017, second voltage measurement port 2018 and the second current measurement port 2019 are connected with described first, second, third, fourth metal pad respectively by a described trap syndeton 207.
Concrete, described dummy metal 2012 comprise one around described metal wire 2011 to be measured closed becket and be distributed in some metal wires of described becket both sides.Due to described metal wire 2011 to be measured not only thin but also long (length can reach 400 microns, and width is number nanometer, tens nanometer or micron level), described dummy metal 2012 can protect described metal wire to be measured 2011.It is pointed out that the size of described metal wire to be measured 2011 can design according to technological requirement, should too not limit protection range of the present utility model herein.
Concrete, between the described second layer, metal interconnecting layer 2072 is connected to corresponding metal pad by the 3rd upper strata metal wire 209.Described P type substrate 208 is connected with described 3rd metal pad 205 by metal interconnecting layer between third layer 210 and the 4th upper strata metal wire 211 successively, thus when testing by described P type substrate and described guard ring ground connection.Described N trap is other can also be formed with P trap (not shown).
Concrete, described guard ring 202 is positioned in the middle part of described Cutting Road, and the width W of described Cutting Road has been shown in Fig. 1
1, be generally 60 microns.In electro-migration testing structure of the present utility model, except described first, second, third and the 4th except metal pad, described electro-migration testing structure comprises the peak width W of metal
2be less than or equal to 30 microns; thus make guard ring 202 both sides have enough spaces (15 microns) to carry out crystal grain cutting; and metal interconnecting layer 2072 between the second layer that can not switch to guard ring 202 and outside thereof, thus when effectively can reduce cutting, there is the phenomenon of chip layering.In addition, because metal pad is positioned at outside guard ring, make in guard ring larger for the space making test structure main body, thus Design Rule Checking mistake (DRC errors) can be avoided, prevent from being short-circuited between metal wire to be measured and dummy metal phenomenon; Simultaneously, because test structure main body has enough making spaces, short circuit phenomenon can be avoided to occur, therefore, (in the existing test structure in Fig. 2, there is this test lead without the need to drawing extra test lead from dummy metal in electro-migration testing structure, for judging between metal wire to be measured and dummy metal whether short circuit), thus improve the parsimony of electro-migration testing structure.
Concrete, described first, second, third and the 4th metal pad be positioned in the middle part of described Cutting Road, and the top-level metallic width W of each metal pad
3be less than or equal to 30 microns.Because metal pad is also formed source region last layer layer is stacking by multiple layer metal, be also multi-layer metal structure, cutting to metal pad during cutting crystal grain is also one of possible cause of chip generation layering.But because the area of metal pad can not be too little, bandpass is 55 microns, and the width of Cutting Road only has 60 microns, so will inevitably metal pad be cut to during cutting crystal grain.Usually, top-level metallic (top metal) comparatively intermetallic metal (inner metal) thickness want much thick, in the utility model, the width of top-level metallic thicker in metal pad is reduced to less than 30 microns, and intermetallic metal thinner below top-level metallic still can retain normal size, namely width is 55 microns, although metal pad overall width is substantially constant, but be less than or equal to 30 microns due to thicker top-level metallic width, and be positioned in the middle of Cutting Road, so thicker top-level metallic can not be switched to when carrying out crystal grain cutting, the probability of further minimizing chip layering.
In electro-migration testing structure of the present utility model, test structure main body is positioned at guard ring, metal pad is positioned at outside guard ring, test structure main body is connected by the trap syndeton of crossing over guard ring with between metal pad, guard ring, P type substrate and the equal ground connection of P trap, for zero potential, as shown in Figure 5, black arrow shows the current direction in trap syndeton 207, due to N trap 2073 and P type substrate, diode inverted status is between P type heavily doped layer 2076 and P trap, therefore only have N trap that the electric current of metal interconnecting layer between the second layer 2072 is transferred to the first N-type heavily doped layer 2074 by the second N-type heavily doped layer 2075, and then be transferred to metal interconnecting layer 2071 between ground floor, connecting path is formed with metal wire to be measured, and guard ring, P type substrate and P type heavily doped layer ground connection, electric current is not had to pass through.
Refer to Fig. 6, be shown as the cutaway view of electro-migration testing structure of the present utility model, during test, voltage signal can be added in respectively the first voltage measurement port 2016 and the second voltage measurement port 2018 of described metal wire to be measured 2011 by described first metal pad 203 and the 3rd metal pad 205, wherein said P type substrate 208 receives described 3rd metal pad 203 ground connection by metal interconnecting layer between described third layer 210 (not giving diagram), described guard ring 202 and described P type heavily doped layer 2076 receive described 3rd metal pad 203 ground connection by described 4th upper strata metal wire 211.In like manner, current signal can be added in respectively the first testing current port 2017 and the second testing current port 2019 (not giving diagram) of described metal wire to be measured 2011 by the second metal pad 204 and the 4th metal pad 206.
Voltage performance and the current capability of metal wire to be measured can be measured by electro-migration testing structure of the present utility model, detect metal wire manufacture craft.
In sum, electro-migration testing structure of the present utility model, there is following beneficial effect: in (1) electro-migration testing structure, the only protected ring protection of test structure main body, metal pad is positioned at outside guard ring, and guard ring width can significantly be reduced, as controlled within 30 microns, thus more crystal grain cutting room can be left in guard ring both sides, switches to the problem that guard ring causes chip layering when avoiding crystal grain to cut; (2) because metal pad is positioned at outside guard ring, make in guard ring larger for the space making test structure main body, thus Design Rule Checking mistake (DRC errors) can be avoided, prevent from being short-circuited between metal wire to be measured and dummy metal phenomenon; (3) be connected by trap syndeton between the test structure main body in guard ring and the metal pad outside guard ring, wherein, N trap and be inverted status between P type substrate, P type heavy doping substrate and P trap, only has N trap by current delivery to N-type heavily doped layer, form connecting path, and guard ring is by P type heavily doped layer ground connection, electric current is not had to pass through; 4) electro-migration testing structure is still arranged on wafer Cutting Road, do not take the chip manufacturing space on wafer, and test structure main body has guard ring to protect, and ensures the accuracy of test result; 5) because test structure main body has enough making spaces, short circuit phenomenon can being avoided to occur, therefore, without the need to drawing extra test lead from dummy metal in electro-migration testing structure, improve the parsimony of electro-migration testing structure.So the utility model effectively overcomes various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present utility model and effect thereof only, but not for limiting the utility model.Any person skilled in the art scholar all without prejudice under spirit of the present utility model and category, can modify above-described embodiment or changes.Therefore, such as have in art and usually know that the knowledgeable modifies or changes not departing from all equivalences completed under the spirit and technological thought that the utility model discloses, must be contained by claim of the present utility model.
Claims (9)
1. an electro-migration testing structure, is positioned on wafer Cutting Road, comprises test structure main body, guard ring, the first metal pad, the second metal pad, the 3rd metal pad and the 4th metal pad, it is characterized in that:
Described test structure main body is positioned at described guard ring, described first, second, third and the 4th metal pad be positioned at outside described guard ring;
Described test structure main body is connected respectively by a trap syndeton with between each metal pad; Described trap syndeton to comprise between the ground floor that connects successively metal interconnecting layer between metal interconnecting layer, the first N-type heavily doped layer, N trap, the second N-type heavily doped layer and the second layer, wherein, described N trap is formed in P type substrate, described first N-type heavily doped layer and the second N-type heavily doped layer are all formed on described N trap, be formed with P type heavily doped layer and isolated by isolation structure between described first N-type heavily doped layer and the second N-type heavily doped layer;
Described guard ring is connected with described P type heavily doped layer;
Described P type substrate and described guard ring are all connected with described 3rd metal pad.
2. electro-migration testing structure according to claim 1, is characterized in that: described test structure main body comprises metal wire to be measured and the dummy metal around described metal wire to be measured; The first end of described metal wire to be measured and the second end are connected with the first upper strata metal wire and the second upper strata metal wire respectively by metal plug; Described first upper strata metal wire comprises the first voltage measurement port and the first current measurement port, and described second upper strata metal wire comprises the second voltage measurement port and the second current measurement port; Described first voltage measurement port, the first current measurement port, the second voltage measurement port and the second current measurement port are connected with described first, second, third, fourth metal pad respectively by a described trap syndeton.
3. electro-migration testing structure according to claim 2, is characterized in that: described dummy metal comprise one around described metal wire to be measured closed becket and be distributed in some metal wires of described becket both sides.
4. electro-migration testing structure according to claim 1, is characterized in that: between the described second layer, metal interconnecting layer is connected to corresponding metal pad by the 3rd upper strata metal wire.
5. electro-migration testing structure according to claim 1, is characterized in that: described P type substrate is connected with described 3rd metal pad by metal interconnecting layer between third layer and the 4th upper strata metal wire successively.
6. electro-migration testing structure according to claim 1, is characterized in that: described N trap is other is also formed with P trap.
7. electro-migration testing structure according to claim 1; it is characterized in that: described guard ring is positioned in the middle part of described Cutting Road; and except described first, second, third and the 4th except metal pad, the peak width that described electro-migration testing structure comprises metal is less than or equal to 30 microns.
8. electro-migration testing structure according to claim 1, is characterized in that: described first, second, third and the 4th metal pad be positioned in the middle part of described Cutting Road, and the top-level metallic width of each metal pad is less than or equal to 30 microns.
9. electro-migration testing structure according to claim 1, is characterized in that: described isolation structure be shallow trench isolation from.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420463368.7U CN204045580U (en) | 2014-08-15 | 2014-08-15 | A kind of electro-migration testing structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420463368.7U CN204045580U (en) | 2014-08-15 | 2014-08-15 | A kind of electro-migration testing structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204045580U true CN204045580U (en) | 2014-12-24 |
Family
ID=52246217
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420463368.7U Expired - Fee Related CN204045580U (en) | 2014-08-15 | 2014-08-15 | A kind of electro-migration testing structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204045580U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105118798A (en) * | 2015-08-26 | 2015-12-02 | 上海华力微电子有限公司 | Electromigration test structure and test method |
| CN108573890A (en) * | 2018-04-10 | 2018-09-25 | 上海华力微电子有限公司 | A kind of copper metal interconnection electro-migration testing structure and its test method |
-
2014
- 2014-08-15 CN CN201420463368.7U patent/CN204045580U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105118798A (en) * | 2015-08-26 | 2015-12-02 | 上海华力微电子有限公司 | Electromigration test structure and test method |
| CN105118798B (en) * | 2015-08-26 | 2018-05-04 | 上海华力微电子有限公司 | Electro-migration testing structure and test method |
| CN108573890A (en) * | 2018-04-10 | 2018-09-25 | 上海华力微电子有限公司 | A kind of copper metal interconnection electro-migration testing structure and its test method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102820280B (en) | For the overstepping one's bounds laminar metal level of integrated circuit | |
| CN101038912B (en) | Semiconductor device having function of improved electrostatic discharge protection | |
| TWI413236B (en) | Esd protection scheme for semiconductor device stacking process | |
| CN203398105U (en) | Semiconductor device | |
| US7795615B2 (en) | Capacitor integrated in a structure surrounding a die | |
| US10043852B2 (en) | Magnetoresistive memory device and manufacturing method of the same | |
| US20150129978A1 (en) | Semiconductor integrated circuit, method for fabricating the same, and semiconductor package | |
| US9098668B2 (en) | Layout of an integrated circuit | |
| KR20140030608A (en) | Tsv structure of semiconductor memory device and testing method thereof | |
| CN204045580U (en) | A kind of electro-migration testing structure | |
| US20140131865A1 (en) | Structure and Method for Bump to Landing Trace Ratio | |
| CN206040637U (en) | 3D bigri GOI tests structure | |
| CN205016497U (en) | Survey test structure of chip layering | |
| CN204257633U (en) | A kind of interlayer metal reliability testing structure | |
| CN111033720B (en) | Semiconductor integrated circuit device having a plurality of semiconductor chips | |
| CN203910786U (en) | Semiconductor testing structure | |
| KR101999312B1 (en) | Semiconductor device | |
| CN206332008U (en) | A kind of IMD reliability testing structures | |
| CN204067309U (en) | The test structure that a kind of interlayer dielectric layer punctures | |
| CN113838847B (en) | Bidirectional DCSCR device for low-voltage ESD protection | |
| CN203377200U (en) | Chip package testing structure | |
| CN203826347U (en) | WAT test structure for monitoring over-etching of metal layer | |
| CN104022111B (en) | Electrostatic discharge protective structure with bidirectional protective capacity | |
| CN204067350U (en) | A kind of test structure of plasma-induced damage | |
| JP4297195B1 (en) | Laminated chip |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141224 Termination date: 20190815 |