CN203984559U - HDMI extender launch terminal, receiving terminal and extender transmission system - Google Patents

HDMI extender launch terminal, receiving terminal and extender transmission system Download PDF

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Publication number
CN203984559U
CN203984559U CN201420169407.2U CN201420169407U CN203984559U CN 203984559 U CN203984559 U CN 203984559U CN 201420169407 U CN201420169407 U CN 201420169407U CN 203984559 U CN203984559 U CN 203984559U
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China
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hdmi
chip
connects
resistance
signal
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Chinese (zh)
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周育春
胡海龙
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Shenzhen city Hanko electronic Limited by Share Ltd
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Shenzhen Han Ke Electronics Co Ltd
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Abstract

The utility model discloses HDMI extender launch terminal, receiving terminal and extender transmission system, wherein, launch terminal, comprising: HDMI connector modules, a HDMI processing module, HDMI output driver module and a RJ45 network interface; Described HDMI connector modules, a HDMI processing module, HDMI output driver module are connected successively with a RJ45 network interface.The HDMI signal that the utility model receives the output of high-definition signal broadcast source by HDMI connector modules is exported to a HDMI processing module, by HDMI output driver module, the HDMI signal of the one HDMI processing module output is carried out to coupling processing again, then by a RJ45 network interface, export HDMI signal to HDMI extender receiving terminal, realizing the effect of single network cable transmission HDMI signal, is that this area one is greatly progressive.

Description

HDMI extender launch terminal, receiving terminal and extender transmission system
Technical field
The utility model relates to technical field of electronic equipment, particularly HDMI extender launch terminal, receiving terminal and extender transmission system.
Background technology
At present on the market, HDMI(High Definition Multimedia Interface, HDMI (High Definition Multimedia Interface)) extender mostly uses the incompressible HDMI signal of double joint network cable transmission, when the high-definition data of transmission 1080P, 60Hz, 24bit, maximum transmission distance is 50 meters, but adopts the mode of this two network cable transmission data to there will be following weak point:
1, the wiring of double joint netting twine is inconvenient, and in the situation that netting twine is long, if do not have professional netting twine testing tool to be easy to obscure port; 2, there is no EDID(Extended Display Identification Data extending display identification data) editorial management function, based on the current bandwidth problem of HDMI amplification chip on the market own, must meet the requirement of the signal bandwidth of rear end 1080P, 36Bit or 4K * 2K; 3, ultrared transmission channel need to use one or two data lines in 4 pairs of twisted-pair feeders, dual-purpose network data line, cause two netting twines of needs; 4, the cost of double joint netting twine is higher than single netting twine cost.
In view of above-mentioned deficiency, need badly prior art is carried out to improvement and bring new ideas.
Utility model content
In view of above-mentioned the deficiencies in the prior art part, the purpose of this utility model is to provide a kind of HDMI extender launch terminal, receiving terminal and extender transmission system, uses single netting twine just can realize the long-distance transmissions of incompressible HDMI signal.
In order to achieve the above object, the utility model has been taked following technical scheme:
A HDMI extender launch terminal, comprising: HDMI connector modules, a HDMI processing module, HDMI output driver module and a RJ45 network interface;
Described HDMI connector modules, a HDMI processing module, HDM I output driver module are connected successively with a RJ45 network interface.
Described HDMI extender launch terminal, also comprises: EDID switch and the first singlechip controller; Described EDID switch connects a HDMI processing module by the first singlechip controller.
Described HDMI extender launch terminal, also comprises:
The first infrared receiving interface;
The first infrared emission interface;
For the first driver module that infrared signal is driven and amplified;
For preventing the first isolated location of HDMI clock signal and ground short circuit;
Described the first infrared receiving interface is connected HDMI output driver module and a RJ45 network interface with the first infrared emission interface by described the first driver module, and described the first isolated location connects described HDMI output driver module and a RJ45 network interface.
In described HDMI extender launch terminal, described HDMI connector modules comprises HDMI input connector, an ESD chip and the 2nd ESD chip; The one HDMI processing module comprises that model is the HDMI processor of SII9187 and the analog multiplexer that model is MC74LVXT4052; It is the integrated chip of ESD5V3U4U-HDMI that a described ESD chip and the 2nd ESD chip all adopt model; HDMI output driver module comprises the first AC coupled unit, and model to be MAX3814 first drive chip and second to drive chip, described the first AC coupled unit comprises the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity, the 5th electric capacity, the 6th electric capacity, the 7th electric capacity and the 8th electric capacity;
The RXC-end of described HDMI input connector connects the 1st end of an ESD chip, the RXC+ end of described HDMI input connector connects the 2nd end of an ESD chip, the RX0-end of described HDMI input connector connects the 4th end of an ESD chip, the RX0+ end of described HDMI input connector connects the 5th end of an ESD chip, the RX1-end of described HDMI input connector connects the 1st end of the 2nd ESD chip, the RX1+ end of described HDMI input connector connects the 2nd end of the 2nd ESD chip, the RX2-end of described HDMI input connector connects the 4th end of the 2nd ESD chip, the RX2+ end of described HDMI input connector connects the 5th end of the 2nd ESD chip,
The RXC-end of described HDMI processor connects 9 ends of an ESD chip, the RXC+ end of described HDMI processor connects 8 ends of an ESD chip, the RX0-end of described HDMI processor connects 7 ends of an ESD chip, the RX0+ end of described HDMI processor connects 6 ends of an ESD chip, the RX1-end of described HDMI processor connects 9 ends of the 2nd ESD chip, the RX1+ end of described HDMI processor connects 8 ends of the 2nd ESD chip, the RX2-end of described HDMI processor connects 7 ends of the 2nd ESD chip, the RX2+ end of described HDMI processor connects 6 ends of the 2nd ESD chip,
The INT end of described HDMI processor connects described the first singlechip controller, X1 end and first singlechip controller of the CSDA end connecting analog multiplexer of described HDMI processor, Y1 end and first singlechip controller of the CSCL end connecting analog multiplexer of described HDMI processor, the Y0 end of the DSCL end connecting analog multiplexer of described HDMI processor, the X0 end of the DSDA end connecting analog multiplexer of described HDMI processor;
The CBUS-HID end of described HDMI processor connects the HTPLUG end of HDMI input connector, and the X end of described analog multiplexer connects the SDA end of HDMI input connector, and the Y end of described analog multiplexer connects the SCL end of HDMI input connector;
Described first drives the INA+ end and second of chip to drive the IND-end of chip to be connected the TXC-end of HDMI processor, described first drives the INA-end and second of chip to drive the IND+ end of chip to be connected the TXC+ end of HDMI processor, described first drives the INB+ end and second of chip to drive the INC-end of chip to be connected the TX0-end of HDMI processor, described first drives the INB-end and second of chip to drive the INC+ end of chip to be connected the TX0+ end of HDMI processor, described first drives the INC+ end and second of chip to drive the INB-end of chip to be connected the TX1-end of HDMI processor, described first drives the INC-end and second of chip to drive the INB+ end of chip to be connected the TX1+ end of HDMI processor, described first drives the IND+ end and second of chip to drive the INA-end of chip to be connected the TX2-end of HDMI processor, described first drives the IND-end and second of chip to drive the INA+ end of chip to be connected the TX2+ end of HDMI processor,
The described first RX-D2-that drives the OUTB+ end of chip and the OUTC-end of the second driving chip to be connected a RJ45 network interface by the second electric capacity holds, the described first RX-D2+ that drives the OUTB-end of chip and the OUTC+ end of the second driving chip to be connected a RJ45 network interface by the 7th electric capacity holds, described first drives the BI_D3-that the OUTC+ end and second of chip drives the OUTB-end of chip to be connected a RJ45 network interface by the 8th electric capacity to hold, and described first drives the OUTC-end of chip and the OUTB+ of the second driving chip to hold the BI-D3+ that is connected a RJ45 network interface by the 3rd electric capacity to hold, the described first TX_D1+ that drives the OUTD-end of chip and the OUTA+ end of the second driving chip to be connected a RJ45 network interface by the 4th electric capacity holds, the described first TX_D1-that drives the OUTD+ end of chip and the OUTA-end of the second driving chip to be connected a RJ45 network interface by the first electric capacity holds, the described first BI-D4-that drives the OUTA+ end of chip and the OUTD-end of the second driving chip to be connected a RJ45 network interface by the 5th electric capacity holds, the described first BI-D4+ that drives the OUTA-end of chip and the OUTD+ end of the second driving chip to be connected a RJ45 network interface by the 6th electric capacity holds.
In described HDMI extender launch terminal, the first singlechip controller adopts the integrated chip that model is STM8S103FX, the PD3 end of described the first singlechip controller connects the INT end of HDMI processor, the PC5 end of the first singlechip controller connects the 6th end of EDID switch, the PC6 end of the first singlechip controller connects the 7th end of EDID switch and the PC7 of the first singlechip controller holds the 8th end that is connected EDID switch, the PB4/SCL end of the first singlechip controller connects the CSCL end of HDMI processor and the Y1 end of analog multiplexer, the PB5/SDA end of the first singlechip controller connects the CSDA end of HDMI processor and the X1 end of analog multiplexer, the PC3 end of the first singlechip controller connects the A end of described analog multiplexer.
In described HDMI extender launch terminal, described the first driver module comprises the IR signal shaping chip that the first amplification chip, model that the first infrared signal attenuation units, model are LMH6643MM are 74LVC14, the first gain parameter setting unit, filter unit, the first magnetic bead, the second magnetic bead, the first triode and the first pull-up resistor;
Wherein: described the first infrared signal attenuation units comprises the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance and the 8th resistance; Described the first gain parameter setting unit comprises the 9th resistance, the tenth resistance and the 11 resistance; Described the first filter unit comprises the 9th electric capacity and the tenth electric capacity;
The 3rd end of described the first infrared receiving interface is connected the 1A end of an IR signal shaping chip with the 5th end, the 2Y end of a described IR signal shaping chip connects the B+ end of the first amplification chip, the 6Y end of a described IR signal shaping chip connects the base stage of the first triode, the collector electrode of the first triode connects the 3rd end and the 5th end of 5V feeder ear and the first infrared emission interface, the grounded emitter of the first triode by described the first pull-up resistor;
The BI-D3+ that the B-end of described the first amplification chip connects a RJ45 network interface by the first magnetic bead holds, also respectively by the first resistance, the second resistance, the 3rd resistance and the 4th grounding through resistance, also respectively by the 5th resistance, the 6th resistance, the 7th resistance is connected the BOUT end of the first amplification chip with the 8th resistance, the A-end of described the first amplification chip is by the 11 grounding through resistance, also by the tenth resistance, connect one end of the 9th resistance, the AOUT end of described the first amplification chip connects one end of the 9th resistance, the other end of the 9th resistance connects the 4A end of an IR signal shaping chip, also respectively by the 9th electric capacity and the tenth capacity earth, the TX_D1+ that the A+ end of described the first amplification chip connects a RJ45 network interface by the second magnetic bead holds.
A HDMI extender receiving terminal, is characterized in that, comprising: the 2nd RJ45 network interface, HDMI input uniform module, the 2nd HDMI processing module, HDMI out connector;
Described the 2nd RJ45 network interface, HDMI input uniform module, the 2nd HDMI processing module are connected successively with HDMI out connector.
Described HDMI extender receiving terminal, also comprises: HDCP and EQ switch, second singlechip controller; Described HDCP and EQ switch connect HDMI input uniform module and the 2nd HDMI processing module by second singlechip controller.
Described HDMI extender receiving terminal, also comprises:
The second infrared receiving interface;
The second infrared emission interface;
For the second driver module that infrared signal is driven and amplified;
Described the second infrared receiving interface is connected described HDMI input uniform module and and the 2nd RJ45 network interface with the second infrared emission interface by described the second driver module.
In described HDMI extender receiving terminal, described HDMI input uniform module comprises that model is equalizer chip, the 3rd ESD chip, the 4th ESD chip, the second AC coupled unit and the second isolated location of MAX3815, and it is the integrated chip of ESD5V3U4U-HDMI that described the 3rd ESD chip and the 4th ESD chip all adopt model; Described the 2nd HDMI processing module comprises: the HDMI signal that model is EP9132N is processed and encryption chip, and the model of described second singlechip controller is EPF011A; Described the second AC coupled unit comprises the 11 electric capacity, the 12 electric capacity, the 13 electric capacity, the 14 electric capacity, the 15 electric capacity, the 16 electric capacity, the 17 electric capacity and the 18 electric capacity;
The TX_D1+ that the RX0_IN-end of described equalizer chip connects the 2nd RJ45 network interface by the 11 electric capacity holds, the TX_D1-that the RX0_IN+ end of described equalizer chip connects the 2nd RJ45 network interface by the 12 electric capacity holds, the BI-D3+ that the RX1_IN-end of described equalizer chip connects the 2nd RJ45 network interface by the 14 electric capacity holds, the BI_D3-that the RX1_IN+ end of described equalizer chip connects the 2nd RJ45 network interface by the 15 electric capacity holds, the RX-D2+ that the RX2_IN-end of described equalizer chip connects the 2nd RJ45 network interface by the 13 electric capacity holds, the RX-D2-that the RX2_IN+ end of described equalizer chip connects the 2nd RJ45 network interface by the 16 electric capacity holds, the BI-D4+ that the RXC_IN+ end of described equalizer chip connects the 2nd RJ45 network interface by the 17 electric capacity holds, also by the 14 resistance, connect 3.3V feeder ear, the BI-D4-that the RXC_IN-end of described equalizer chip connects the 2nd RJ45 network interface by the 18 electric capacity holds, also successively by the 5th magnetic bead and the 6th magnetic bead ground connection,
The RX0_OUT-end of described equalizer chip connects the 1st end of the 3rd ESD chip, the 9th end of described the 3rd ESD chip connects the RX2M end of the processing of HDMI signal and encryption chip, the RX0_OUT+ end of described equalizer chip connects the 2nd end of the 3rd ESD chip, the 8th end of described the 3rd ESD chip connects the RX2P end of the processing of HDMI signal and encryption chip, the RX1_OUT-end of described equalizer chip connects the 4th end of the 3rd ESD chip, the 7th end of the 3rd ESD chip connects the RX1M end of the processing of HDMI signal and encryption chip, the RX1_OUT+ end of described equalizer chip connects the 5th end of the 3rd ESD chip, the 6th end of the 3rd ESD chip connects the RX1P end of the processing of HDMI signal and encryption chip, the RX2_OUT-end of described equalizer chip connects the 1st end of the 4th ESD chip, the 9th end of the 4th ESD chip connects the RX0M end of the processing of HDMI signal and encryption chip, the RX2_OUT+ end of described equalizer chip connects the 2nd end of the 4th ESD chip, the 8th end of the 4th ESD chip connects the RX0P end of the processing of HDMI signal and encryption chip, the RXC_OUT+ end of described equalizer chip connects the 4th end of the 4th ESD chip, the 7th end of the 4th ESD chip connects the RXCM end of the processing of HDMI signal and encryption chip, the RXC_OUT-end of described equalizer chip connects the 5th end of the 4th ESD chip, the 6th end of the 4th ESD chip connects the RXCP end of the processing of HDMI signal and encryption chip,
Described HDMI signal is processed and the TX20P of encryption chip holds the RX2-end that connects HDMI out connector, described HDMI signal is processed and the TX20M of encryption chip holds the RX2+ end that connects HDMI out connector, described HDMI signal is processed and the TX10P of encryption chip holds the RX1-end that connects HDMI out connector, described HDMI signal is processed and the TX10M of encryption chip holds the RX1+ end that connects HDMI out connector, described HDMI signal is processed and the TX00P of encryption chip holds the RX0-end that connects HDMI out connector, described HDMI signal is processed and the TX00M of encryption chip holds the RX0+ end that connects HDMI out connector, described HDMI signal is processed and the TXC0P of encryption chip holds the RXC-end that connects HDMI out connector, described HDMI signal is processed and the TXC0M of encryption chip holds the RXC+ end that connects HDMI out connector, described HDMI signal is processed and the EQ end connection HDCP of encryption chip and the 1st end, the 2nd end and the 3rd end of EQ switch,
The P34 end of described second singlechip controller connects the SCL end of HDMI out connector, the P35 end of described second singlechip controller connects the SDA end of HDMI out connector, the P30 end of described second singlechip controller connects the SCL1(RSVD2 of the processing of HDMI signal and encryption chip) end, the P31 end of described second singlechip controller connects the SDA1(NC of the processing of HDMI signal and encryption chip) end, the P32 end of described second singlechip controller connects the SCL3 end of the processing of HDMI signal and encryption chip, the P33 end of described second singlechip controller connects the SDA3 end of the processing of HDMI signal and encryption chip, the P27 end of described second singlechip controller connects the EXT_RSTB end of the processing of HDMI signal and encryption chip, the P50 end of described second singlechip controller connects the 4th end of HDCP and EQ switch.
In described HDMI extender receiving terminal, described the second driver module comprises the 2nd IR signal shaping chip that the second amplification chip, model that the second infrared signal attenuation units, model are LMH6643MM are 74LVC14, the second gain parameter setting unit, the 7th magnetic bead, the 8th magnetic bead, the second triode and the second pull-up resistor;
Wherein: described the second infrared signal attenuation units comprises the 15 resistance, the 16 resistance, the 17 resistance, the 18 resistance, the 19 resistance, the 20 resistance, the 21 resistance and the 22 resistance; Described the second gain parameter setting unit comprises the 23 resistance, the 24 resistance and the 25 resistance;
The 3rd end of described the second infrared receiving interface is connected the 1A end of the 2nd IR signal shaping chip with the 5th end, the 2Y end of described the 2nd IR signal shaping chip connects the B+ end of the second amplification chip, the 6Y end of described the 2nd IR signal shaping chip connects the base stage of the second triode, the collector electrode of the second triode connects the 3rd end and the 5th end of 5V feeder ear and the second infrared emission interface, the grounded emitter of the second triode by described the second pull-up resistor;
The TX_D1+ that the B-end of described the second amplification chip connects the 2nd RJ45 network interface by the 7th magnetic bead holds, also respectively by the 15 resistance, the 16 resistance, the 17 resistance and the 18 grounding through resistance, also respectively by the 19 resistance, the 20 resistance, the 21 resistance is connected the BOUT end of the second amplification chip with the 22 resistance, the A-end of described the second amplification chip is by the 23 grounding through resistance, also successively by the 24 resistance, the 25 resistance connects the 4A end of the 2nd IR signal shaping chip, the BI-D3+ that the A+ end of described the second amplification chip connects the 2nd RJ45 network interface by the 8th magnetic bead holds.
A single netting twine HDMI extender transmission system, comprises described HDMI extender launch terminal and described HDMI extender receiving terminal; Described HDMI extender launch terminal is connected by a netting twine with HDMI extender receiving terminal, and described netting twine is used for transmitting HDMI signal and infrared signal.
Compared to prior art, the HDMI extender launch terminal that the utility model provides, receiving terminal and extender transmission system, the HDMI signal that receives the output of high-definition signal broadcast source by HDMI connector modules is exported to a HDMI processing module, by HDMI output driver module, the HDMI signal of the one HDMI processing module output is carried out to coupling processing again, then by a RJ45 network interface, HDMI signal is exported to the 2nd RJ45 network interface of HDMI extender receiving terminal, by the HDMI input uniform module of HDMI extender receiving terminal, the HDMI data of input are carried out after coupling processing exports to the 2nd HDMI processing module and process afterwards, HDMI signal is sent to HDMI receiving equipment by HDMI out connector, realize single network cable transmission HDMI signal, greatly reduce and install and maintenance difficulty, and cost is low, it is the very big progress of prior art.
Accompanying drawing explanation
The structured flowchart of the HDMI extender launch terminal that Fig. 1 provides for the utility model.
The circuit diagram of HDMI connector modules in the HDMI extender launch terminal that Fig. 2 provides for the utility model.
The circuit diagram of a HDMI processing module in the HDMI extender launch terminal that Fig. 3 provides for the utility model.
The circuit diagram of HDMI output driver module in the HDMI extender launch terminal that Fig. 4 provides for the utility model.
The circuit diagram of EDID switch and the first singlechip controller in the HDMI extender launch terminal that Fig. 5 provides for the utility model.
The circuit diagram of the first driver module in the HDMI extender launch terminal that Fig. 6 provides for the utility model.
The structured flowchart of the HDMI extender receiving terminal that Fig. 7 provides for the utility model.
The circuit diagram of HDMI input uniform module in the HDMI extender receiving terminal that Fig. 8 provides for the utility model.
The circuit diagram of the 2nd HDMI processing module in the HDMI extender receiving terminal that Fig. 9 the utility model provides.
The circuit diagram of HDCP and EQ switch and second singlechip controller in the HDMI extender receiving terminal that Figure 10 the utility model provides.
The circuit diagram of the second driver module in the HDMI extender receiving terminal that Figure 11 the utility model provides.
Embodiment
The utility model provides a kind of HDMI extender launch terminal, receiving terminal and extender transmission system, realized the transmission that just can realize non-compression HDMI signal by single netting twine CET5E or CAT6, and the transmission that comprises IR signal, not utilize new integration digital video technology HD BASE-T, on cost-saving basis, use single netting twine easy for installation, relatively with two netting twine technology, installation difficulty greatly reduces, has also reduced material cost, user is experienced better.
For making the purpose of this utility model, technical scheme and effect clearer, clear and definite, referring to the accompanying drawing embodiment that develops simultaneously, the utility model is further described.Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.
Refer to Fig. 1, the structured flowchart of the HDMI extender launch terminal that it provides for the utility model.As shown in Figure 1, described launch terminal comprises HDMI connector modules 101, a HDMI processing module 102, HDMI output driver module 103 and a RJ45 network interface 104, and described HDMI connector modules 101, a HDMI processing module 102, HDMI output driver module 103 are connected successively with a RJ45 network interface 104.
Wherein, described HDMI connector modules 101 is for receiving the HDMI signal of high-definition signal broadcast source output, and broadcast source described herein comprises DVD, BD PLAYER etc., and described HDMI signal comprises the state of audio signal, vision signal, signal etc.; A described HDMI processing module 102 is for processing and decode described HDMI signal; Described HDMI output driver module 103 is for processing output AC coupled signal to the signal of HDMI processing module 102 outputs, and the AC coupled of data is processed the conversion that conveniently realizes level, makes the circulation of data more convenient; A described RJ45 network interface is used for exporting HDMI signal, and the utility model adopts RJ45 network interface well known in the art outwards to send HDMI signal, draws materials conveniently, has more reduced cost.
Concrete, when described HDMI connector modules 101 receives after the HDMI signal of broadcast source, described HDMI signal is delivered to a HDMI processing module 102, a described HDMI processing module 102 is processed HDMI signal and decode, and data are delivered to the coupling processing that HDMI output driver module 103 carries out HDMI signal data, then the HDMI signal data after coupling is delivered to HDMI extender receiving terminal by a RJ45 interface 104, the utility model passes through HDMI signal communication coupling processing, facilitate the transmission of data, realize only with a data lines transmission high definition HDMI signal, this is that the utility model is by adopting the key factor of single network cable transmission HDMI signal.
Further; consider that the uncertainty of HDMI receiving equipment (as the LCD TV with HDMI input) configuration is [as band HDCP(High-Bandwidth Digital Content Protection; high-definition digital content protecting) TV, be not with HDCP TV]; the launch terminal that the utility model provides also comprises EDID switch 105 and the first singlechip controller 106, and described EDID switch 105 connects a HDMI processing module 102 by described the first singlechip controller 106.Wherein, described the first singlechip controller 106 is for giving a HDMI processing module 102 by the signal feedback of EDID switch 105 outputs; A described HDMI processing module 102 is also for receiving the control signal of the first singlechip controller 106, and makes corresponding setting.In the specific implementation; for band HDCP(High-bandwidth Digital Content Protection HDCP technology) TV or be not with HDCP TV; the mode of operation of described EDID switch 105 is manually set by user; after EDID switch has been set wherein a kind of pattern, a described HDMI processing module 102 will be according to the corresponding control information processing of decoding.Wherein, EDID switch can analog back-end the EDID information of HDMI receiving equipment (as judged LCD TV, whether support 1080P signal, whether audio frequency supports DOLBY decoding etc.) to passing through the setting of EDID switch, can export and be applicable to the video resolution of different TVs or the audio frequency of support, because also having cancelled this two data lines of DDC passage in single netting twine, because DDC is except reading the EDID information of rear end TV, also need to do regular HDCP verification, so object that the utility model carries out HDCP decoding at HDMI extender launch terminal, in order to cancel audio-video signal, encrypt exactly (by a HDMI processing module 102 decode processing).The situation that whether possesses HDCP decoding according to HDMI receiving equipment by the HDMI extender receiving terminal of rear end has increased HDCP and EQ switch, again encrypts, and can normally insert audio frequency and video (hereinafter will be described in detail HDCP and EQ switch).
Preferably, consider in use, user may be to connecting the high-definition signal broadcast source of HDMI extender launch terminal or carrying out Remote to connecting the display device of HDMI extender receiving terminal, with regard to the described launch terminal of needs, can carry out infrared remote send and receive, described HDMI extender launch terminal also comprises the first infrared receiving interface 107, the first infrared emission interface 108, the first driver element 109 and the first isolated location 110.Wherein, HDMI connector modules 101 is also for transmitting infrared signal, and described the first driver element 109 is for driving infrared signal and amplifying; Described the first isolated location 110 is for preventing HDMI clock signal and ground short circuit.Described the first infrared receiving interface 107 is connected HDMI output driver module 103 and a RJ45 network interface 104 with the first infrared emission interface 108 by the first driver module 109, and described the first isolated location 110 connects described HDMI output driver module 103 and a RJ45 network interface 104.Due to the coupling processing of described HDMI signal through HDMI output driver module 103, so the transmission that infrared signal still can be safe at a RJ45 network interface 104 is not subject to the impact of described HDMI signal herein.
See also Fig. 2, in the launch terminal providing at the utility model, described HDMI connector modules 101 comprises HDMI input connector 1011, an ESD(Electro-Static discharge, static discharges) chip EU1 and the 2nd ESD chip EU2, it is the integrated chip of ESD5V3U4U-HDMI that a wherein said ESD chip EU1 and the 2nd ESD chip EU2 all adopt model.
Concrete, described HDMI input connector 1011 need be linked into HDMI signal the one ESD chip EU1 and the 2nd ESD chip EU2, carries out the transmission of HDMI signal data, the RXC-end of described HDMI input connector 1011 connects the 1st end of an ESD chip EU1, the RXC+ end of described HDMI input connector 1011 connects the 2nd end of an ESD chip EU1, the RX0-end of described HDMI input connector 1011 connects the 4th end of an ESD chip EU1, the RX0+ end of described HDMI input connector 1011 connects the 5th end of an ESD chip EU1, the RX1-end of described HDMI input connector 1011 connects the 1st end of the 2nd ESD chip EU2, the RX1+ end of described HDMI input connector 1011 connects the 2nd end of the 2nd ESD chip EU2, the RX2-end of described HDMI input connector 1011 connects the 4th end of the 2nd ESD chip EU2, the RX2+ end of described HDMI input connector 1011 connects the 5th end of the 2nd ESD chip EU2.
Meanwhile, see also Fig. 3, in the launch terminal that the utility model provides, a described HDMI processing module 102 comprises that model is the HDMI processor 1021 of SII9187 and the analog multiplexer 1022 that model is MC74LVXT4052.
Be embodied as, the RXC-end of described HDMI processor 1021 connects 9 ends of an ESD chip EU1, the RXC+ end of described HDMI processor 1021 connects 8 ends of an ESD chip EU1, the RX0-end of described HDMI processor 1021 connects 7 ends of an ESD chip EU1, the RX0+ end of described HDMI processor 1021 connects 6 ends of an ESD chip EU1, the RX1-end of described HDMI processor 1021 connects 9 ends of the 2nd ESD chip EU2, the RX1+ end of described HDMI processor 1021 connects 8 ends of the 2nd ESD chip EU2, the RX2-end of described HDMI processor 1021 connects 7 ends of the 2nd ESD chip EU2, the RX2+ end of described HDMI processor 1021 connects 6 ends of the 2nd ESD chip EU2.The CBUS-HID end of described HDMI processor 1021 connects the HTPLUG end of HDMI input connector 1011, the X end of described analog multiplexer 1022 connects the SDA end of HDMI input connector 1011, and the Y end of described analog multiplexer 1022 connects the SCL end of HDMI input connector 1011.The HDMI signal that HDMI input connector 1011 receives carries out after antistatic processing through an ESD chip EU1 and the 2nd ESD chip EU2, export to described HDMI processor and process and decode, HDMI processor is delivered to SDA bi-directional data and SCL clock data in analog multiplexer 1022 after processing.
See also Fig. 5, the INT end of described HDMI processor 1021 connects the PD3 end of described the first singlechip controller 106, X1 end and first singlechip controller 106 of the CSDA end connecting analog multiplexer 1022 of described HDMI processor 1021, the Y1 end of the CSCL end connecting analog multiplexer 1022 of described HDMI processor 1021 and the PB/SCL end of the first singlechip controller 106, the Y0 end of the DSCL end connecting analog multiplexer 1022 of described HDMI processor 1021, the X0 end of the DSDA end connecting analog multiplexer 1022 of described HDMI processor 1021.By described HDMI processor 1021, receive the control data that the first single-chip microcomputer 106 transmits, facilitate described HDMI processor 1021 to carry out mode-conversion, HDMI signal is processed accordingly.
See also Fig. 4, in described HDMI extender launch terminal, described HDMI output driver module 103 comprises the first AC coupled unit 1031, and the first driving chip DU1 and second that model is MAX3814 drives chip DU2; Wherein, described the first AC coupled unit 1031 comprises the first capacitor C 1, the second capacitor C 2, the 3rd capacitor C 3, the 4th capacitor C 4, the 5th capacitor C 5, the 6th capacitor C 6, the 7th capacitor C 7 and the 8th capacitor C 8.
Concrete, described first drives the INA+ end and second of chip DU1 to drive the IND-end of chip DU2 to be connected the TXC-end of HDMI processor 1021, described first drives the INA-end and second of chip DU1 to drive the IND+ end of chip DU2 to be connected the TXC+ end of HDMI processor 1021, described first drives the INB+ end and second of chip DU1 to drive the INC-end of chip DU2 to be connected the TX0-end of HDMI processor 1021, described first drives the INB-end and second of chip DU1 to drive the INC+ end of chip DU2 to be connected the TX0+ end of HDMI processor 1021, described first drives the INC+ end and second of chip DU1 to drive the INB-end of chip DU2 to be connected the TX1-end of HDMI processor 1021, described first drives the INC-end and second of chip DU1 to drive the INB+ end of chip DU2 to be connected the TX1+ end of HDMI processor 1021, described first drives the IND+ end and second of chip DU1 to drive the INA-end of chip DU2 to be connected the TX2-end of HDMI processor 1021, described first drives the IND-end and second of chip DU1 to drive the INA+ end of chip DU2 to be connected the TX2+ end of HDMI processor 1021.
Further, the described first RX-D2-that drives the OUTB+ end of chip DU1 and the OUTC-end of the second driving chip DU2 to be connected a RJ45 network interface 104 by the second capacitor C 2 holds, the described first RX-D2+ that drives the OUTB-end of chip DU1 and the OUTC+ end of the second driving chip DU2 to be connected a RJ45 network interface by the 7th capacitor C 7 holds, described first drives the BI_D3-that the OUTC+ end and second of chip DU1 drives the OUTB-end of chip DU2 to be connected a RJ45 network interface 104 by the 8th capacitor C 8 to hold, and described first drives the OUTC-end of chip DU1 and the OUTB+ of the second driving chip DU2 to hold the BI-D3+ that is connected a RJ45 network interface by the 3rd capacitor C 3 to hold, the described first TX_D1+ that drives the OUTD-end of chip DU1 and the OUTA+ end of the second driving chip DU2 to be connected a RJ45 network interface 104 by the 4th capacitor C 4 holds, the described first TX_D1-that drives the OUTD+ end of chip DU1 and the OUTA-end of the second driving chip DU2 to be connected a RJ45 network interface 104 by the first capacitor C 1 holds, the described first BI-D4-that drives the OUTA+ end of chip DU1 and the OUTD-end of the second driving chip DU2 to be connected a RJ45 network interface 104 by the 5th capacitor C 5 holds, the described first BI-D4+ that drives the OUTA-end of chip DU1 and the OUTD+ end of the second driving chip DU2 to be connected a RJ45 network interface 104 by the 6th capacitor C 6 holds.The decoded HDMI signal of HDMI processor 1021 drives chip DU2 to drive processing by the first driving chip DU1 and second, through the coupling processing of the first AC coupled unit 1031, then by a RJ45 interface 104 outside (being HDMI extender receiving terminal), send again.
Please again consult Fig. 5, the circuit diagram of the first singlechip controller and EDID switch in its HDMI extender launch terminal providing for the utility model.In the present embodiment, described the first singlechip controller 106 adopts the integrated chip that model is STM8S103FX, as shown in the figure, the PD3 end of described the first singlechip controller 106 connects the INT end of HDMI processor 1021, the PC5 end of the first singlechip controller 106 connects the 6th end of EDID switch 105, the PC6 end of the first singlechip controller 106 connects the 7th end of EDID switch 105 and the PC7 of the first singlechip controller 106 holds the 8th end that is connected EDID switch 105, the PB4/SCL end of the first singlechip controller 106 connects the CSCL end of HDMI processor 1021 and the Y1 end of analog multiplexer 1022, the PB5/SDA end of the first singlechip controller 106 connects the CSDA end of HDMI processor 1021 and the X1 end of analog multiplexer 1022, the PC3 end of the first singlechip controller 106 connects the A end of described analog multiplexer 1022.User is by manually controlling EDID switch, the first singlechip controller 106 as described in control information (as the control command of need encryption HDMI signal) is transferred to, by described the first singlechip controller 106, to HDMI processor 1021 control information transmissions, and then control a HDMI processing module 102 and carry out corresponding decode operation.
In the present embodiment, and utilize outside EDID switch 105 manually to control HDMI output whether to need to encrypt, facilitate client for HDCP TV or do not use with the TV of HDCP.Because EDID switch is just used for the EDID information of analog back-end TV, and there is no DDC passage because of single netting twine, so must be in HDMI extender transmitting terminal simulation EDID information to HDMI signal player, as DVD, so HDMI extender transmitting terminal is all the time all in HDCP decoding, namely make HDMI extender transmitting terminal only carry out HDCP verification with DVD player, after testing successfully, the DHMI signal that just output is not encrypted, the the first driving chip and second that is MAX3814 by model drives chip to be transferred to the HDMI extender receiving terminal of rear end, the HDMI signal that is EP9132N by the model in HDMI extender receiving terminal is processed and encryption chip carries out HDCP checking again and between HDMI receiving equipment (as LCD TV), if HDCP is proved to be successful, TV is normal output image, as stayed some TV or display, do not support HDCP, now, the HDCP and the EQ switch that only need to HDMI extend receiver are set to OFF, EP9132 just can not carry out HDCP checking with TV so, with regard to the picture of directly publishing picture.
Described HDMI processing module 102 inside are with the SRAM(Static RAM static random access memory of 256K byte) support the editor of EDID.Be that HDMI extender transmitting terminal EDID is processed into 7 kinds of additional a kind of EDID that learn of fixing EDID, thereby can support the netting twine of different length, its 8 kinds of patterns are specific as follows:
See also Fig. 6, the circuit diagram of the first driver module in its HDMI extender launch terminal providing for the utility model.As shown in Figure 6, described the first driver module comprises the IR signal shaping chip SU1 that the first amplification chip AU1, model that the first infrared signal attenuation units 1091, model are LMH6643MM are 74LVC14, the first gain parameter setting unit 1092, filter unit 1092, the first magnetic bead L1, the second magnetic bead L2, the first triode Q1 and the first pull-up resistor R13.
Concrete, described the first infrared signal attenuation units 1091 comprises the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7 and the 8th resistance 8; Described the first gain parameter setting unit 1092 comprises the 9th resistance R 9, the tenth resistance R 10 and the 11 resistance R 11; Described the first filter unit 1093 comprises the 9th capacitor C 9 and the tenth capacitor C 10.
The infrared signal that described the first infrared receiving interface 107 receives (infrared signal of sending as remote controller), through IR signal shaping and drive and amplify process, after IR signal attenuation, the 4th end by a RJ45 network interface 104 transfers to the 1st end of a RJ45 network interface 104 in HDMI extender receiving terminal carries out HDMI receiving equipment (as television set) to control.The first infrared emission interface 108 is for outwards launching infrared signal, this infrared signal is provided by the 4th end and first infrared receiving interface 107 transmission of a RJ45 network interface 104, described infrared control signal is sent to high-definition signal broadcast source and controls accordingly.
In addition, described the first isolated location 110 comprises the 3rd magnetic bead L3, the 4th magnetic bead L4 and the 12 resistance R 12.Wherein, described the 3rd magnetic bead L3 one end connects the BI-D4-end of the 5th capacitor C 5 and a RJ45 network interface 104, and the other end is by the 4th magnetic bead L4 ground connection; Described resistance R 12 one end connect the BI-D4+ end of the 6th capacitor C 6 and a RJ45 network interface 104.The use of described the 3rd magnetic bead L3 and the 4th magnetic bead L4 is in order to prevent HDMI signal ground.Preferably, for guaranteeing the effective and ground isolation when sending of HDMI signal, and infrared signal is more effective uses same network cable transmission with HDMI signal in order to make, it is 3000 ohm, the magnetic bead of 100MHZ that described the first magnetic bead L1 and the second magnetic bead L2 all adopt specification, realize the TX_C signal and ground isolation of a RJ45 network interface 104, be about to the clock signal and ground isolation of HDMI.
Be embodied as, the 3rd end of described the first infrared receiving interface 107 is connected the 1A end of an IR signal shaping chip SU1 with the 5th end, the 2Y end of a described IR signal shaping chip SU1 connects the B+ end of the first amplification chip AU1, the 6Y end of a described IR signal shaping chip SU1 connects the base stage of the first triode Q1, the collector electrode of the first triode Q1 connects the 3rd end and the 5th end of 5V feeder ear and the first infrared emission interface 107, the grounded emitter of the first triode Q1 by described the first pull-up resistor R13.
Further, the BI-D3+ that the B-end of described the first amplification chip AU1 connects a RJ45 network interface 104 by the first magnetic bead L1 holds, also respectively by the first resistance R 1, the second resistance R 2, the 3rd resistance R 3 and the 4th resistance R 4 ground connection, also respectively by the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7 is connected the BOUT end of the first amplification chip AU1 with the 8th resistance R 8, the A-end of described the first amplification chip AU1 is by the 11 resistance R 11 ground connection, also by the tenth resistance R 10, connect one end of the 9th resistance R 9, the AOUT end of described the first amplification chip AU1 connects one end of the 9th resistance R 9, the other end of the 9th resistance R 9 connects the 4A end of an IR signal shaping chip SU1, also respectively by the 9th capacitor C 9 and the tenth capacitor C 10 ground connection, the TX_D1+ that the A+ end of described the first amplification chip AU1 connects a RJ45 network interface 104 by the second magnetic bead L2 holds.
The utility model adopts the 4 group network signals of RJ45 network interface transmission TMDS (as the RXC-in Fig. 3 and Fig. 4, RXC+, RX0-, RX0+, RX1-, RX1+, RX2-, RX2+), and make the first infrared receiving interface 107 receive IR signal and must IR signal attenuation be arrived to 50-90mV (p-p) left and right through the first infrared attenuating unit 1091, the utility model carries out coupling processing to HDMI signal simultaneously, make infrared signal and TMDS signal can pass through same network cable transmission, and can not cause data perturbation.In the processing procedure of infrared remote control IR signal, the signal that the first infrared receiving interface 107 receives, must be through overdriving, and infrared signal is decayed to 50-90mV (p-p) left and right, and this signal infrared signal attenuation amplitude is unsuitable excessive, affects HDMI TMDS signal as excessive.Therefore the processing of IR signal is also that the utility model successfully transmits the key Design of infrared signal and HDMI TMDS signal by single netting twine.
The utility model also provides a kind of HDMI extender receiving terminal, refers to Fig. 7, the structured flowchart of the HDMI extender receiving terminal that it provides for the utility model.As shown in Figure 7, described receiving terminal comprises: the 2nd RJ45 network interface 201, HDMI input uniform module 202, the 2nd HDMI processing module 203 and HDMI out connector 204; Described the 2nd RJ45 network interface 201, HDMI input uniform module 202, the 2nd HDMI processing module 203 are connected successively with HDMI out connector 204; A described RJ45 network interface 104 is connected with the 2nd RJ45 network interface 201 by netting twine.
Wherein, described the 2nd RJ45 network interface 201 is for receiving HDMI signal by netting twine, and described HDMI signal comes from a RJ45 network interface 104 described in above-mentioned launch terminal, as shown in Figure 1; Described HDMI input uniform module 202 is for carrying out AC coupled processing and amplification to the HDMI signal of the 2nd RJ45 network interface 201 outputs; Described the 2nd HDMI processing module 203 is for processing and encrypt the signal of HDMI input uniform module 202 outputs; Described HDMI out connector 204 is play to HDMI receiving equipment (as HDTV (High-Definition Television)) for exporting HDMI signal.
In the specific implementation, described the 2nd RJ45 network interface 201 receives after the HDMI signal of RJ45 network interface 104 transmissions by netting twine, export described HDMI signal to HDMI input uniform module 202 and carry out AC coupled processing and amplification, then by 203 pairs of described HDMI signals of the 2nd HDMI processing module, process and encrypt, then by HDMI out connector 204, export described HDMI signal to HDMI receiving equipment and play.
Further, described receiving terminal also comprises HDCP and EQ switch 205 and second singlechip controller 206, and described HDCP and EQ switch 205 connect HDMI input uniform module 202 and the 2nd HDMI processing module 203 by second singlechip controller 206.Wherein, described second singlechip controller 206 for by the signal feedback of HDCP and EQ switch 205 outputs to HDMI input uniform module 202 and the 2nd HDMI processing module 203, HDCP described herein and EQ equalizer switch 205 in use principle and function with above-mentioned launch terminal in EDID switch 105 similar, wherein HDCP and EQ switch 205 are HDCP switch+EQ level switch, wherein, EQ switch is according to different length of mesh wires, or the decay of the netting twine of different size to DHMI signal, by MAX3815 equalizer chip, HDMI signal is made to a signal equalization amplifying signal, reform and arrive the switch that arranges of best HDMI output signal effect.HDCP and EQ switch are the toggle switch of 4, and 3 are used for doing EQ signal equalization, and another one is used for doing HDCP switch, and HDMI signal is encrypted again, export to the video of televising.
Certainly, consider that user need to carry out Long-distance Control by the HDMI extender receiving terminal pair high-definition signal broadcast source being connected with HDMI extender launch terminal or by the HDMI extender launch terminal pair HDMI receiving equipment being connected with HDMI extender receiving terminal, described HDMI extender receiving terminal also comprises: the second infrared receiving interface 207, the second infrared emission interface 208 and the second driver module 209, described the second infrared receiving interface 207 is connected described HDMI input uniform module 202 and the 2nd RJ45 network interface 201 with the second infrared emission interface 208 by described the second driver module 209, wherein, described the second driver module 209 is for driving infrared signal and amplifying.
In the specific implementation, see also Fig. 8 and Fig. 9.As shown in the figure, in described receiving terminal, described HDMI input uniform module 202 comprises that model is equalizer chip BU1, the 3rd ESD chip EU3, the 4th ESD chip EU4, the second AC coupled unit 2021 and the second isolated location 2022 of MAX3815, and it is the integrated chip of ESD5V3U4U-HDMI that described the 3rd ESD chip EU3 and the 4th ESD chip EU4 all adopt model.Wherein, described the second AC coupled unit 2021 comprises the 11 capacitor C the 11, the 12 capacitor C the 12, the 13 capacitor C the 13, the 14 capacitor C the 14, the 15 capacitor C the 15, the 16 capacitor C the 16, the 17 capacitor C 17 and the 18 capacitor C 18; Described the 2nd HDMI processing module 203 comprises: the HDMI signal that model is EP9132N is processed and encryption chip HU1.
Described the second isolated location 2022 comprises the 5th magnetic bead L5, the 6th magnetic bead L6 and the 14 resistance R 14.Wherein, one end of described the 5th magnetic bead L5 connects the BI-D4-end of the 18 capacitor C 18 and the 2nd RJ45 network interface, and the other end is by the 6th magnetic bead L6 ground connection; One end of described the 14 resistance R 14 connects the BI-D4+ end of the 17 capacitor C 17 and the 2nd RJ45 network interface.Preferably, in order to make the second isolated location 2022 reach the technique effect identical with the first isolated location 1032 described in HDMI extender launch terminal, it is 3000 ohm, the magnetic bead of 100MHZ that described the 5th magnetic bead L5 and the 6th magnetic bead L6 all adopt specification, its principle is identical with above-mentioned the first isolated location, repeats no more herein.
Concrete, the launch terminal that described equalizer chip BU1 receives the 2nd RJ45 network interface 201 inputs by the second AC coupled unit 2021 is carried the HDMI signal of coming; wherein, the TX_D1+ that the RX0_IN-end of described equalizer chip BU1 connects the 2nd RJ45 network interface 201 by the 11 capacitor C 11 holds, the TX_D1-that the RX0_IN+ end of described equalizer chip BU1 connects the 2nd RJ45 network interface by the 12 capacitor C 12 holds, the BI-D3+ that the RX1_IN-end of described equalizer chip BU1 connects the 2nd RJ45 network interface 201 by the 14 capacitor C 14 holds, the BI_D3-that the RX1_IN+ end of described equalizer chip BU1 connects the 2nd RJ45 network interface 201 by the 15 capacitor C 15 holds, the RX-D2+ that the RX2_IN-end of described equalizer chip BU1 connects the 2nd RJ45 network interface 201 by the 13 capacitor C 13 holds, the RX-D2-that the RX2_IN+ end of described equalizer chip BU1 connects the 2nd RJ45 network interface 201 by the 16 capacitor C 16 holds, the BI-D4+ that the RXC_IN+ end of described equalizer chip BU1 connects the 2nd RJ45 network interface 201 by the 17 capacitor C 17 holds, also by the 14 resistance C14, connect 3.3V feeder ear, the BI-D4-that the RXC_IN-end of described equalizer chip BU1 connects the 2nd RJ45 network interface 201 by the 18 capacitor C 18 holds, also successively by the 5th magnetic bead L5 and the 6th magnetic bead L6 ground connection.
Further, described equalizer chip BU1, by described the 3rd ESD chip EU3 and the 4th ESD chip EU4, is sent to described HDMI signal by the HDMI signal data after coupling and processes and encryption chip HU1, wherein, the RX0_OUT-end of described equalizer chip BU1 connects the 1st end of the 3rd ESD chip EU3, the 9th end of described the 3rd ESD chip EU3 connects the RX2M end of the processing of HDMI signal and encryption chip HU1, the RX0_OUT+ end of described equalizer chip BU1 connects the 2nd end of the 3rd ESD chip EU3, the 8th end of described the 3rd ESD chip EU3 connects the RX2P end of the processing of HDMI signal and encryption chip HU1, the RX1_OUT-end of described equalizer chip BU1 connects the 4th end of the 3rd ESD chip EU3, the 7th end of the 3rd ESD chip EU3 connects the RX1M end of the processing of HDMI signal and encryption chip HU1, the RX1_OUT+ end of described equalizer chip BU1 connects the 5th end of the 3rd ESD chip EU1, the 6th end of the 3rd ESD chip EU3 connects the RX1P end of the processing of HDMI signal and encryption chip HU1, the RX2_OUT-end of described equalizer chip BU1 connects the 1st end of the 4th ESD chip EU4, the 9th end of the 4th ESD chip EU4 connects the RX0M end of the processing of HDMI signal and encryption chip HU1, the RX2_OUT+ end of described equalizer chip BU1 connects the 2nd end of the 4th ESD chip EU4, the 8th end of the 4th ESD chip EU4 connects the RX0P end of the processing of HDMI signal and encryption chip HU1, the RXC_OUT+ end of described equalizer chip BU1 connects the 4th end of the 4th ESD chip EU4, the 7th end of the 4th ESD chip EU4 connects the RXCM end of the processing of HDMI signal and encryption chip HU1, the RXC_OUT-end of described equalizer chip BU1 connects the 5th end of the 4th ESD chip EU4, the 6th end of the 4th ESD chip EU4 connects the RXCP end of the processing of HDMI signal and encryption chip HU1.
Further, described HDMI signal is processed and encryption chip HU1 also needs to carry out corresponding pattern (for example for HDCP TV, not with the pattern of HDCP TV) conversion according to the control signal of described HDCP and EQ switch 205, sees also Figure 10.Wherein, described HDMI signal is processed and the TX20P of encryption chip HU1 holds the RX2-end that connects HDMI out connector 204, described HDMI signal is processed and the TX20M of encryption chip HU1 holds the RX2+ end that connects HDMI out connector 204, described HDMI signal is processed and the TX10P of encryption chip HU1 holds the RX1-end that connects HDMI out connector 204, described HDMI signal is processed and the TX10M of encryption chip HU1 holds the RX1+ end that connects HDMI out connector 204, described HDMI signal is processed and the TX00P of encryption chip HU1 holds the RX0-end that connects HDMI out connector 204, described HDMI signal is processed and the TX00M of encryption chip HU1 holds the RX0+ end that connects HDMI out connector 204, described HDMI signal is processed and the TXC0P of encryption chip HU1 holds the RXC-end that connects HDMI out connector 204, described HDMI signal is processed and the TXC0M of encryption chip HU1 holds the RXC+ end that connects HDMI out connector 204, described HDMI signal is processed and the EQ end connection HDCP of encryption chip HU1 and the 1st end, the 2nd end and the 3rd end of EQ switch 105.
As shown in figure 10, the model of described second singlechip controller 206 is EPF011A, for the control signal of described HDCP and EQ switch 205 being transferred to described HDMI input uniform module 202 and described the 2nd HDMI processing module 203.During concrete enforcement, the P34 end of described second singlechip controller 206 connects the SCL end of HDMI out connector 204, the P35 end of described second singlechip controller 206 connects the SDA end of HDMI out connector 204, the P30 end of described second singlechip controller connects the SCL1(RSVD2 of the processing of HDMI signal and encryption chip HU1) end, the P31 end of described second singlechip controller 206 connects the SDA1(NC of the processing of HDMI signal and encryption chip HU1) end, the P32 end of described second singlechip controller 206 connects the SCL3 end of the processing of HDMI signal and encryption chip HU1, the P33 end of described second singlechip controller 206 connects the SDA3 end of the processing of HDMI signal and encryption chip HU1, the P27 end of described second singlechip controller 206 connects the EXT_RSTB end of the processing of HDMI signal and encryption chip HU1, the P50 end of described second singlechip controller 206 connects the 4th end of HDCP and EQ switch 205.
Preferably, in the present embodiment, described in the operation principle of described the 2nd HDMI processing module 203 and mode of operation and described launch terminal, a HDMI processing module 102 is consistent; The mode of operation of described HDMI input uniform module 202 is as shown in the table, is wherein divided into 8 kinds of mode of operations:
See also Figure 11, the circuit diagram of the second driver module in its HDMI extender receiving terminal providing for the utility model.As shown in figure 11, described the second driver module 209 comprises the 2nd IR signal shaping chip SU2, the second gain parameter setting unit 2092, the 7th magnetic bead L7, the 8th magnetic bead L8, the second triode Q2 and the second pull-up resistor R26 that the second amplification chip AU2, model that the second infrared signal attenuation units 2091, model are LMH6643MM are 74LVC14.
Wherein, described the second infrared signal attenuation units 2091 comprises the 15 resistance R the 15, the 16 resistance R the 16, the 17 resistance R the 17, the 18 resistance R the 18, the 19 resistance R the 19, the 20 resistance R the 20, the 21 resistance R 21 and the 22 resistance R22; Described the second gain parameter setting unit 2092 comprises the 23 resistance R the 23, the 24 resistance R 24 and the 25 resistance R 25.
Wherein, the 3rd end of described the second infrared receiving interface 207 is connected the 1A end of the 2nd IR signal shaping chip SU2 with the 5th end, the 2Y end of described the 2nd IR signal shaping chip SU2 connects the B+ end of the second amplification chip AU2, the 6Y end of described the 2nd IR signal shaping chip SU2 connects the base stage of the second triode Q2, the collector electrode of the second triode Q2 connects the 3rd end and the 5th end of 5V feeder ear and the second infrared emission interface 208, the grounded emitter of the second triode Q2 by described the second pull-up resistor R26.
The TX_D1+ that the B-end of described the second amplification chip AU2 connects the 2nd RJ45 network interface 201 by the 7th magnetic bead L7 holds, also respectively by the 15 resistance R 15, the 16 resistance R 16, the 17 resistance R 17 and the 18 resistance R 18 ground connection, also respectively by the 19 resistance R 19, the 20 resistance R 20, the 21 resistance R 21 is connected the BOUT end of the second amplification chip AU2 with the 22 resistance R 22, the A-end of described the second amplification chip AU2 is by the 23 resistance R 23 ground connection, also successively by the 24 resistance R 24, the 25 resistance R 25 connects the 4A end of the 2nd IR signal shaping chip SU2, the BI-D3+ that the A+ end of described the second amplification chip AU2 connects the 2nd RJ45 network interface 201 by the 8th magnetic bead L8 holds.Preferably, in order to make infrared signal, more effective to use same network cable transmission, described the 7th magnetic bead L7 and the two or eight magnetic bead L8 all to adopt specification with HDMI signal be 3000 ohm, the magnetic bead of 100MHZ.
The infrared signal that the second infrared receiving interface 207 receives, through after being transferred to the 4th end of a RJ45 network interface, processed by a HDMI processing module by the 1st end of the 2nd RJ45 network interface 201 after IR signal shaping, driving and amplification, IR signal attenuation, is controlled high-definition signal broadcast source; The second infrared emission interface 208 is for outwards launching infrared signal, this infrared signal is provided by the 1st end and second infrared receiving interface 207 transmission of the 2nd RJ45 network interface 204, after HDMI input uniform module and the processing of the 2nd HDMI processing module, control HDMI receiving equipment, the utility model is used same set of infrared signal processing circuit by HDMI extender launch terminal and HDMI extender receiving terminal, can complete IR signal transmitted in both directions.
The utility model also provides a kind of single netting twine HDMI extender transmission system, comprises above-mentioned HDMI extender launch terminal and above-mentioned HDMI extender receiving terminal; Described HDMI extender launch terminal is connected by a netting twine with HDMI extender receiving terminal, and described netting twine is used for transmitting HDMI signal and infrared signal.By HDMI connector modules, receive the HDMI signal of high-definition signal broadcast source output, after by a HDMI processing module, HDMI signal being processed and being decoded, by HDMI output driver module, decoded HDMI signal is carried out to coupling processing again, then by a RJ45 network interface, HDMI signal is exported to the 2nd RJ45 network interface of HDMI extender receiving terminal, by the HDMI input uniform module of HDMI extender receiving terminal, the HDMI data of input are carried out to coupling processing afterwards, after the 2nd HDMI processing module is processed and is encrypted, HDMI signal is sent to HDMI receiving equipment by HDMI out connector.And can also transmitted in both directions infrared signal, from HDMI extender launch terminal, can send infrared signal to HDMI extender receiving terminal, from HDMI extender receiving terminal, also can send infrared signal to HDMI extender launch terminal, be convenient for users to operate.Embodiment and implementation result, as above to describe, are not repeating herein.
In sum, HDMI extender launch terminal, receiving terminal and extender transmission system that the utility model provides, by HDMI signal is carried out to coupling processing, realize single netting twine and can transmit HDMI signal, can transmit infrared signal again, it has following technique effect:
1, only need to use single network cable transmission HDMI signal, and IR control signal, installation difficulty is low, is also convenient to maintenance; And the function of all chips that use is the intrinsic function of existing chip, the utility model has increased, and the hardware resistance such as AC coupled, isolation, decay, have just realized single network cable transmission HDMI signal and IR control signal, and its cost is low;
2,8 kinds of EQ equalizer amplification modes, the netting twine of support different length;
3, the public same data lines of IR signal and HDMI differential pair (netting twine), in the situation that not affecting audio video transmission completely, having realized two-way infrared IR signal can transmit simultaneously, when HDMI receiving equipment and display device no longer same room or 50 meters when remote, realize two-way IR and control, user's mode of operation;
4, can be compatible not with high-clear display and the HDTV of HDCP.
Be understandable that; for those of ordinary skills; can be equal to replacement or change according to the technical solution of the utility model and utility model design thereof, and all these changes or replacement all should belong to the protection range of the appended claim of the utility model.

Claims (12)

1. a HDMI extender launch terminal, is characterized in that, comprising: HDMI connector modules, a HDMI processing module, HDMI output driver module and a RJ45 network interface;
Described HDMI connector modules, a HDMI processing module, HDM I output driver module are connected successively with a RJ45 network interface.
2. HDMI extender launch terminal according to claim 1, is characterized in that, also comprises: EDID switch and the first singlechip controller; Described EDID switch connects a HDMI processing module by the first singlechip controller.
3. HDMI extender launch terminal according to claim 2, is characterized in that, also comprises:
The first infrared receiving interface;
The first infrared emission interface;
For the first driver module that infrared signal is driven and amplified;
For preventing the first isolated location of HDMI clock signal and ground short circuit;
Described the first infrared receiving interface is connected HDMI output driver module and a RJ45 network interface with the first infrared emission interface by described the first driver module, and described the first isolated location connects described HDMI output driver module and a RJ45 network interface.
4. HDMI extender launch terminal according to claim 3, is characterized in that, described HDMI connector modules comprises HDMI input connector, an ESD chip and the 2nd ESD chip; It is the integrated chip of ESD5V3U4U-HDMI that a described ESD chip and the 2nd ESD chip all adopt model; The one HDMI processing module comprises that model is the HDMI processor of SII9187 and the analog multiplexer that model is MC74LVXT4052; HDMI output driver module comprises the first AC coupled unit, and model to be MAX3814 first drive chip and second to drive chip, described the first AC coupled unit comprises the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity, the 5th electric capacity, the 6th electric capacity, the 7th electric capacity and the 8th electric capacity;
The RXC-end of described HDMI input connector connects the 1st end of an ESD chip, the RXC+ end of described HDMI input connector connects the 2nd end of an ESD chip, the RX0-end of described HDMI input connector connects the 4th end of an ESD chip, the RX0+ end of described HDMI input connector connects the 5th end of an ESD chip, the RX1-end of described HDMI input connector connects the 1st end of the 2nd ESD chip, the RX1+ end of described HDMI input connector connects the 2nd end of the 2nd ESD chip, the RX2-end of described HDMI input connector connects the 4th end of the 2nd ESD chip, the RX2+ end of described HDMI input connector connects the 5th end of the 2nd ESD chip,
The RXC-end of described HDMI processor connects 9 ends of an ESD chip, the RXC+ end of described HDMI processor connects 8 ends of an ESD chip, the RX0-end of described HDMI processor connects 7 ends of an ESD chip, the RX0+ end of described HDMI processor connects 6 ends of an ESD chip, the RX1-end of described HDMI processor connects 9 ends of the 2nd ESD chip, the RX1+ end of described HDMI processor connects 8 ends of the 2nd ESD chip, the RX2-end of described HDMI processor connects 7 ends of the 2nd ESD chip, the RX2+ end of described HDMI processor connects 6 ends of the 2nd ESD chip,
The INT end of described HDMI processor connects described the first singlechip controller, X1 end and first singlechip controller of the CSDA end connecting analog multiplexer of described HDMI processor, Y1 end and first singlechip controller of the CSCL end connecting analog multiplexer of described HDMI processor, the Y0 end of the DSCL end connecting analog multiplexer of described HDMI processor, the X0 end of the DSDA end connecting analog multiplexer of described HDMI processor;
The CBUS-HID end of described HDMI processor connects the HTPLUG end of HDMI input connector, and the X end of described analog multiplexer connects the SDA end of HDMI input connector, and the Y end of described analog multiplexer connects the SCL end of HDMI input connector;
Described first drives the INA+ end and second of chip to drive the IND-end of chip to be connected the TXC-end of HDMI processor, described first drives the INA-end and second of chip to drive the IND+ end of chip to be connected the TXC+ end of HDMI processor, described first drives the INB+ end and second of chip to drive the INC-end of chip to be connected the TX0-end of HDMI processor, described first drives the INB-end and second of chip to drive the INC+ end of chip to be connected the TX0+ end of HDMI processor, described first drives the INC+ end and second of chip to drive the INB-end of chip to be connected the TX1-end of HDMI processor, described first drives the INC-end and second of chip to drive the INB+ end of chip to be connected the TX1+ end of HDMI processor, described first drives the IND+ end and second of chip to drive the INA-end of chip to be connected the TX2-end of HDMI processor, described first drives the IND-end and second of chip to drive the INA+ end of chip to be connected the TX2+ end of HDMI processor,
The described first RX-D2-that drives the OUTB+ end of chip and the OUTC-end of the second driving chip to be connected a RJ45 network interface by the second electric capacity holds, the described first RX-D2+ that drives the OUTB-end of chip and the OUTC+ end of the second driving chip to be connected a RJ45 network interface by the 7th electric capacity holds, described first drives the BI_D3-that the OUTC+ end and second of chip drives the OUTB-end of chip to be connected a RJ45 network interface by the 8th electric capacity to hold, and described first drives the OUTC-end of chip and the OUTB+ of the second driving chip to hold the BI-D3+ that is connected a RJ45 network interface by the 3rd electric capacity to hold, the described first TX_D1+ that drives the OUTD-end of chip and the OUTA+ end of the second driving chip to be connected a RJ45 network interface by the 4th electric capacity holds, the described first TX_D1-that drives the OUTD+ end of chip and the OUTA-end of the second driving chip to be connected a RJ45 network interface by the first electric capacity holds, the described first BI-D4-that drives the OUTA+ end of chip and the OUTD-end of the second driving chip to be connected a RJ45 network interface by the 5th electric capacity holds, the described first BI-D4+ that drives the OUTA-end of chip and the OUTD+ end of the second driving chip to be connected a RJ45 network interface by the 6th electric capacity holds.
5. HDMI extender launch terminal according to claim 4, it is characterized in that, the first singlechip controller adopts the integrated chip that model is STM8S103FX, the PD3 end of described the first singlechip controller connects the INT end of HDMI processor, the PC5 end of the first singlechip controller connects the 6th end of EDID switch, the PC6 end of the first singlechip controller connects the 7th end of EDID switch and the PC7 of the first singlechip controller holds the 8th end that is connected EDID switch, the PB4/SCL end of the first singlechip controller connects the CSCL end of HDMI processor and the Y1 end of analog multiplexer, the PB5/SDA end of the first singlechip controller connects the CSDA end of HDMI processor and the X1 end of analog multiplexer, the PC3 end of the first singlechip controller connects the A end of described analog multiplexer.
6. HDMI extender launch terminal according to claim 5, it is characterized in that, described the first driver module comprises the IR signal shaping chip that the first amplification chip, model that the first infrared signal attenuation units, model are LMH6643MM are 74LVC14, the first gain parameter setting unit, filter unit, the first magnetic bead, the second magnetic bead, the first triode and the first pull-up resistor;
Wherein: described the first infrared signal attenuation units comprises the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance and the 8th resistance; Described the first gain parameter setting unit comprises the 9th resistance, the tenth resistance and the 11 resistance; Described the first filter unit comprises the 9th electric capacity and the tenth electric capacity;
The 3rd end of described the first infrared receiving interface is connected the 1A end of an IR signal shaping chip with the 5th end, the 2Y end of a described IR signal shaping chip connects the B+ end of the first amplification chip, the 6Y end of a described IR signal shaping chip connects the base stage of the first triode, the collector electrode of the first triode connects the 3rd end and the 5th end of 5V feeder ear and the first infrared emission interface, the grounded emitter of the first triode by described the first pull-up resistor;
The BI-D3+ that the B-end of described the first amplification chip connects a RJ45 network interface by the first magnetic bead holds, also respectively by the first resistance, the second resistance, the 3rd resistance and the 4th grounding through resistance, also respectively by the 5th resistance, the 6th resistance, the 7th resistance is connected the BOUT end of the first amplification chip with the 8th resistance, the A-end of described the first amplification chip is by the 11 grounding through resistance, also by the tenth resistance, connect one end of the 9th resistance, the AOUT end of described the first amplification chip connects one end of the 9th resistance, the other end of the 9th resistance connects the 4A end of an IR signal shaping chip, also respectively by the 9th electric capacity and the tenth capacity earth, the TX_D1+ that the A+ end of described the first amplification chip connects a RJ45 network interface by the second magnetic bead holds.
7. a HDMI extender receiving terminal, is characterized in that, comprising: the 2nd RJ45 network interface, HDMI input uniform module, the 2nd HDMI processing module, HDMI out connector;
Described the 2nd RJ45 network interface, HDMI input uniform module, the 2nd HDMI processing module are connected successively with HDMI out connector.
8. HDMI extender receiving terminal according to claim 7, is characterized in that, also comprises: HDCP and EQ switch, second singlechip controller; Described HDCP and EQ switch connect HDMI input uniform module and the 2nd HDMI processing module by second singlechip controller.
9. HDMI extender receiving terminal according to claim 8, is characterized in that, also comprises:
The second infrared receiving interface;
The second infrared emission interface;
For the second driver module that infrared signal is driven and amplified;
Described the second infrared receiving interface is connected described HDMI input uniform module and the 2nd RJ45 network interface with the second infrared emission interface by described the second driver module.
10. HDMI extender receiving terminal according to claim 9, it is characterized in that, described HDMI input uniform module comprises that model is equalizer chip, the 3rd ESD chip, the 4th ESD chip, the second AC coupled unit and the second isolated location of MAX3815, and it is the integrated chip of ESD5V3U4U-HDMI that described the 3rd ESD chip and the 4th ESD chip all adopt model; Described the 2nd HDMI processing module comprises: the HDMI signal that model is EP9132N is processed and encryption chip; The model of described second singlechip controller is EPF011A; Described the second AC coupled unit comprises the 11 electric capacity, the 12 electric capacity, the 13 electric capacity, the 14 electric capacity, the 15 electric capacity, the 16 electric capacity, the 17 electric capacity and the 18 electric capacity;
The TX_D1+ that the RX0_IN-end of described equalizer chip connects the 2nd RJ45 network interface by the 11 electric capacity holds, the TX_D1-that the RX0_IN+ end of described equalizer chip connects the 2nd RJ45 network interface by the 12 electric capacity holds, the BI-D3+ that the RX1_IN-end of described equalizer chip connects the 2nd RJ45 network interface by the 14 electric capacity holds, the BI_D3-that the RX1_IN+ end of described equalizer chip connects the 2nd RJ45 network interface by the 15 electric capacity holds, the RX-D2+ that the RX2_IN-end of described equalizer chip connects the 2nd RJ45 network interface by the 13 electric capacity holds, the RX-D2-that the RX2_IN+ end of described equalizer chip connects the 2nd RJ45 network interface by the 16 electric capacity holds, the BI-D4+ that the RXC_IN+ end of described equalizer chip connects the 2nd RJ45 network interface by the 17 electric capacity holds, also by the 14 resistance, connect 3.3V feeder ear, the BI-D4-that the RXC_IN-end of described equalizer chip connects the 2nd RJ45 network interface by the 18 electric capacity holds, also successively by the 5th magnetic bead and the 6th magnetic bead ground connection,
The RX0_OUT-end of described equalizer chip connects the 1st end of the 3rd ESD chip, the 9th end of described the 3rd ESD chip connects the RX2M end of the processing of HDMI signal and encryption chip, the RX0_OUT+ end of described equalizer chip connects the 2nd end of the 3rd ESD chip, the 8th end of described the 3rd ESD chip connects the RX2P end of the processing of HDMI signal and encryption chip, the RX1_OUT-end of described equalizer chip connects the 4th end of the 3rd ESD chip, the 7th end of the 3rd ESD chip connects the RX1M end of the processing of HDMI signal and encryption chip, the RX1_OUT+ end of described equalizer chip connects the 5th end of the 3rd ESD chip, the 6th end of the 3rd ESD chip connects the RX1P end of the processing of HDMI signal and encryption chip, the RX2_OUT-end of described equalizer chip connects the 1st end of the 4th ESD chip, the 9th end of the 4th ESD chip connects the RX0M end of the processing of HDMI signal and encryption chip, the RX2_OUT+ end of described equalizer chip connects the 2nd end of the 4th ESD chip, the 8th end of the 4th ESD chip connects the RX0P end of the processing of HDMI signal and encryption chip, the RXC_OUT+ end of described equalizer chip connects the 4th end of the 4th ESD chip, the 7th end of the 4th ESD chip connects the RXCM end of the processing of HDMI signal and encryption chip, the RXC_OUT-end of described equalizer chip connects the 5th end of the 4th ESD chip, the 6th end of the 4th ESD chip connects the RXCP end of the processing of HDMI signal and encryption chip,
Described HDMI signal is processed and the TX20P of encryption chip holds the RX2-end that connects HDMI out connector, described HDMI signal is processed and the TX20M of encryption chip holds the RX2+ end that connects HDMI out connector, described HDMI signal is processed and the TX10P of encryption chip holds the RX1-end that connects HDMI out connector, described HDMI signal is processed and the TX10M of encryption chip holds the RX1+ end that connects HDMI out connector, described HDMI signal is processed and the TX00P of encryption chip holds the RX0-end that connects HDMI out connector, described HDMI signal is processed and the TX00M of encryption chip holds the RX0+ end that connects HDMI out connector, described HDMI signal is processed and the TXC0P of encryption chip holds the RXC-end that connects HDMI out connector, described HDMI signal is processed and the TXC0M of encryption chip holds the RXC+ end that connects HDMI out connector, described HDMI signal is processed and the EQ end connection HDCP of encryption chip and the 1st end, the 2nd end and the 3rd end of EQ switch,
The P34 end of described second singlechip controller connects the SCL end of HDMI out connector, the P35 end of described second singlechip controller connects the SDA end of HDMI out connector, the P30 end of described second singlechip controller connects the SCL1(RSVD2 of the processing of HDMI signal and encryption chip) end, the P31 end of described second singlechip controller connects the SDA1(NC of the processing of HDMI signal and encryption chip) end, the P32 end of described second singlechip controller connects the SCL3 end of the processing of HDMI signal and encryption chip, the P33 end of described second singlechip controller connects the SDA3 end of the processing of HDMI signal and encryption chip, the P27 end of described second singlechip controller connects the EXT_RSTB end of the processing of HDMI signal and encryption chip, the P50 end of described second singlechip controller connects the 4th end of HDCP and EQ switch.
11. HDMI extender receiving terminals according to claim 10, it is characterized in that, described the second driver module comprises the 2nd IR signal shaping chip that the second amplification chip, model that the second infrared signal attenuation units, model are LMH6643MM are 74LVC14, the second gain parameter setting unit, the 7th magnetic bead, the 8th magnetic bead, the second triode and the second pull-up resistor;
Wherein: described the second infrared signal attenuation units comprises the 15 resistance, the 16 resistance, the 17 resistance, the 18 resistance, the 19 resistance, the 20 resistance, the 21 resistance and the 22 resistance; Described the second gain parameter setting unit comprises the 23 resistance, the 24 resistance and the 25 resistance;
The 3rd end of described the second infrared receiving interface is connected the 1A end of the 2nd IR signal shaping chip with the 5th end, the 2Y end of described the 2nd IR signal shaping chip connects the B+ end of the second amplification chip, the 6Y end of described the 2nd IR signal shaping chip connects the base stage of the second triode, the collector electrode of the second triode connects the 3rd end and the 5th end of 5V feeder ear and the second infrared emission interface, the grounded emitter of the second triode by described the second pull-up resistor;
The TX_D1+ that the B-end of described the second amplification chip connects the 2nd RJ45 network interface by the 7th magnetic bead holds, also respectively by the 15 resistance, the 16 resistance, the 17 resistance and the 18 grounding through resistance, also respectively by the 19 resistance, the 20 resistance, the 21 resistance is connected the BOUT end of the second amplification chip with the 22 resistance, the A-end of described the second amplification chip is by the 23 grounding through resistance, also successively by the 24 resistance, the 25 resistance connects the 4A end of the 2nd IR signal shaping chip, the BI-D3+ that the A+ end of described the second amplification chip connects the 2nd RJ45 network interface by the 8th magnetic bead holds.
12. 1 kinds of single netting twine HDMI extender transmission systems, is characterized in that, comprise HDMI extender launch terminal as described in claim 1-6 any one and the HDMI extender receiving terminal as described in claim 7-11 any one; Described HDMI extender launch terminal is connected by a netting twine with HDMI extender receiving terminal, and described netting twine is used for transmitting HDMI signal and infrared signal.
CN201420169407.2U 2014-04-09 2014-04-09 HDMI extender launch terminal, receiving terminal and extender transmission system Expired - Fee Related CN203984559U (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105657315A (en) * 2015-12-29 2016-06-08 龙迅半导体(合肥)股份有限公司 Data transmission method and device, and HDMI single cable extender
CN106412686A (en) * 2016-09-26 2017-02-15 龙迅半导体(合肥)股份有限公司 Data transmission method and single-networkcable extender for HDMI (High Definition Multimedia Interface) signals
CN106791555A (en) * 2016-12-29 2017-05-31 龙迅半导体(合肥)股份有限公司 A kind of single netting twine extender of data transmission method, HDMI signals

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105657315A (en) * 2015-12-29 2016-06-08 龙迅半导体(合肥)股份有限公司 Data transmission method and device, and HDMI single cable extender
CN106412686A (en) * 2016-09-26 2017-02-15 龙迅半导体(合肥)股份有限公司 Data transmission method and single-networkcable extender for HDMI (High Definition Multimedia Interface) signals
CN106791555A (en) * 2016-12-29 2017-05-31 龙迅半导体(合肥)股份有限公司 A kind of single netting twine extender of data transmission method, HDMI signals

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