CN103533281A - MHL (mobile high-definition link) recognition control circuit with enhanced compatibility - Google Patents
MHL (mobile high-definition link) recognition control circuit with enhanced compatibility Download PDFInfo
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- CN103533281A CN103533281A CN201310448152.3A CN201310448152A CN103533281A CN 103533281 A CN103533281 A CN 103533281A CN 201310448152 A CN201310448152 A CN 201310448152A CN 103533281 A CN103533281 A CN 103533281A
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Abstract
The invention provides an MHL (mobile high-definition link) recognition control circuit with enhanced compatibility. The MHL recognition control circuit comprises an MHL recognition unit and a wake-up pulse detecting unit, wherein the MHL recognition unit comprises a recognition signal input end and a recognition signal output end, a wake-up pulse input end of the wake-up pulse detecting unit is connected to an MHL_CBUS signal end of MHL equipment, and a wake-up pulse output end is connected to a main control module of digital multimedia receiving equipment. Under the standby condition of the digital multimedia receiving equipment, the MHL equipment sends MHL wake-up pulses to a wake-up pulse unit, in addition, the MHL wake-up pulses are output to the main control module by the wake-up pulse output end after being processed, the main control module judges whether the received MHL wake-up pulses meet the preset MHL wake-up pulse standard or not, and if the received MHL wake-up pulses meet the preset MHL wake-up pulse standard, the multimedia receiving equipment is waken up to be communicated with the MHL equipment. When the MHL recognition control circuit is adopted, nonstandard MHL wake-up pulses sent by nonstandard MHL equipment can be recognized so that the digital multimedia receiving equipment starts up to be communicated with the MHL equipment, and the compatibility is enhanced.
Description
Technical field
The present invention relates to a kind of MHL recognition control circuit, relate in particular to a kind of MHL recognition control circuit of the MHL of enhancing equipment compatibility.
Background technology
Develop rapidly along with Contemporary Digital technology, most of digital multimedia receiving apparatus, all with HDMI (High Definition Multimedia Interface) (HDMI, High Definition Multimedia Interface), HDMI interface is a kind of digital signal interface relatively more conventional in current audio frequency and video transmitting and receiving device, applies very extensive.In addition, development along with mobile terminal technology, it is more simple and convenient that the processing of digital stream media becomes, for adapting to interconnecting of mobile terminal and digital multimedia receiving apparatus (as TV), on mobile terminal, there is a kind of novel interconnection technique mobile terminal high-definition audio and video standard interface (MHL, Mobile High-Definition Link).MHL is a kind of audio-visual standard interface that connects portable consumer electronic device, relies on MHL connection cable, the high definition stream media content that digital multimedia receiving apparatus can be exported by the MHL interface of HDMI interface mobile terminal receive; In addition, multimedia display equipment can charge to mobile terminal by MHL connection cable.
According to MHL standard, MHL connection cable adopts 6 connection holding wires to realize and interconnects, these 6 connecting line signals are TMDS_DO+, TMDS_DO-, SCL, MHL_CBUS, MHL_CD_SENSE and MHL_VBUS, HDMI and MHL interface definition are as shown in Figure 1, digital multimedia receiving apparatus (for example receives MHL equipment by HDMI interface, the high definition stream media content of MHL interface output mobile terminal), wherein, MHL equipment TMDS_DO+ and TMDS_DO-signal end are connected respectively to PIN7 and the PIN9 of digital multimedia receiving apparatus HDMI interface, SCL signal end is connected to the PIN15 of digital multimedia receiving apparatus HDMI interface, MHL_VBUS signal end is connected to the PIN18 of digital multimedia receiving apparatus HDMI interface, MHL_CBUS signal end is connected to the PIN19 of digital multimedia receiving apparatus HDMI interface.
As Fig. 1, when adopting HDMI equipment as input equipment, that connect HDMI interface PIN2 is GND, and now PIN2 pin is low level; When multimedia receiver connects MHL equipment by MHL wire rod, PIN2 pin is connected to the MHL_CD_SENSE signal end of MHL equipment, and now PIN2 pin is high level (being greater than 1.5V) input.
MHL compatible with HDMI is during as digital multimedia receiving apparatus input signal, the MHL_CBUS signal end of MHL equipment and the hot plug of HDMI equipment detect (HPD, Hot Plug Detect) functional pin shares same pin, the i.e. PIN19 of digital multimedia receiving apparatus HDMI interface.When identification input signal is while being HDMI signal, as shown in Figure 2, whether the output of HPD functional pin PIN19 will send the foundation of TMDS signal as HDMI equipment to digital multimedia receiving apparatus.HPD is from a detection signal of digital multimedia receiving apparatus (as TV) output, if HDMI equipment Inspection is output as high level (being greater than 1.5V) to HPD pin, transmission TMDS signal is communicated, and low level (being less than 0.8V) stops sending TMDS signal.
In prior art, MHL equipment and digital multimedia receiving apparatus is connected as shown in Figure 3.MHL equipment is connected to signal processing module, main control module and the MHL identification circuit of digital multimedia receiving apparatus by the HDMI interface of digital multimedia display device, thereby MHL identification circuit is communicate and charge for identifying the insertion of MHL equipment, main control module is that the signal of MHL equipment and the input of MHL identification circuit is controlled, and the signal processing module of digital multimedia receiving apparatus carries out signal processing for the signal of MHL equipment and main control module input.MHL recognition unit comprises triode Q5, triode Q6, triode Q7 and metal-oxide-semiconductor Q4, the grid of metal-oxide-semiconductor Q4 (as the signal input part ID_INPUT of MHL identification circuit) connects the PIN2 (the MHL_CD_SENSE signal end that connects MHL by the PIN2 of HDMI interface) of HDMI interface, source ground, drain electrode is connected to supply voltage (5V) by resistance R 3; The base stage of described triode Q5 is connected to the drain electrode of described metal-oxide-semiconductor Q4 by resistance R 4, grounded emitter, and collector electrode is connected to supply voltage (5V) by resistance R 5, the R6 of series connection; The base stage of triode Q6 is connected to the resistance R 5 of series connection, the tie point of R6, and emitter is connected to supply voltage (5V), and collector electrode is by the collector electrode of resistance R 7 connecting triode Q7; The base stage of triode Q7 connects the HPD control end HPD_CONTROL of main control module, grounded emitter by resistance R 8; The collector electrode of triode Q7 (as the identification signal output ID_OUTPUT of MHL identification circuit) connects the MHL_CBUS signal end of MHL by the PIN19 of HDMI interface.
When HDMI equipment inserts digital multimedia receiving apparatus, the PIN2 of digital multimedia receiving apparatus HDMI interface is connected to the GND pin of HDMI, i.e. ground connection, and the collector electrode of above-mentioned triode Q7 connects the HPD functional pin of HDMI by PIN19.Other connect as described in epimere.
Wherein, HPD control end HPD_CONTROL is output low level when digital multimedia receiving apparatus gating enters HDMI passage (HDMI and MHL share HDMI passage), (such as AV passage, TV passage etc.) output high level while entering other passages, to do not carry out the detection of HDMI and MHL under other passages, inform that external equipment (HDMI equipment and MHL equipment) HDMI or MHL passage are not ready for, external equipment does not need to transmit TMDS signal.
In the prior art, when digital multimedia receiving apparatus (as TV) is switched to other passages (as AV passage, TV passage etc.) time, main control module is to HPD control end HDP_CONTROL output high level, the current collection that causes triode Q7 is low level very, the PIN19 pin that is digital multimedia receiving apparatus interface is low level, even if now insert HDMI equipment, PIN19 pin (the HPD signal end that now connects HDMI) is also low level, so HDMI equipment can not normally be connected with digital multimedia receiving apparatus, HDMI equipment can not send TMDS signal, can not communicate with digital multimedia receiving apparatus, when digital multimedia receiving apparatus (as TV) is switched to HDMI passage, HPD control end HPD_CONTROL can send low level, making triode Q7 cut-off, is HDMI equipment or MHL equipment according to the external equipment now inserting afterwards again, carries out different operations.
When being switched to HDMI passage, and when HDMI equipment is connected to digital multimedia receiving apparatus by HDMI wire rod, HDMI equipment by wire rod by 5V voltage transmission to HDMI+5V pin (PIN18 pin), and because PIN2 is connected with the inside ground wire GND of HDMI equipment, while PIN2 and PIN5, the same ground connection such as PIN8, so PIN2 is low level, therefore the identification signal input ID_INPUT of MHL identification circuit is low level, the grid that is metal-oxide-semiconductor Q4 is low level, its source ground, therefore metal-oxide-semiconductor Q4 cut-off, the drain electrode of metal-oxide-semiconductor Q4 connects voltage (+5V) by resistance R 3, therefore the drain electrode of metal-oxide-semiconductor Q4 is high level, the base stage of triode Q5 is high level, its grounded emitter, therefore triode Q5 conducting, the current collection of triode Q5 low level very, triode Q6 emitter connects voltage (+5V) again, therefore triode Q6 conducting, HPD control end HPD_CONTROL output low level when digital multimedia receiving apparatus is switched to HDMI passage again, therefore triode Q7 cut-off, make identification signal output ID_OUTPUT output high level, identification signal output ID_OUTPUT connects the PIN19 of HDMI interface, when HDMI equipment Inspection is high level to PIN19, will export TMDS signal to digital multimedia receiving apparatus.
When being switched to HDMI passage, and when MHL equipment is connected to digital multimedia receiving apparatus by MHL wire rod, as shown in Figure 3, MHL equipment arrives MHL_CD_SENSE signal end (PIN2) by wire rod by high level output, and is transferred to the main control module of digital multimedia receiving apparatus.When MHL_CD_SENSE signal end (PIN2) is high level, can start the MHL charging circuit work of digital multimedia receiving apparatus, as shown in Figure 4, thereby make power supply control chip pass through MHL_VBUS signal end (PIN18) to MHL equipment charge; Simultaneously main control module is when PIN2 being detected and be high level, will carry out different MHL and replys by controlling the pull down resistor resistance of main control module inside, and wherein, pull down resistor resistance is respectively 1K ohm and 100K ohm.Now, MHL_CD_SENSE signal end (as the identification signal input ID_INPUT of MHL identification circuit) is exported a high level, the grid that is metal-oxide-semiconductor Q4 is high level, its source ground, therefore metal-oxide-semiconductor Q4 conducting, the drain electrode of metal-oxide-semiconductor Q4 connects supply voltage (5V) by resistance R 3, therefore the drain electrode of metal-oxide-semiconductor Q4 is low level, the base stage of triode Q5 is low level, its grounded emitter, therefore triode Q5 cut-off, the current collection of triode Q5 high level very, triode Q6 emitter connects supply voltage (5V) again, therefore triode Q6 cut-off, again owing to being switched to HDMI passage when digital multimedia receiving apparatus, HPD control end HPD_CONTROL can send low level, therefore triode Q7 cut-off, the identification signal output ID_OUTPUT of MHL identification circuit puts sky, therefore MHL_CBUS signal end (PIN19) can correctly be identified the pull down resistor resistance of main control module inside under the impact without MHL identification circuit, and send corresponding answer signal to MHL equipment, MHL equipment carries out answer signal identification after receiving answer signal, after success, MHL equipment and multimedia receiver start proper communication.
In prior art, the MHL of MHL equipment and digital multimedia receiving apparatus controls as shown in Figure 4, and wherein, MHL_CBUS signal end can carry out two-way communication.Under digital multimedia receiving apparatus ideal case, when MHL equipment inserts digital multimedia receiving apparatus HDMI interface, MHL equipment can wake pulse up to the MIPS of digital multimedia receiving apparatus, to wake its start up and to communicate by MHL of MHL_CBUS signal end input.Digital multimedia receiving apparatus is under open state, and the GPIO that also can control by MIPS communicates to MHL_CBUS signal end transmitted signal, draws high voltage, and then realizes the charging of MHL equipment.
Under digital multimedia receiving apparatus ideal case, when inserting MHL equipment by HDMI interface, the MHL_CBUS signal end of MHL equipment wakes pulse up to digital multimedia receiving apparatus by MHL of GPIO input of the MIPS control of digital multimedia receiving apparatus, as shown in Figure 4, the MHL that the MIPS of digital multimedia receiving apparatus can detect input wakes impulse waveform up and judges whether to meet MHL and wakes pulse standard up, if met, digital multimedia receiving apparatus start with MHL devices communicating.MHL wakes waveform standard up as shown in Figure 5, and the height pulsewidth time that MHL wakes pulse up is 20ms+/-10%(18 ~ 22ms), while MHL wakes pulse condition up and meets 101000101, wherein, when described MHL wakes pulse high level up, is 1, is 0 during low level.
But MHL equipment vendors are more in the market, a lot of MHL equipment is not carried out MHL standard criterion completely, and it is nonstandard that the MHL that causes MHL equipment to be exported wakes pulse up, makes digital multimedia receiving apparatus None-identified, can not proper communication.The non-standard MHL of the non-standard MHL equipment output of actual measurement wakes pulse up as shown in Figure 6, and its height pulsewidth time is 30ms left and right, and its state meets 101000101.The non-standard MHL that digital multimedia receiving apparatus can not be identified above-mentioned non-standard MHL equipment output wakes pulse up, causes digital multimedia receiving apparatus not start shooting and communicates, and makes the digital multimedia receiving apparatus can not compatible non-standard MHL equipment.
In addition, the high level that the MHL of part MHL equipment output wakes pulse up only has 1.8V, and some digital multimedia receiving apparatus is that level more than 2V is identified as to high level, cause equally digital multimedia receiving apparatus normally not identify MHL and wake pulse up, cause digital multimedia receiving apparatus not start shooting and communicate with MHL equipment.
Summary of the invention
The object of the invention is, a kind of compatible MHL recognition control circuit that strengthens is provided, make digital multimedia receiving apparatus can normally identify non-standard MHL equipment, strengthen the compatibility of MHL equipment.
For achieving the above object, the invention provides a kind of compatible MHL recognition control circuit that strengthens, by increasing by one, wake pulse detecting unit up, make MHL wake pulse up and be input to main control module by another GPIO, main control module wakes the object of pulse up by regulating in house software to reach the non-standard MHL of identification, and the MHL recognition control circuit of described enhancing compatibility comprises:
MHL recognition unit, when connecting MHL equipment, the identification signal input of described MHL recognition unit connects the MHL_CD_SENSE signal end of MHL equipment, and described identification signal input input high level, the identification signal output of described MHL recognition unit connects the MHL_CBUS signal end of MHL equipment, and described identification signal output is put sky; And
Wake pulse detecting unit up, described in wake the MHL_CBUS signal end that pulse input end is connected to MHL equipment that wakes up of pulse detecting unit up, described detection wakes the main control module that pulse output end is connected to digital multimedia receiving apparatus that wakes up of pulse unit up;
Under digital multimedia receiving apparatus ideal case, described MHL equipment wakes pulse up by the described pulse input end transmission MHL that wakes up that wakes pulse detecting unit up, described MHL wakes pulse up and processes by outputing to described main control module by the described pulse output end that wakes up by the described pulse detecting unit of waking up, the described MHL that described master control module judges receives wakes pulse up and whether meets default MHL and wake pulse standard up, if met, wake up described multimedia receiver with described MHL devices communicating.
Further, described detection wakes the GPIO mouth that pulse output end is connected to the main control module of digital multimedia receiving apparatus that wakes up of pulse unit up.
Further, described default MHL wakes pulse standard up and is: the height pulsewidth time that described MHL wakes pulse up is 30ms+/-10%, and while MHL wakes pulse condition up and meets 101000101, wherein, when described MHL wakes pulse high level up, is 1, is 0 during low level.
Improvement as technique scheme, the described pulse detecting unit of waking up comprises the first triode, the first metal-oxide-semiconductor and the second metal-oxide-semiconductor, the grounded collector of described the first triode, base stage is waken pulse input end up described in connecting, emitter connects the source electrode of described the first metal-oxide-semiconductor, the grid of described the first metal-oxide-semiconductor connects signal controlling end, drain electrode is connected on standby voltage by the first resistance, the drain electrode of described the second metal-oxide-semiconductor is connected on described standby voltage by the second resistance, grid is connected to the emitter of described triode Q1, source ground, described pulse signal output end is connected to the drain electrode of described the second metal-oxide-semiconductor, when the identification signal input of described MHL recognition unit is low level, affiliated main control module is to described signal controlling end input low level, when the identification signal input of described MHL recognition unit is high level, described main control module is to described signal controlling end input high level.
Further, described signal controlling end is connected to another GPIO mouth of the main control module of described digital multimedia receiving apparatus.
In addition, improvement as technique scheme, can on existing MHL recognition unit circuit, increase standby detecting unit,, described MHL recognition unit comprises the second triode, the 3rd triode, the 4th triode and the 3rd metal-oxide-semiconductor, the grid of described the 3rd metal-oxide-semiconductor connects described identification signal input, source ground, and drain electrode is connected to supply voltage by the 3rd resistance; The base stage of described the second triode is connected to the drain electrode of described the 3rd metal-oxide-semiconductor by the 4th resistance, grounded emitter, and collector electrode is connected to supply voltage by the 5th, the 6th resistance of series connection; The base stage of described the 3rd triode be connected to described series connection the 5th, the tie point of the 6th resistance, emitter is connected to supply voltage, collector electrode connects the collector electrode of described the 4th triode by the 7th resistance; The base stage of described the 4th triode connects the HPD control end of described main control module by the 8th resistance, collector electrode connects described identification signal output, grounded emitter;
The described pulse detecting unit of waking up comprises the first triode, the first metal-oxide-semiconductor and the second metal-oxide-semiconductor, the grounded collector of described the first triode, base stage is waken pulse input end up described in connecting, emitter connects the source electrode of described the first metal-oxide-semiconductor, the grid of described the first metal-oxide-semiconductor is connected to the collector electrode of the second triode of described MHL recognition unit by described signal controlling end, drain electrode is connected on standby voltage by the first resistance, the drain electrode of described the second metal-oxide-semiconductor is connected on described standby voltage by the second resistance, grid is connected to the emitter of described triode Q1, source ground, described pulse signal output end is connected to the drain electrode of described the second metal-oxide-semiconductor.
Wherein, described the first triode and the 3rd triode are PNP triode, and described the second triode and the 4th triode are NPN triode.
Wherein, described standby voltage is preferably 3.3V.
Wherein, described supply voltage is preferably 5V.
Wherein, described high level is for being greater than 1.5V, and described low level is for being less than 0.8V.
Employing the invention has the beneficial effects as follows: the present invention wakes pulse detecting unit hardware circuit up by increase, the MHL that MHL equipment is sent by MHL_CBUS signal end wakes pulse up and after other GPIO, is input to the main control module of digital multimedia receiving apparatus, main control module is realized the default MHL of change by adjustment software and is waken pulse standard up, thereby reach that the non-standard MHL that sends of the non-standard MHL equipment of identification wakes pulse up so that the object of digital multimedia receiving apparatus start and MHL devices communicating increases compatible.Wherein waking pulse detecting unit up can increase on original MHL recognition unit circuit, can be also increase newly separate with MHL recognition unit.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is HDMI and MHL interface definition figure;
Fig. 2 is that the HPD of HDMI controls schematic diagram;
Fig. 3 is the concrete connection diagram of MHL equipment and digital multimedia receiving apparatus in prior art;
Fig. 4 is the control schematic diagram of MHL equipment and digital multimedia receiving apparatus in prior art;
Fig. 5 is that standard MHL wakes impulse waveform and pulse condition schematic diagram up;
Fig. 6 is that the non-standard MHL of actual measurement wakes impulse waveform and pulse condition schematic diagram up;
Fig. 7 is the block diagram of an embodiment of the compatible MHL recognition control circuit of enhancing provided by the invention;
Fig. 8 is the control schematic diagram of MHL equipment and digital multimedia receiving apparatus while adopting the embodiment that Fig. 7 provides;
Fig. 9 is the block diagram of another embodiment of the compatible MHL recognition control circuit of enhancing provided by the invention;
Figure 10 is the physical circuit figure of MHL recognition unit in Fig. 9;
Figure 11 is the physical circuit figure that wakes pulse detecting unit in Fig. 9 up;
Figure 12 is the block diagram of the another embodiment of the compatible MHL recognition control circuit of enhancing provided by the invention;
Figure 13 is the physical circuit figure of MHL recognition unit in Figure 12;
Figure 14 is the physical circuit figure that wakes pulse detecting unit in Figure 12 up.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
The embodiment of the present invention provides a kind of compatible MHL recognition control circuit that strengthens, and as shown in Figure 7, comprising:
Wake pulse detecting unit 102 up, the described MHL_CBUS signal end that pulse input end is connected to MHL equipment that wakes up that wakes pulse detecting unit 102 up, described detection wakes the GPIO mouth that pulse output end is connected to the main control module of digital multimedia receiving apparatus that wakes up of pulse unit 102 up;
Under digital multimedia receiving apparatus ideal case, insert MHL equipment, MHL equipment can be simultaneously MHL_CBUS signal end by MHL equipment send MHL and wake pulse up to MIPS and the main control module of digital multimedia receiving apparatus, as shown in Figure 8.Wherein, the MIPS of described digital multimedia receiving apparatus and main control module have all been preset MHL and have been waken pulse standard up, the default MHL of described MIPS wakes pulse standard up: the height pulsewidth time that MHL wakes pulse up is 20ms+/-10%(18 ~ 22ms), MHL wakes pulse condition satisfied 101000101 up simultaneously, wherein, when described MHL wakes pulse high level up, being 1, is 0 during low level; Also the standard MHL that is standard MHL equipment wakes pulse up, and its impulse form as shown in Figure 5.And the default MHL of described main control module wakes pulse standard up, be: the height pulsewidth time that described MHL wakes pulse up is 30ms+/-10%, MHL wakes pulse condition satisfied 101000101 up simultaneously, wherein, when described MHL wakes pulse high level up, be 1, during low level, be 0; Also the non-standard MHL that is non-standard MHL equipment output wakes pulse up, and its impulse form as shown in Figure 6.
When MHL equipment is standard MHL equipment the standard MHL of transmission while waking pulse up, MIPS can judge that its MHL meeting in MIPS wakes pulse standard up, thereby wakes digital multimedia receiving apparatus start and MHL devices communicating up, and main control module is inoperative.
When MHL equipment criteria of right and wrong MHL equipment and when sending non-standard MHL and waking pulse up, MHL equipment wakes pulse up by the described pulse input end transmission MHL that wakes up that wakes pulse detecting unit 102 up, described MHL wakes pulse up and processes by outputing to described main control module by the described pulse output end that wakes up by the described pulse detecting unit 102 of waking up, the described MHL that described master control module judges receives wakes pulse up and whether meets the default MHL of main control module and wake pulse standard up, if met, wake up described multimedia receiver with described MHL devices communicating.
The embodiment of the present invention provides another kind of enhancing compatible MHL recognition control circuit, as shown in Figure 9, comprising:
Wake pulse detecting unit 102 up, the described MHL_CBUS signal end that pulse input end is connected to MHL equipment that wakes up that wakes pulse detecting unit 102 up, described detection wakes the GPIO mouth that pulse output end is connected to the main control module of digital multimedia receiving apparatus that wakes up of pulse unit 102 up.
Further, MHL recognition unit 101 comprises triode Q5, triode Q6, triode Q7 and metal-oxide-semiconductor Q4, as shown in figure 10, the grid of metal-oxide-semiconductor Q4 (as the signal input part ID_INPUT of MHL identification circuit) connects the PIN2 (the PIN2 by HDMI interface connects the MHL_CD_SENSE signal end of MHL or the earth terminal of HDMI) of HDMI interface, source ground, drain electrode is connected to supply voltage (5V) by resistance R 3; The base stage of described triode Q5 is connected to the drain electrode of described metal-oxide-semiconductor Q4 by resistance R 4, grounded emitter, and collector electrode is connected to supply voltage (5V) by resistance R 5, the R6 of series connection; The base stage of triode Q6 is connected to the resistance R 5 of series connection, the tie point of R6, and emitter is connected to supply voltage (5V), and collector electrode is by the collector electrode of resistance R 7 connecting triode Q7; The base stage of triode Q7 connects the HPD control end HPD_CONTROL of main control module, grounded emitter by resistance R 8; The collector electrode of triode Q7 (as the identification signal output ID_OUTPUT of MHL identification circuit) connects the MHL_CBUS signal end of MHL by PIN19.
Further, wake pulse detecting unit 102 up and comprise the first triode Q1, the first metal-oxide-semiconductor Q2 and the second metal-oxide-semiconductor Q3, the grounded collector of described the first triode Q1 as shown in figure 11, base stage is waken pulse input end PULSE_INPUT up described in connecting, emitter connects the source electrode of described the first metal-oxide-semiconductor Q2, the grid of described the first metal-oxide-semiconductor Q2 connects signal controlling end POWER_ON/OFF, drain electrode is connected on standby voltage 3V3_STB (3.3V) by the first resistance R 1, the drain electrode of described the second metal-oxide-semiconductor Q3 is connected on described standby voltage 3V3_STB (3.3V) by the second resistance R 2, grid is connected to the emitter of described triode Q1, source ground, described pulse signal output end PULSE_OUTPUT is connected to the drain electrode of described the second metal-oxide-semiconductor Q3, when the identification signal input ID_INPUT of described MHL recognition unit 101 is low level, affiliated main control module is to described signal controlling end POWER_ON/OFF input low level, when the identification signal input ID_INPUT of described MHL recognition unit 101 is high level, described main control module is to described signal controlling end POWER_ON/OFF input high level.
Wherein, described signal controlling end POWER_ON/OFF is connected to the GPIO mouth of the main control module of described digital multimedia receiving apparatus.
Under digital multimedia receiving apparatus ideal case, insert MHL equipment, MHL equipment can be simultaneously MHL_CBUS signal end by MHL equipment send MHL and wake pulse up to MIPS and the main control module of digital multimedia receiving apparatus, as shown in Figure 8.Wherein, the MIPS of described digital multimedia receiving apparatus and main control module have all been preset MHL and have been waken pulse standard up, the default MHL of described MIPS wakes pulse standard up: the height pulsewidth time that MHL wakes pulse up is 20ms+/-10%(18 ~ 22ms), MHL wakes pulse condition satisfied 101000101 up simultaneously, wherein, when described MHL wakes pulse high level up, being 1, is 0 during low level; Also the standard MHL that is standard MHL equipment wakes pulse up, and its impulse form as shown in Figure 5.And the default MHL of described main control module wakes pulse standard up, be: the height pulsewidth time that described MHL wakes pulse up is 30ms+/-10%, MHL wakes pulse condition satisfied 101000101 up simultaneously, wherein, when described MHL wakes pulse high level up, be 1, during low level, be 0; Also the non-standard MHL that is non-standard MHL equipment output wakes pulse up, and its impulse form as shown in Figure 6.
When MHL equipment is standard MHL equipment the standard MHL of transmission while waking pulse up, MIPS can judge that its MHL meeting in MIPS wakes pulse standard up, thereby wakes digital multimedia receiving apparatus start and MHL devices communicating up, and main control module is inoperative.
When MHL equipment criteria of right and wrong MHL equipment and when sending non-standard MHL and waking pulse up, the MHL_CD_SENSE signal end of MHL equipment can be exported high level, the identification signal input ID_INPUT that is MHL recognition unit 101 is high level, main control module is to described signal controlling end POWER_ON/OFF input high level, the grid of the first metal-oxide-semiconductor Q2 is high level, its drain electrode connects standby voltage 3V3_STB again, therefore the first metal-oxide-semiconductor Q2 conducting, the transmitting of the first triode Q1 high level very, the grounded collector of the first triode Q1, MHL equipment wakes pulse up by waking the pulse input end PULSE_INPUT transmission MHL that wakes up of pulse detecting unit 102 up again, be that MHL wakes the base stage that pulse has sent to the first triode Q1 up, MHL wakes pulse up and penetrates with the grid that outputs to the second metal-oxide-semiconductor Q3 through the first triode Q1, the drain electrode of the second metal-oxide-semiconductor Q3 is connected to standby voltage 3V3_STB(3.3V again), therefore the second metal-oxide-semiconductor Q3 is anti-phase, cause MHL to wake pulse up outputs to and wakes pulse output end PULSE_OUTPUT up after the second metal-oxide-semiconductor Q3 is anti-phase, output to again described main control module, the described MHL that described master control module judges receives wakes pulse up and whether meets default MHL and wake pulse standard up, if met, wake up described multimedia receiver with described MHL devices communicating.
Wherein the drain electrode of the second metal-oxide-semiconductor Q3 is connected to standby voltage 3V3_STB(3.3V), can make high level that the MHL of output wakes pulse up in 3.3V left and right, thereby make digital multimedia receiving apparatus normally identify high level, make digital multimedia receiving apparatus start with MHL devices communicating.Can prevent high level (1.8V) originally thus not being identified the MHL causing wakes pulse up and can not identify and can not make the phenomenon of digital multimedia receiving apparatus start occur.
In the present embodiment, waking pulse detecting unit 102 up contacts directly with MHL recognition unit 101 nothings, separate, two unit can be integrated in respectively on different circuit boards, only to need an increasing element circuit in the situation that not changing available circuit, just can reach the non-standard MHL equipment of identification, strengthen compatible object.
embodiment 3
The embodiment of the present invention provides another to strengthen compatible MHL recognition control circuit, as shown in figure 12, comprising:
Wake pulse detecting unit 102 up, the described MHL_CBUS signal end that pulse input end is connected to MHL equipment that wakes up that wakes pulse detecting unit 102 up, described detection wakes the GPIO mouth that pulse output end is connected to the main control module of digital multimedia receiving apparatus that wakes up of pulse unit 102 up.
Further, MHL recognition unit 101 comprises the second triode Q5, the 3rd triode Q6, the 4th triode Q7 and the 3rd metal-oxide-semiconductor Q4, as shown in figure 13, the grid of the 3rd metal-oxide-semiconductor Q4 (as the signal input part ID_INPUT of MHL identification circuit) connects the PIN2 (the MHL_CD_SENSE signal end that connects MHL by the PIN2 of HDMI interface) of HDMI interface, source ground, drain electrode is connected to supply voltage (5V) by the 3rd resistance R 3; The base stage of described the second triode Q5 is connected to the drain electrode of described the 3rd metal-oxide-semiconductor Q4 by the 4th resistance R 4, grounded emitter, and collector electrode is connected to supply voltage (5V) by the 5th, the 6th resistance R 5, the R6 of series connection; The base stage of the 3rd triode Q6 is connected to the 5th, the 6th resistance R 5 of series connection, the tie point of R6, and emitter is connected to supply voltage, and collector electrode connects the collector electrode of the 4th triode Q7 by the 6th resistance R 7; The base stage of the 4th triode Q7 connects the HPD control end HPD_CONTROL of main control module, grounded emitter by the 8th resistance R 8; The collector electrode of the 4th triode Q7 connects the MHL_CBUS signal end of MHL by the PIN19 of HDMI interface, control signal output POWER_OUTPUT connects the collector electrode of the second triode Q5.
Further, wake pulse detecting unit 102 up and comprise the first triode Q1, the first metal-oxide-semiconductor Q2 and the second metal-oxide-semiconductor Q3, the grounded collector of described the first triode Q1 as shown in figure 14, base stage is waken pulse input end PULSE_INPUT up described in connecting, emitter connects the source electrode of described the first metal-oxide-semiconductor Q2, the grid of described the first metal-oxide-semiconductor Q2 connects signal controlling end POWER_ON/OFF, be the control signal output POWER_OUTPUT of MHL recognition unit 101, drain electrode is connected to standby voltage 3V3_STB(3.3V by the first resistance R 1) on, the drain electrode of described the second metal-oxide-semiconductor Q3 is connected to described standby voltage 3V3_STB(3.3V by the second resistance R 2) on, grid is connected to the emitter of described triode Q1, source ground, described pulse signal output end PULSE_OUTPUT is connected to the drain electrode of described the second metal-oxide-semiconductor Q3.
Wherein, described the first triode Q1 and the 3rd triode Q6 are PNP triode, and described the second triode Q5 and the 4th triode Q7 are NPN triode.
Under digital multimedia receiving apparatus ideal case, insert MHL equipment, MHL equipment can be simultaneously MHL_CBUS signal end by MHL equipment send MHL and wake pulse up to MIPS and the main control module of digital multimedia receiving apparatus, as shown in Figure 8.Wherein, the MIPS of described digital multimedia receiving apparatus and main control module have all been preset MHL and have been waken pulse standard up, the default MHL of described MIPS wakes pulse standard up: the height pulsewidth time that MHL wakes pulse up is 20ms+/-10%(18 ~ 22ms), MHL wakes pulse condition satisfied 101000101 up simultaneously, wherein, when described MHL wakes pulse high level up, being 1, is 0 during low level; Also the standard MHL that is standard MHL equipment wakes pulse up, and its impulse form as shown in Figure 5.And the default MHL of described main control module wakes pulse standard up, be: the height pulsewidth time that described MHL wakes pulse up is 30ms+/-10%, MHL wakes pulse condition satisfied 101000101 up simultaneously, wherein, when described MHL wakes pulse high level up, be 1, during low level, be 0; Also the non-standard MHL that is non-standard MHL equipment output wakes pulse up, and its impulse form as shown in Figure 6.
When MHL equipment is standard MHL equipment the standard MHL of transmission while waking pulse up, MIPS can judge that its MHL meeting in MIPS wakes pulse standard up, thereby wakes digital multimedia receiving apparatus start and MHL devices communicating up, and main control module is inoperative.
When MHL equipment criteria of right and wrong MHL equipment and when sending non-standard MHL and waking pulse up, the MHL_CD_SENSE signal end of MHL equipment is to the identification signal input ID_INPUT output high level of MHL recognition unit 101, the grid of the 3rd metal-oxide-semiconductor Q4 is high level, its source ground, therefore the 3rd metal-oxide-semiconductor Q4 conducting, the drain electrode of the 3rd metal-oxide-semiconductor Q4 connects supply voltage (5V) by resistance R 3, therefore the drain electrode of the 3rd metal-oxide-semiconductor Q4 is low level, the base stage of the second triode Q5 is low level, its grounded emitter, therefore the second triode Q5 cut-off, the current collection of the second triode Q5 high level very, the control signal output POWER_OUTPUT that is MHL recognition unit 101 is high level, thereby send high level to the described grid (being signal controlling end POWER_ON/OFF) that wakes the first metal-oxide-semiconductor Q2 of pulse detecting unit 102 up, the grid of the first metal-oxide-semiconductor Q2 is high level, its drain electrode connects standby voltage 3V3_STB (3.3V) again, therefore the first metal-oxide-semiconductor Q2 conducting, the transmitting of the first triode Q1 high level very, the grounded collector of the first triode Q1, MHL equipment wakes pulse up by waking the pulse input end PULSE_INPUT transmission MHL that wakes up of pulse detecting unit 102 up again, be that MHL wakes the base stage that pulse has sent to the first triode Q1 up, MHL wakes pulse up and penetrates with the grid that outputs to the second metal-oxide-semiconductor Q3 through the first triode Q1, the drain electrode of the second metal-oxide-semiconductor Q3 is connected to standby voltage 3V3_STB(3.3V again), therefore the second metal-oxide-semiconductor Q3 is anti-phase, cause MHL to wake pulse up outputs to and wakes pulse output end PULSE_OUTPUT up after the second metal-oxide-semiconductor Q3 is anti-phase, output to again described main control module, the described MHL that described master control module judges receives wakes pulse up and whether meets the default MHL of main control module and wake pulse standard up, if met, wake up described multimedia receiver with described MHL devices communicating.
Wherein the drain electrode of the second metal-oxide-semiconductor Q3 is connected to standby voltage 3V3_STB(3.3V), can make high level that the MHL of output wakes pulse up in 3.3V left and right, thereby make digital multimedia receiving apparatus can normally identify high level so that digital multimedia receiving apparatus start with MHL devices communicating.Can prevent high level (1.8V) originally thus not being identified the MHL causing wakes pulse up and can not identify and can not make the phenomenon of digital multimedia receiving apparatus start occur.
In the present embodiment, wake pulse detecting unit 102 up increases on existing MHL recognition unit 101 bases, and two unit can be integrated on same circuit board.
In above embodiment, preferred, described standby charging voltage is 3.3V.
Preferably, described supply voltage is 5V.
Preferably, described high level is for being greater than 1.5V, and described low level is for being less than 0.8V.
Above inventive embodiments, by increase, wake pulse detecting unit 102 hardware circuits up, the MHL that MHL equipment is sent by MHL_CBUS signal end wakes pulse up and after other GPIO, is input to the main control module of digital multimedia receiving apparatus, main control module is realized the default MHL of change by adjustment software and is waken pulse standard up, thereby reach that the non-standard MHL that sends of the non-standard MHL equipment of identification wakes pulse up so that the object of digital multimedia receiving apparatus start and MHL devices communicating strengthens compatible.Wherein waking pulse detecting unit 102 up can increase on original MHL recognition unit 101 circuit, can be also increase newly separate with MHL recognition unit 101.
Above disclosed is only a kind of preferred embodiment of the present invention, certainly can not limit with this interest field of the present invention, and the equivalent variations of therefore doing according to the claims in the present invention, still belongs to the scope that the present invention is contained.
Claims (10)
1. strengthen a compatible MHL recognition control circuit, comprising:
MHL recognition unit, when connecting MHL equipment, the identification signal input of described MHL recognition unit connects the MHL_CD_SENSE signal end of MHL equipment, and described identification signal input input high level, the identification signal output of described MHL recognition unit connects the MHL_CBUS signal end of MHL equipment, and described identification signal output is put sky;
It is characterized in that, the compatible MHL recognition control circuit of described enhancing also comprises and wakes pulse detecting unit up, the described MHL_CBUS signal end that pulse input end is connected to MHL equipment that wakes up that wakes pulse detecting unit up, described detection wakes the main control module that pulse output end is connected to digital multimedia receiving apparatus that wakes up of pulse unit up;
Under digital multimedia receiving apparatus ideal case, described MHL equipment wakes pulse by described MHL_CBUS signal end up to the described pulse input end transmission MHL that wakes up that wakes pulse detecting unit up, described MHL wakes pulse up and processes by outputing to described main control module by the described pulse output end that wakes up by the described pulse detecting unit of waking up, the described MHL that described master control module judges receives wakes pulse up and whether meets default MHL and wake pulse standard up, if met, wake up described multimedia receiver with described MHL devices communicating.
2. the compatible MHL recognition control circuit of enhancing as claimed in claim 1, is characterized in that, described detection wakes the GPIO mouth that pulse output end is connected to the main control module of digital multimedia receiving apparatus that wakes up of pulse unit up.
3. the compatible MHL recognition control circuit of enhancing as claimed in claim 1, it is characterized in that, described default MHL wakes pulse standard up: the height pulsewidth time that described MHL wakes pulse up is 30ms+/-10%, MHL wakes pulse condition satisfied 101000101 up simultaneously, wherein, when described MHL wakes pulse high level up, being 1, is 0 during low level.
4. the compatible MHL recognition control circuit of enhancing as claimed in claim 1, it is characterized in that, the described pulse detecting unit of waking up comprises the first triode, the first metal-oxide-semiconductor and the second metal-oxide-semiconductor, the grounded collector of described the first triode, base stage is waken pulse input end up described in connecting, emitter connects the source electrode of described the first metal-oxide-semiconductor, the grid of described the first metal-oxide-semiconductor connects signal controlling end, drain electrode is connected on standby voltage by the first resistance, the drain electrode of described the second metal-oxide-semiconductor is connected on described standby voltage by the second resistance, grid is connected to the emitter of described triode Q1, source ground, described pulse signal output end is connected to the drain electrode of described the second metal-oxide-semiconductor, when the identification signal input of described MHL recognition unit is low level, described main control module is to described signal controlling end input low level, when the identification signal input of described MHL recognition unit is high level, described main control module is to described signal controlling end input high level.
5. the compatible MHL recognition control circuit of enhancing as claimed in claim 4, is characterized in that, described signal controlling end is connected to another GPIO mouth of the main control module of described digital multimedia receiving apparatus.
6. the compatible MHL recognition control circuit of enhancing as claimed in claim 1, is characterized in that,
Described MHL recognition unit comprises the second triode, the 3rd triode, the 4th triode and the 3rd metal-oxide-semiconductor, and the grid of described the 3rd metal-oxide-semiconductor connects described identification signal input, source ground, and drain electrode is connected to supply voltage by the 3rd resistance; The base stage of described the second triode is connected to the drain electrode of described the 3rd metal-oxide-semiconductor by the 4th resistance, grounded emitter, and collector electrode is connected to supply voltage by the 5th, the 6th resistance of series connection; The base stage of described the 3rd triode be connected to described series connection the 5th, the tie point of the 6th resistance, emitter is connected to supply voltage, collector electrode connects the collector electrode of described the 4th triode by the 7th resistance; The base stage of described the 4th triode connects the HPD control end of described main control module by the 8th resistance, collector electrode connects described identification signal output, grounded emitter;
The described pulse detecting unit of waking up comprises the first triode, the first metal-oxide-semiconductor and the second metal-oxide-semiconductor, the grounded collector of described the first triode, base stage is waken pulse input end up described in connecting, emitter connects the source electrode of described the first metal-oxide-semiconductor, the grid of described the first metal-oxide-semiconductor is connected to the collector electrode of the second triode of described MHL recognition unit by described signal controlling end, drain electrode is connected on standby voltage by the first resistance, the drain electrode of described the second metal-oxide-semiconductor is connected on described standby voltage by the second resistance, grid is connected to the emitter of described triode Q1, source ground, described pulse signal output end is connected to the drain electrode of described the second metal-oxide-semiconductor.
7. the compatible MHL recognition control circuit of enhancing as claimed in claim 6, is characterized in that, described the first triode and the 3rd triode are PNP triode, and described the second triode and the 4th triode are NPN triode.
8. the MHL recognition control circuit of the enhancing compatibility as described in any one in claim 4 ~ 7, is characterized in that, described standby voltage is preferably 3.3V.
9. the compatible MHL recognition control circuit of enhancing as claimed in claim 6, is characterized in that, described supply voltage is preferably 5V.
10. the MHL recognition control circuit of the enhancing compatibility as described in any one in claim 1 ~ 7, is characterized in that, described high level is for being greater than 1.5V, and described low level is for being less than 0.8V.
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Effective date of registration: 20180214 Address after: 510530 Room 802, No. 6 (1), Yun Pu four, Whampoa District, Guangzhou, Guangdong Patentee after: Guangzhou six ring Mdt InfoTech Ltd Address before: 510663 Guangdong city of Guangzhou province Guangzhou high tech Industrial Development Zone Science Road No. 192 building 4 Xue Cheng Ke Zhu Patentee before: Guangzhou CVT Electronics Technology Co., Ltd. |