CN103533281B - MHL identification control circuit for enhancing compatibility - Google Patents
MHL identification control circuit for enhancing compatibility Download PDFInfo
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- CN103533281B CN103533281B CN201310448152.3A CN201310448152A CN103533281B CN 103533281 B CN103533281 B CN 103533281B CN 201310448152 A CN201310448152 A CN 201310448152A CN 103533281 B CN103533281 B CN 103533281B
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- 238000005728 strengthening Methods 0.000 claims description 18
- 230000002618 waking effect Effects 0.000 claims description 18
- 230000005540 biological transmission Effects 0.000 claims description 10
- 238000004148 unit process Methods 0.000 claims description 2
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- GJWAPAVRQYYSTK-UHFFFAOYSA-N [(dimethyl-$l^{3}-silanyl)amino]-dimethylsilicon Chemical group C[Si](C)N[Si](C)C GJWAPAVRQYYSTK-UHFFFAOYSA-N 0.000 description 6
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- 238000005259 measurement Methods 0.000 description 2
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- 101100190530 Arabidopsis thaliana PIN8 gene Proteins 0.000 description 1
- 101100190532 Oryza sativa subsp. japonica PIN9 gene Proteins 0.000 description 1
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Abstract
The invention provides an MHL identification control circuit for enhancing compatibility, which comprises: the MHL identification unit comprises an identification signal input end and an identification signal output end; the device also comprises a wake-up pulse detection unit, wherein the wake-up pulse input end of the wake-up pulse detection unit is connected to the MHL _ CBUS signal end of the MHL device, and the wake-up pulse output end is connected to the main control module of the digital multimedia receiving device; under the standby condition of the digital multimedia receiving equipment, the MHL equipment sends MHL wake-up pulses to a wake-up pulse unit, the MHL wake-up pulses are processed and then output to the main control module through the wake-up pulse output end, the main control module judges whether the received MHL wake-up pulses meet the preset MHL wake-up pulse standard or not, and if the received MHL wake-up pulses meet the preset MHL wake-up pulse standard, the multimedia receiving equipment is awakened to communicate with the MHL equipment. By adopting the invention, the non-standard MHL wake-up pulse sent by the non-standard MHL equipment can be identified so as to enable the digital multimedia receiving equipment to be started up to be communicated with the MHL equipment, thereby enhancing the compatibility.
Description
Technical field
The present invention relates to a kind of MHL recognition control circuit, particularly relate to a kind of MHL recognition control circuit strengthening MHL equipment compatibility.
Background technology
Along with developing rapidly of Contemporary Digital technology, major part digital multimedia receiving apparatus, all with HDMI (HDMI, High Definition Multimedia Interface), HDMI interface is a kind of digital signal interface the more commonly used in current audio frequency and video transmitting and receiving device, and application is widely.Additionally, development along with mobile terminal technology, the process of digital stream media becomes the most simple and convenient, for adapting to interconnecting of mobile terminal and digital multimedia receiving apparatus (such as TV), occur in that a kind of novel interconnection technique mobile terminal high-definition audio and video standard interface (MHL, Mobile High-Definition Link) on mobile terminals.MHL is a kind of audio-visual standard interface connecting portable consumer electronic device, relies on MHL to connect cable, the high definition stream media content that digital multimedia receiving apparatus can be exported by the MHL interface of HDMI interface mobile terminal;Charge it addition, multi-media display device can connect cable by MHL to mobile terminal.
nullAccording to MHL standard,MHL connects cable and uses 6 connection holding wires to realize interconnecting,These 6 connecting line signals are TMDS_DO+、TMDS_DO-、SCL、MHL_CBUS、MHL_CD_SENSE and MHL_VBUS,HDMI and MHL interface define as shown in Figure 1,Digital multimedia receiving apparatus receives MHL equipment (such as by HDMI,Mobile terminal) MHL interface output high definition stream media content,Wherein,MHL equipment TMDS_DO+ and TMDS_DO-signal end are connected respectively to PIN7 and PIN9 of digital multimedia receiving apparatus HDMI,SCL signal end is connected to the PIN15 of digital multimedia receiving apparatus HDMI,MHL_VBUS signal end is connected to the PIN18 of digital multimedia receiving apparatus HDMI,MHL_CBUS signal end is connected to the PIN19 of digital multimedia receiving apparatus HDMI.
Such as Fig. 1, when using HDMI equipment as input equipment, connect HDMI PIN2 for GND, now PIN2 foot is low level;When multimedia receiver connects MHL equipment by MHL wire rod, PIN2 foot is connected to the MHL_CD_SENSE signal end of MHL equipment, and now PIN2 foot is high level (more than 1.5V) input.
When MHL compatible with HDMI is as digital multimedia receiving apparatus input signal, the MHL_CBUS signal end of MHL equipment detects (HPD with the hot plug of HDMI equipment, Hot Plug Detect) functional pin shares same pin, the i.e. PIN19 of digital multimedia receiving apparatus HDMI.When identifying that input signal is HDMI signal, as in figure 2 it is shown, the foundation whether output of HPD functional pin PIN19 will send TMDS signal as HDMI equipment to digital multimedia receiving apparatus.HPD is the detection signal exported from digital multimedia receiving apparatus (such as TV), if HDMI equipment Inspection is output as high level (more than 1.5V) to HPD pin, is communicated by transmission TMDS signal, and low level (less than 0.8V) stops sending TMDS signal.
In prior art, the connection of MHL equipment and digital multimedia receiving apparatus is as shown in Figure 3.MHL equipment is connected to the signal processing module of digital multimedia receiving apparatus, main control module and MHL identification circuit by the HDMI of digital multimedia display device, MHL identification circuit is used to identify the insertion of MHL equipment thus communicates and charge, main control module is that the signal inputting MHL equipment and MHL identification circuit is controlled, and the signal that the signal processing module of digital multimedia receiving apparatus inputs for MHL equipment and main control module carries out signal processing.MHL recognition unit includes audion Q5, audion Q6, audion Q7 and metal-oxide-semiconductor Q4, the grid (as the signal input part ID_INPUT of MHL identification circuit) of metal-oxide-semiconductor Q4 connects the PIN2 (i.e. being connected the MHL_CD_SENSE signal end of MHL by the PIN2 of HDMI) of HDMI, source ground, drain electrode is connected to supply voltage (5V) by resistance R3;The base stage of described audion Q5 is connected to the drain electrode of described metal-oxide-semiconductor Q4, grounded emitter by resistance R4, and colelctor electrode is connected to supply voltage (5V) by resistance R5, R6 of series connection;The base stage of audion Q6 is connected to the junction point of resistance R5, R6 of series connection, and emitter stage is connected to supply voltage (5V), the colelctor electrode colelctor electrode by resistance R7 connecting triode Q7;The HPD that the base stage of audion Q7 connects main control module by resistance R8 controls end HPD_CONTROL, grounded emitter;The colelctor electrode (as the identification signal output part ID_OUTPUT of MHL identification circuit) of audion Q7 connects the MHL_CBUS signal end of MHL by the PIN19 of HDMI.
When HDMI equipment inserts digital multimedia receiving apparatus, the PIN2 of digital multimedia receiving apparatus HDMI is connected to the GND pin of HDMI, i.e. ground connection, and the colelctor electrode of above-mentioned audion Q7 connects the HPD functional pin of HDMI by PIN19.Other connect as described in epimere.
Wherein, HPD controls end HPD_CONTROL output low level when digital multimedia receiving apparatus gating enters HDMI passage (HDMI and MHL shares HDMI passage), (such as AV passage, TV passage etc.) output high level when entering other passages, not carry out the detection of HDMI and MHL under other passages, i.e. informing that external equipment (HDMI equipment and MHL equipment) HDMI or MHL passage is not ready for, external equipment need not transmit TMDS signal.
In the prior art, when digital multimedia receiving apparatus (such as TV) is switched to other passages (such as AV passage, TV passage etc.) time, main control module controls end HDP_CONTROL to HPD and exports high level, cause the current collection extremely low level of audion Q7, the i.e. PIN19 pin of digital multimedia receiving apparatus interface is low level, even if now inserting HDMI equipment, PIN19 pin (now connecting the HPD signal end of HDMI) is also low level, so HDMI equipment can not normally be connected with digital multimedia receiving apparatus, HDMI equipment will not send TMDS signal, i.e. will not communicate with digital multimedia receiving apparatus;When digital multimedia receiving apparatus (such as TV) is switched to HDMI passage, HPD controls end HPD_CONTROL can send low level, audion Q7 is ended, is HDMI equipment or MHL equipment further according to the external equipment now inserted afterwards, carries out different operations.
nullWhen being switched to HDMI passage,And when HDMI equipment is connected to digital multimedia receiving apparatus by HDMI wire material,5V voltage is transferred to the+5V pin (PIN18 foot) of HDMI by HDMI equipment by wire rod,And because the inside ground wire GND of PIN2 with HDMI equipment is connected,PIN2 and PIN5 simultaneously、The same ground connection such as PIN8,So PIN2 is low level,Therefore the identification signal input part ID_INPUT of MHL identification circuit is low level,The i.e. grid of metal-oxide-semiconductor Q4 is low level,Its source ground,Therefore metal-oxide-semiconductor Q4 cut-off,The drain electrode of metal-oxide-semiconductor Q4 connects voltage (+5V) by resistance R3,Therefore the drain electrode of metal-oxide-semiconductor Q4 is high level,Then the base stage of audion Q5 is high level,Its grounded emitter,Therefore audion Q5 conducting,The then current collection of audion Q5 extremely low level,Audion Q6 emitter stage connects voltage (+5V) again,Therefore audion Q6 conducting,HPD controls end HPD_CONTROL output low level when digital multimedia receiving apparatus is switched to HDMI passage again,Therefore audion Q7 cut-off,Make to identify that signal output part ID_OUTPUT exports high level;Identify that signal output part ID_OUTPUT connects the PIN19 of HDMI, when HDMI equipment Inspection to PIN19 is high level, TMDS signal will be exported to digital multimedia receiving apparatus.
When being switched to HDMI passage, and when MHL equipment is connected to digital multimedia receiving apparatus by MHL wire rod, as it is shown on figure 3, MHL equipment passes through wire rod by high level output to MHL_CD_SENSE signal end (PIN2), and it is transferred to the main control module of digital multimedia receiving apparatus.When MHL_CD_SENSE signal end (PIN2) is high level, the MHL charging circuit work of digital multimedia receiving apparatus can be started, as shown in Figure 4, so that power supply control chip gives MHL equipment charge by MHL_VBUS signal end (PIN18);Main control module is when detecting that PIN2 is high level simultaneously, will carry out different MHL responses by the pull down resistor resistance controlled within main control module, and wherein, pull down resistor resistance is respectively 1K ohm and 100K ohm.nullNow,MHL_CD_SENSE signal end (as the identification signal input part ID_INPUT of MHL identification circuit) exports a high level,The i.e. grid of metal-oxide-semiconductor Q4 is high level,Its source ground,Therefore metal-oxide-semiconductor Q4 conducting,The drain electrode of metal-oxide-semiconductor Q4 connects supply voltage (5V) by resistance R3,Therefore the drain electrode of metal-oxide-semiconductor Q4 is low level,Then the base stage of audion Q5 is low level,Its grounded emitter,Therefore audion Q5 cut-off,The then current collection of audion Q5 extremely high level,Audion Q6 emitter stage connects supply voltage (5V) again,Therefore audion Q6 cut-off,Again due to when digital multimedia receiving apparatus is switched to HDMI passage,HPD controls end HPD_CONTROL can send low level,Therefore audion Q7 cut-off,The identification signal output part ID_OUTPUT of MHL identification circuit is empty,Therefore MHL_CBUS signal end (PIN19) can correctly identify the pull down resistor resistance within main control module under the influence of without MHL identification circuit,And send corresponding answer signal to MHL equipment,MHL equipment carries out answer signal identification after receiving answer signal,After success, MHL equipment and multimedia receiver start proper communication.
In prior art, MHL equipment controls as shown in Figure 4 with the MHL of digital multimedia receiving apparatus, and wherein, MHL_CBUS signal end can carry out two-way communication.Under digital multimedia receiving apparatus ideal case, when MHL equipment inserts digital multimedia receiving apparatus HDMI, MHL equipment can wake up the pulse MIPS to digital multimedia receiving apparatus up by MHL_CBUS signal end one MHL of input, starts shooting and communicates waking up it up.Digital multimedia receiving apparatus, under open state, also can send signal by the GPIO that MIPS controls to MHL_CBUS signal end and communicate, draw high voltage, and then realize the charging of MHL equipment.
Under digital multimedia receiving apparatus ideal case, when inserting MHL equipment by HDMI, GPIO one MHL of input that the MHL_CBUS signal end of MHL equipment is controlled by the MIPS of digital multimedia receiving apparatus wakes up pulse up to digital multimedia receiving apparatus, as shown in Figure 4, the MIPS of digital multimedia receiving apparatus can detect the MHL of input and wakes up impulse waveform up and judge whether that meeting MHL wakes up pulse standard up, if it is satisfied, then digital multimedia receiving apparatus is started shooting to communicate with MHL equipment.MHL wakes up waveform standard up as it is shown in figure 5, it is 20ms+/-10%(18 ~ 22ms that MHL wakes up the height pulse width time of pulse up), MHL wakes up pulse condition up and meets 101000101 simultaneously, wherein, is 1, is 0 during low level when described MHL wakes up pulse high level up.
But MHL equipment vendors are more in the market, a lot of MHL equipment perform MHL standard criterion the most completely, and it is nonstandard that the MHL causing MHL equipment to export wakes up pulse up, make digital multimedia receiving apparatus None-identified, it is impossible to proper communication.The non-standard MHL of the non-standard MHL equipment output of actual measurement wakes up pulse up as shown in Figure 6, and its height pulse width time is about 30ms, and its state meets 101000101.Digital multimedia receiving apparatus can not identify that the non-standard MHL of above-mentioned non-standard MHL equipment output wakes up pulse up, causes digital multimedia receiving apparatus not start shooting and communicates, and makes the digital multimedia receiving apparatus can not compatible non-standard MHL equipment.
Additionally, the MHL of part MHL equipment output wakes up the high level of pulse up and only has 1.8V, and some digital multimedia receiving apparatus is that the level of more than 2V is identified as high level, again result in digital multimedia receiving apparatus and can not normally identify that MHL wakes up pulse up, cause digital multimedia receiving apparatus not start shooting and MHL equipment communicates.
Summary of the invention
It is an object of the present invention to provide a kind of MHL recognition control circuit strengthening compatibility, enable digital multimedia receiving apparatus normally to identify non-standard MHL equipment, strengthen the compatibility of MHL equipment.
For achieving the above object, the invention provides a kind of MHL recognition control circuit strengthening compatibility, pulse detecting unit is waken up up by increasing by one, make MHL wake up pulse up and be input to main control module by another GPIO, by regulation in house software, main control module reaches to identify that the purpose that non-standard MHL wakes up pulse up, the MHL recognition control circuit of described enhancing compatibility include:
MHL recognition unit, when connecting MHL equipment, the MHL_CD_SENSE signal end identifying signal input part connection MHL equipment of described MHL recognition unit, and described identification signal input part input high level, the identification signal output part of described MHL recognition unit connects the MHL_CBUS signal end of MHL equipment, and described identification signal output part is empty;And
Wake up pulse detecting unit up, described in wake up the pulse input end that wakes up up of pulse detecting unit up and be connected to the MHL_CBUS signal end of MHL equipment, described detection wakes up the pulse output end that wakes up up of pulse unit up and is connected to the main control module of digital multimedia receiving apparatus;
Under digital multimedia receiving apparatus ideal case, described MHL equipment pass through described in wake up up pulse detecting unit wake up up pulse input end send MHL wake up pulse up, described MHL wake up up pulse pass through described in wake up up after pulse detecting unit processes through being exported described main control module by the described pulse output end that wakes up up, the described MHL that described master control module judges receives wakes up the most satisfied MHL preset of pulse up and wakes up pulse standard up, if it is satisfied, then wake up up described multimedia receiver with described MHL equipment communication.
Further, what described detection woke up pulse unit up wakes up the GPIO mouth that pulse output end is connected to the main control module of digital multimedia receiving apparatus up.
Further, described default MHL wakes up pulse standard up and is: it is 30ms+/-10% that described MHL wakes up the height pulse width time of pulse up, and MHL wakes up pulse condition up and meets 101000101 simultaneously, wherein, is 1, is 0 during low level when described MHL wakes up pulse high level up.
Improvement as technique scheme, the described pulse detecting unit that wakes up up includes the first audion, first metal-oxide-semiconductor and the second metal-oxide-semiconductor, the grounded collector of described first audion, base stage wakes up pulse input end up described in connecting, emitter stage connects the source electrode of described first metal-oxide-semiconductor, the grid of described first metal-oxide-semiconductor connects signal and controls end, drain electrode is connected on standby voltage by the first resistance, the drain electrode of described second metal-oxide-semiconductor is connected on described standby voltage by the second resistance, grid is connected to the emitter stage of described audion Q1, source ground, described pulse signal output end is connected to the drain electrode of described second metal-oxide-semiconductor;When the identification signal input part of described MHL recognition unit is low level, affiliated main control module controls end input low level to described signal;When the identification signal input part of described MHL recognition unit is high level, described main control module controls end input high level to described signal.
Further, described signal controls another GPIO mouth that end is connected to the main control module of described digital multimedia receiving apparatus.
Additionally, improvement as technique scheme, standby detector unit can be increased on existing MHL recognition unit circuit, i.e., described MHL recognition unit includes the second audion, the 3rd audion, the 4th audion and the 3rd metal-oxide-semiconductor, the grid of described 3rd metal-oxide-semiconductor connects described identification signal input part, source ground, and drain electrode is connected to supply voltage by the 3rd resistance;The base stage of described second audion is connected to the drain electrode of described 3rd metal-oxide-semiconductor, grounded emitter by the 4th resistance, and colelctor electrode is connected to supply voltage by the five, the 6th resistance of series connection;The base stage of described 3rd audion is connected to the junction point of the five, the 6th resistance of described series connection, and emitter stage is connected to supply voltage, and colelctor electrode connects the colelctor electrode of described 4th audion by the 7th resistance;The HPD that the base stage of described 4th audion connects described main control module by the 8th resistance controls end, and colelctor electrode connects described identification signal output part, grounded emitter;
The described pulse detecting unit that wakes up up includes the first audion, first metal-oxide-semiconductor and the second metal-oxide-semiconductor, the grounded collector of described first audion, base stage wakes up pulse input end up described in connecting, emitter stage connects the source electrode of described first metal-oxide-semiconductor, the grid of described first metal-oxide-semiconductor controls, by described signal, the colelctor electrode that end is connected to the second audion of described MHL recognition unit, drain electrode is connected on standby voltage by the first resistance, the drain electrode of described second metal-oxide-semiconductor is connected on described standby voltage by the second resistance, grid is connected to the emitter stage of described audion Q1, source ground, described pulse signal output end is connected to the drain electrode of described second metal-oxide-semiconductor.
Wherein, described first audion and the 3rd audion are PNP triode, and described second audion and the 4th audion are NPN audion.
Wherein, described standby voltage is preferably 3.3V.
Wherein, described supply voltage is preferably 5V.
Wherein, described high level is more than 1.5V, and described low level is less than 0.8V.
Employing the invention has the beneficial effects as follows: the present invention wakes up pulse detecting unit hardware circuit up by increase, make MHL equipment wake up pulse up by the MHL that MHL_CBUS signal end sends and be input to the main control module of digital multimedia receiving apparatus after other GPIO, the MHL that main control module realizes change default by adjusting software wakes up pulse standard up, thus reaching to identify the non-standard MHL that non-standard MHL equipment sends purpose communicate with MHL equipment that wakes up pulse up so that digital multimedia receiving apparatus is started shooting, increase is compatible.Wherein wake up pulse detecting unit up to increase on original MHL recognition unit circuit, it is also possible to be newly-increased separate with MHL recognition unit.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, the accompanying drawing used required in embodiment or description of the prior art will be briefly described below, apparently, accompanying drawing in describing below is only some embodiments of the present invention, for those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is HDMI and MHL interface definition figure;
Fig. 2 is that the HPD of HDMI controls schematic diagram;
Fig. 3 is MHL equipment and the concrete connection diagram of digital multimedia receiving apparatus in prior art;
Fig. 4 is MHL equipment and the control schematic diagram of digital multimedia receiving apparatus in prior art;
Fig. 5 is that standard MHL wakes up impulse waveform and pulse condition schematic diagram up;
Fig. 6 is that the non-standard MHL of actual measurement wakes up impulse waveform and pulse condition schematic diagram up;
Fig. 7 is the block diagram of the embodiment strengthening compatible MHL recognition control circuit that the present invention provides;
MHL equipment and the control schematic diagram of digital multimedia receiving apparatus when Fig. 8 is the embodiment using Fig. 7 to provide;
Fig. 9 is the block diagram of another embodiment strengthening compatible MHL recognition control circuit that the present invention provides;
Figure 10 is the physical circuit figure of MHL recognition unit in Fig. 9;
Figure 11 is the physical circuit figure waking up pulse detecting unit in Fig. 9 up;
Figure 12 is the block diagram of the another embodiment strengthening compatible MHL recognition control circuit that the present invention provides;
Figure 13 is the physical circuit figure of MHL recognition unit in Figure 12;
Figure 14 is the physical circuit figure waking up pulse detecting unit in Figure 12 up.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only a part of embodiment of the present invention rather than whole embodiments.Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art are obtained under not making creative work premise, broadly fall into the scope of protection of the invention.
Embodiment
1
Embodiments provide a kind of MHL recognition control circuit strengthening compatibility, as it is shown in fig. 7, comprises:
MHL recognition unit 101, when connecting MHL equipment, the MHL_CD_SENSE signal end identifying signal input part connection MHL equipment of described MHL recognition unit 101, and described identification signal input part input high level, the identification signal output part of described MHL recognition unit connects the MHL_CBUS signal end of MHL equipment, and described identification signal output part is empty;And
Wake up pulse detecting unit 102 up, the described pulse input end that wakes up up waking up pulse detecting unit 102 up is connected to the MHL_CBUS signal end of MHL equipment, and what described detection woke up pulse unit 102 up wakes up the GPIO mouth that pulse output end is connected to the main control module of digital multimedia receiving apparatus up;
Under digital multimedia receiving apparatus ideal case, inserting MHL equipment, MHL equipment can wake up pulse up to the MIPS of digital multimedia receiving apparatus and main control module by the MHL_CBUS signal end of MHL equipment transmission MHL, as shown in Figure 8 simultaneously.Wherein, the MIPS of described digital multimedia receiving apparatus and main control module have all been preset MHL and have been waken up pulse standard up, the MHL that described MIPS presets wakes up pulse standard up and is: it is 20ms+/-10%(18 ~ 22ms that MHL wakes up the height pulse width time of pulse up), MHL wakes up pulse condition up and meets 101000101 simultaneously, wherein, it is 1 when described MHL wakes up pulse high level up, is 0 during low level;Namely standard MHL of standard MHL equipment wakes up pulse up, its impulse form is as shown in Figure 5.And the MHL preset of described main control module wakes up pulse standard up and is: it is 30ms+/-10% that described MHL wakes up the height pulse width time of pulse up, MHL wakes up pulse condition up and meets 101000101 simultaneously, and wherein, described MHL is 1 when waking up pulse high level up, is 0 during low level;Namely the non-standard MHL of non-standard MHL equipment output wakes up pulse up, its impulse form is as shown in Figure 6.
When MHL equipment is standard MHL equipment and the standard MHL of transmission wakes up pulse up, MIPS can judge that its MHL meeting in MIPS wakes up pulse standard up, thus wakes up digital multimedia receiving apparatus start and MHL equipment communication up, and main control module is inoperative.
When MHL equipment criteria of right and wrong MHL equipment and send non-standard MHL wake up pulse up time, MHL equipment pass through described in wake up up pulse detecting unit 102 wake up up pulse input end send MHL wake up pulse up, described MHL wake up up pulse pass through described in wake up up after pulse detecting unit 102 processes through being exported described main control module by the described pulse output end that wakes up up, the described MHL that described master control module judges receives wake up up pulse whether meet main control module preset MHL wake up pulse standard up, if it is satisfied, then wake up up described multimedia receiver with described MHL equipment communication.
Embodiment
2
Embodiments provide the another kind of MHL recognition control circuit strengthening compatibility, as it is shown in figure 9, include:
MHL recognition unit 101, when connecting MHL equipment, the MHL_CD_SENSE signal end identifying signal input part connection MHL equipment of described MHL recognition unit 101, and described identification signal input part input high level, the identification signal output part of described MHL recognition unit connects the MHL_CBUS signal end of MHL equipment, and described identification signal output part is empty;And
Wake up pulse detecting unit 102 up, the described pulse input end that wakes up up waking up pulse detecting unit 102 up is connected to the MHL_CBUS signal end of MHL equipment, and what described detection woke up pulse unit 102 up wakes up the GPIO mouth that pulse output end is connected to the main control module of digital multimedia receiving apparatus up.
Further, MHL recognition unit 101 includes audion Q5, audion Q6, audion Q7 and metal-oxide-semiconductor Q4, as shown in Figure 10, the grid (as the signal input part ID_INPUT of MHL identification circuit) of metal-oxide-semiconductor Q4 connects the PIN2 (i.e. being connected MHL_CD_SENSE signal end or the earth terminal of HDMI of MHL by the PIN2 of HDMI) of HDMI, source ground, drain electrode is connected to supply voltage (5V) by resistance R3;The base stage of described audion Q5 is connected to the drain electrode of described metal-oxide-semiconductor Q4, grounded emitter by resistance R4, and colelctor electrode is connected to supply voltage (5V) by resistance R5, R6 of series connection;The base stage of audion Q6 is connected to the junction point of resistance R5, R6 of series connection, and emitter stage is connected to supply voltage (5V), the colelctor electrode colelctor electrode by resistance R7 connecting triode Q7;The HPD that the base stage of audion Q7 connects main control module by resistance R8 controls end HPD_CONTROL, grounded emitter;The colelctor electrode (as the identification signal output part ID_OUTPUT of MHL identification circuit) of audion Q7 passes through
PIN19 connects the MHL_CBUS signal end of MHL.
nullFurther,Wake up pulse detecting unit 102 up and include the first audion Q1、First metal-oxide-semiconductor Q2 and the second metal-oxide-semiconductor Q3,The grounded collector of the most described first audion Q1,Base stage wakes up pulse input end PULSE_INPUT up described in connecting,Emitter stage connects the source electrode of described first metal-oxide-semiconductor Q2,The grid of described first metal-oxide-semiconductor Q2 connects signal and controls end POWER_ON/OFF,Drain electrode is connected on standby voltage 3V3_STB (3.3V) by the first resistance R1,The drain electrode of described second metal-oxide-semiconductor Q3 is connected on described standby voltage 3V3_STB (3.3V) by the second resistance R2,Grid is connected to the emitter stage of described audion Q1,Source ground,Described pulse signal output end PULSE_OUTPUT is connected to the drain electrode of described second metal-oxide-semiconductor Q3;When the identification signal input part ID_INPUT of described MHL recognition unit 101 is low level, affiliated main control module controls end POWER_ON/OFF input low level to described signal;When the identification signal input part ID_INPUT of described MHL recognition unit 101 is high level, described main control module controls end POWER_ON/OFF input high level to described signal.
Wherein, described signal controls the GPIO mouth that end POWER_ON/OFF is connected to the main control module of described digital multimedia receiving apparatus.
Under digital multimedia receiving apparatus ideal case, inserting MHL equipment, MHL equipment can wake up pulse up to the MIPS of digital multimedia receiving apparatus and main control module by the MHL_CBUS signal end of MHL equipment transmission MHL, as shown in Figure 8 simultaneously.Wherein, the MIPS of described digital multimedia receiving apparatus and main control module have all been preset MHL and have been waken up pulse standard up, the MHL that described MIPS presets wakes up pulse standard up and is: it is 20ms+/-10%(18 ~ 22ms that MHL wakes up the height pulse width time of pulse up), MHL wakes up pulse condition up and meets 101000101 simultaneously, wherein, it is 1 when described MHL wakes up pulse high level up, is 0 during low level;Namely standard MHL of standard MHL equipment wakes up pulse up, its impulse form is as shown in Figure 5.And the MHL preset of described main control module wakes up pulse standard up and is: it is 30ms+/-10% that described MHL wakes up the height pulse width time of pulse up, MHL wakes up pulse condition up and meets 101000101 simultaneously, and wherein, described MHL is 1 when waking up pulse high level up, is 0 during low level;Namely the non-standard MHL of non-standard MHL equipment output wakes up pulse up, its impulse form is as shown in Figure 6.
When MHL equipment is standard MHL equipment and the standard MHL of transmission wakes up pulse up, MIPS can judge that its MHL meeting in MIPS wakes up pulse standard up, thus wakes up digital multimedia receiving apparatus start and MHL equipment communication up, and main control module is inoperative.
nullWhen MHL equipment criteria of right and wrong MHL equipment and send non-standard MHL wake up pulse up time,The MHL_CD_SENSE signal end of MHL equipment can export high level,The identification signal input part ID_INPUT of i.e. MHL recognition unit 101 is high level,Then main control module controls end POWER_ON/OFF input high level to described signal,The grid of the i.e. first metal-oxide-semiconductor Q2 is high level,Its drain electrode connects standby voltage 3V3_STB again,Therefore the first metal-oxide-semiconductor Q2 conducting,The then transmitting extremely high level of the first audion Q1,The grounded collector of the first audion Q1,MHL equipment wakes up pulse up by waking up the pulse input end PULSE_INPUT transmission MHL that wakes up up of pulse detecting unit 102 up again,I.e. MHL wakes up the pulsing base stage to the first audion Q1 up,MHL wakes up pulse up and penetrates the grid with output to the second metal-oxide-semiconductor Q3 through the first audion Q1,The drain electrode of the second metal-oxide-semiconductor Q3 is connected to standby voltage 3V3_STB(3.3V again),Therefore the second metal-oxide-semiconductor Q3 is anti-phase,Cause MHL to wake up pulse up to export to waking up pulse output end PULSE_OUTPUT up after the second metal-oxide-semiconductor Q3 is anti-phase,Output is to described main control module again,The described MHL that described master control module judges receives wakes up the most satisfied MHL preset of pulse up and wakes up pulse standard up,If met,Then wake up up described multimedia receiver with described MHL equipment communication.
Wherein the drain electrode of the second metal-oxide-semiconductor Q3 is connected to standby voltage 3V3_STB(3.3V), the MHL that can make output wakes up the high level of pulse up at about 3.3V, so that digital multimedia receiving apparatus can normally identify high level, make digital multimedia receiving apparatus start with MHL equipment communication.It is possible to prevent the identified MHL caused of high level (1.8V) originally to wake up pulse up can not identify thus phenomenon generation that digital multimedia receiving apparatus can not be made start shooting.
In the present embodiment, wake up pulse detecting unit 102 up with MHL recognition unit 101 without directly contacting, separate, two unit can be integrated on different circuit boards respectively, just can reach to identify non-standard MHL equipment so that an element circuit only need to be increased in the case of not changing available circuit, strengthen the purpose of compatibility.
Embodiment
3
Embodiments provide another and strengthen compatible MHL recognition control circuit, as shown in figure 12, including:
MHL recognition unit 101, when connecting MHL equipment, the MHL_CD_SENSE signal end identifying signal input part connection MHL equipment of described MHL recognition unit 101, and described identification signal input part input high level, the identification signal output part of described MHL recognition unit connects the MHL_CBUS signal end of MHL equipment, and described identification signal output part is empty;And
Wake up pulse detecting unit 102 up, the described pulse input end that wakes up up waking up pulse detecting unit 102 up is connected to the MHL_CBUS signal end of MHL equipment, and what described detection woke up pulse unit 102 up wakes up the GPIO mouth that pulse output end is connected to the main control module of digital multimedia receiving apparatus up.
Further, MHL recognition unit 101 includes the second audion Q5, the 3rd audion Q6, the 4th audion Q7 and the 3rd metal-oxide-semiconductor Q4, as shown in figure 13, the grid (as the signal input part ID_INPUT of MHL identification circuit) of the 3rd metal-oxide-semiconductor Q4 connects the PIN2 (i.e. being connected the MHL_CD_SENSE signal end of MHL by the PIN2 of HDMI) of HDMI, source ground, drain electrode is connected to supply voltage (5V) by the 3rd resistance R3;The base stage of described second audion Q5 is connected to the drain electrode of described 3rd metal-oxide-semiconductor Q4, grounded emitter by the 4th resistance R4, and colelctor electrode is connected to supply voltage (5V) by the five, the 6th resistance R5, R6 of series connection;The base stage of the 3rd audion Q6 is connected to the junction point of the five, the 6th resistance R5, R6 of series connection, and emitter stage is connected to supply voltage, and colelctor electrode connects the colelctor electrode of the 4th audion Q7 by the 6th resistance R7;The HPD that the base stage of the 4th audion Q7 connects main control module by the 8th resistance R8 controls end HPD_CONTROL, grounded emitter;The colelctor electrode of the 4th audion Q7 connects the MHL_CBUS signal end of MHL by the PIN19 of HDMI, and control signal outfan POWER_OUTPUT connects the colelctor electrode of the second audion Q5.
nullFurther,Wake up pulse detecting unit 102 up and include the first audion Q1、First metal-oxide-semiconductor Q2 and the second metal-oxide-semiconductor Q3,The grounded collector of the most described first audion Q1,Base stage wakes up pulse input end PULSE_INPUT up described in connecting,Emitter stage connects the source electrode of described first metal-oxide-semiconductor Q2,The grid of described first metal-oxide-semiconductor Q2 connects signal and controls end POWER_ON/OFF,The control signal outfan POWER_OUTPUT of i.e. MHL recognition unit 101,Drain electrode is connected to standby voltage 3V3_STB(3.3V by the first resistance R1) on,The drain electrode of described second metal-oxide-semiconductor Q3 is connected to described standby voltage 3V3_STB(3.3V by the second resistance R2) on,Grid is connected to the emitter stage of described audion Q1,Source ground,Described pulse signal output end PULSE_OUTPUT is connected to the drain electrode of described second metal-oxide-semiconductor Q3.
Wherein, described first audion Q1 and the 3rd audion Q6 is PNP triode, and described second audion Q5 and the 4th audion Q7 is NPN audion.
Under digital multimedia receiving apparatus ideal case, inserting MHL equipment, MHL equipment can wake up pulse up to the MIPS of digital multimedia receiving apparatus and main control module by the MHL_CBUS signal end of MHL equipment transmission MHL, as shown in Figure 8 simultaneously.Wherein, the MIPS of described digital multimedia receiving apparatus and main control module have all been preset MHL and have been waken up pulse standard up, the MHL that described MIPS presets wakes up pulse standard up and is: it is 20ms+/-10%(18 ~ 22ms that MHL wakes up the height pulse width time of pulse up), MHL wakes up pulse condition up and meets 101000101 simultaneously, wherein, it is 1 when described MHL wakes up pulse high level up, is 0 during low level;Namely standard MHL of standard MHL equipment wakes up pulse up, its impulse form is as shown in Figure 5.And the MHL preset of described main control module wakes up pulse standard up and is: it is 30ms+/-10% that described MHL wakes up the height pulse width time of pulse up, MHL wakes up pulse condition up and meets 101000101 simultaneously, and wherein, described MHL is 1 when waking up pulse high level up, is 0 during low level;Namely the non-standard MHL of non-standard MHL equipment output wakes up pulse up, its impulse form is as shown in Figure 6.
When MHL equipment is standard MHL equipment and the standard MHL of transmission wakes up pulse up, MIPS can judge that its MHL meeting in MIPS wakes up pulse standard up, thus wakes up digital multimedia receiving apparatus start and MHL equipment communication up, and main control module is inoperative.
nullWhen MHL equipment criteria of right and wrong MHL equipment and send non-standard MHL wake up pulse up time,The MHL_CD_SENSE signal end of MHL equipment exports high level to the identification signal input part ID_INPUT of MHL recognition unit 101,The grid of the i.e. the 3rd metal-oxide-semiconductor Q4 is high level,Its source ground,Therefore the 3rd metal-oxide-semiconductor Q4 conducting,The drain electrode of the 3rd metal-oxide-semiconductor Q4 connects supply voltage (5V) by resistance R3,Therefore the drain electrode of the 3rd metal-oxide-semiconductor Q4 is low level,Then the base stage of the second audion Q5 is low level,Its grounded emitter,Therefore the second audion Q5 cut-off,The then current collection extremely high level of the second audion Q5,The control signal outfan POWER_OUTPUT of i.e. MHL recognition unit 101 is high level,Thus send high level to the grid (i.e. signal controls end POWER_ON/OFF) of described the first metal-oxide-semiconductor Q2 waking up pulse detecting unit 102 up,The grid of the i.e. first metal-oxide-semiconductor Q2 is high level,Its drain electrode connects standby voltage 3V3_STB (3.3V) again,Therefore the first metal-oxide-semiconductor Q2 conducting,The then transmitting extremely high level of the first audion Q1,The grounded collector of the first audion Q1,MHL equipment wakes up pulse up by waking up the pulse input end PULSE_INPUT transmission MHL that wakes up up of pulse detecting unit 102 up again,I.e. MHL wakes up the pulsing base stage to the first audion Q1 up,MHL wakes up pulse up and penetrates the grid with output to the second metal-oxide-semiconductor Q3 through the first audion Q1,The drain electrode of the second metal-oxide-semiconductor Q3 is connected to standby voltage 3V3_STB(3.3V again),Therefore the second metal-oxide-semiconductor Q3 is anti-phase,Cause MHL to wake up pulse up to export to waking up pulse output end PULSE_OUTPUT up after the second metal-oxide-semiconductor Q3 is anti-phase,Output is to described main control module again,The described MHL that described master control module judges receives wake up up pulse whether meet main control module preset MHL wake up pulse standard up,If met,Then wake up up described multimedia receiver with described MHL equipment communication.
Wherein the drain electrode of the second metal-oxide-semiconductor Q3 is connected to standby voltage 3V3_STB(3.3V), the MHL that can make output wakes up the high level of pulse up at about 3.3V, so that digital multimedia receiving apparatus can normally identify high level, so that digital multimedia receiving apparatus is started shooting to communicate with MHL equipment.It is possible to prevent the identified MHL caused of high level (1.8V) originally to wake up pulse up can not identify thus phenomenon generation that digital multimedia receiving apparatus can not be made start shooting.
In the present embodiment, waking up pulse detecting unit 102 up increases on existing MHL recognition unit 101 basis, and two unit can be integrated on same circuit board.
In above example, it is preferred that described standby charging voltage is 3.3V.
Preferably, described supply voltage is 5V.
Preferably, described high level is more than 1.5V, and described low level is less than 0.8V.
Above inventive embodiments, pulse detecting unit 102 hardware circuit is waken up up by increase, make MHL equipment wake up pulse up by the MHL that MHL_CBUS signal end sends and be input to the main control module of digital multimedia receiving apparatus after other GPIO, the MHL that main control module realizes change default by adjusting software wakes up pulse standard up, thus reaching to identify the non-standard MHL that non-standard MHL equipment sends purpose communicate with MHL equipment that wakes up pulse up so that digital multimedia receiving apparatus is started shooting, enhancing is compatible.Wherein wake up pulse detecting unit 102 up to increase on original MHL recognition unit 101 circuit, it is also possible to be newly-increased separate with MHL recognition unit 101.
Above disclosed it is only one preferred embodiment of the present invention, certainly can not limit the interest field of the present invention, the equivalent variations therefore made according to the claims in the present invention with this, still belong to the scope that the present invention is contained.
Claims (10)
1. strengthen a MHL recognition control circuit for compatibility, including:
MHL recognition unit, when connecting MHL equipment, the identification signal input of described MHL recognition unit
End connects the MHL_CD_SENSE signal end of MHL equipment, and described identification signal input part input height
Level, the MHL_CBUS letter identifying signal output part connection MHL equipment of described MHL recognition unit
Number end, and described identification signal output part is empty;
It is characterized in that, the described MHL recognition control circuit strengthening compatibility also includes waking up pulse detection list up
Unit, described in wake up the pulse input end that wakes up up of pulse detecting unit up and be connected to the MHL_CBUS of MHL equipment
Signal end, described in wake up the pulse output end that wakes up up of pulse detecting unit up and be connected to digital multimedia receiving apparatus
Main control module;
Under digital multimedia receiving apparatus ideal case, described MHL equipment passes through described MHL_CBUS
Signal end wakes up pulse up to the described pulse input end transmission MHL that wakes up up waking up pulse detecting unit up, described
MHL wake up up pulse pass through described in wake up up pulse detecting unit process after through by described wake up up pulse output end output
To described main control module, the described MHL that described master control module judges receives wakes up whether pulse meets default up
MHL wake up pulse standard up, if it is satisfied, then wake up up described multimedia receiver with described MHL
Equipment communicates.
2. the MHL recognition control circuit strengthening compatibility as claimed in claim 1, it is characterised in that
The described pulse output end that wakes up up waking up pulse detecting unit up is connected to the master control mould of digital multimedia receiving apparatus
The GPIO mouth of block.
3. the MHL recognition control circuit strengthening compatibility as claimed in claim 1, it is characterised in that
Described default MHL wakes up pulse standard up: described MHL wakes up the height pulse width time of pulse up and is
30ms+/-10%, MHL wakes up pulse condition up and meets 101000101 simultaneously, and wherein, described MHL wakes up up
It is 1 during pulse high level, is 0 during low level.
4. the MHL recognition control circuit strengthening compatibility as claimed in claim 1, it is characterised in that
The described pulse detecting unit that wakes up up includes the first audion, the first metal-oxide-semiconductor and the second metal-oxide-semiconductor, described
The grounded collector of one audion, base stage connect described in wake up pulse input end up, emitter stage connects described first
The source electrode of metal-oxide-semiconductor, the grid of described first metal-oxide-semiconductor connects signal and controls end, and drain electrode is by the first resistance
Being connected on standby voltage, the drain electrode of described second metal-oxide-semiconductor is connected to described standby voltage by the second resistance
On, grid is connected to the emitter stage of described first audion, source ground, described in wake up pulse output end up even
Receive the drain electrode of described second metal-oxide-semiconductor;When the identification signal input part of described MHL recognition unit is low electricity
At ordinary times, described main control module controls end input low level to described signal;Knowledge when described MHL recognition unit
When level signal input is high level, described main control module controls end input high level to described signal.
5. the MHL recognition control circuit strengthening compatibility as claimed in claim 4, it is characterised in that
Described signal controls another GPIO mouth that end is connected to the main control module of described digital multimedia receiving apparatus.
6. the MHL recognition control circuit strengthening compatibility as claimed in claim 4, it is characterised in that
Described MHL recognition unit includes the second audion, the 3rd audion, the 4th audion and the 3rd MOS
Pipe, the grid of described 3rd metal-oxide-semiconductor connects described identification signal input part, source ground, drains by the
Three resistance are connected to supply voltage;The base stage of described second audion is connected to the described 3rd by the 4th resistance
The drain electrode of metal-oxide-semiconductor, grounded emitter, colelctor electrode is connected to power supply electricity by the five, the 6th resistance of series connection
Pressure;The base stage of described 3rd audion is connected to the junction point of the five, the 6th resistance of described series connection, launches
Pole is connected to supply voltage, and colelctor electrode connects the colelctor electrode of described 4th audion by the 7th resistance;Described
The HPD that the base stage of the 4th audion connects described main control module by the 8th resistance controls end, and colelctor electrode connects
Described identification signal output part, grounded emitter;
The described pulse detecting unit that wakes up up includes the first audion, the first metal-oxide-semiconductor and the second metal-oxide-semiconductor, institute
Stating the grounded collector of the first audion, wake up pulse input end up described in base stage connection, emitter stage connects described
The source electrode of the first metal-oxide-semiconductor, the grid of described first metal-oxide-semiconductor controls end by described signal and is connected to described
The colelctor electrode of the second audion of MHL recognition unit, drain electrode is connected on standby voltage by the first resistance,
The drain electrode of described second metal-oxide-semiconductor is connected on described standby voltage by the second resistance, and grid is connected to described
The emitter stage of the first audion, source ground, described in wake up pulse output end up and be connected to described second metal-oxide-semiconductor
Drain electrode.
7. the MHL recognition control circuit strengthening compatibility as claimed in claim 6, it is characterised in that
Described first audion and the 3rd audion are PNP triode, and described second audion and the 4th audion are
NPN audion.
8. the MHL recognition control circuit strengthening compatibility as according to any one of claim 4~7, its
Being characterised by, described standby voltage is preferably 3.3V.
9. the MHL recognition control circuit strengthening compatibility as claimed in claim 6, it is characterised in that
Described supply voltage is preferably 5V.
10. the MHL recognition control circuit strengthening compatibility as claimed in claim 4, it is characterised in that
Described high level is more than 1.5V, and described low level is less than 0.8V.
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CN104301651B (en) * | 2014-09-26 | 2018-03-23 | 四川长虹电器股份有限公司 | Compatible MHL television system and method |
WO2016126874A1 (en) * | 2015-02-04 | 2016-08-11 | Qualcomm Incorporated | Voltage mode and current mode device enumeration |
CN105681781B (en) * | 2015-04-17 | 2018-01-12 | 深圳Tcl数字技术有限公司 | MH L mode detection method and device |
CN104994320B (en) * | 2015-06-12 | 2018-05-15 | 青岛海信电器股份有限公司 | A kind of HDMI service equipments |
CN106792181A (en) * | 2017-02-14 | 2017-05-31 | 广州视源电子科技股份有限公司 | Standby awakening method and device for smart television |
CN110928212B (en) * | 2019-09-19 | 2022-05-10 | 中兴通讯股份有限公司 | Wake-up circuit and wake-up method |
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