CN203981836U - Mechanism for testing circuit boards and test macro - Google Patents
Mechanism for testing circuit boards and test macro Download PDFInfo
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- CN203981836U CN203981836U CN201420401446.0U CN201420401446U CN203981836U CN 203981836 U CN203981836 U CN 203981836U CN 201420401446 U CN201420401446 U CN 201420401446U CN 203981836 U CN203981836 U CN 203981836U
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Abstract
The test macro that the utility model relates to a kind of mechanism for testing circuit boards and contains this test structure.This mechanism for testing comprises first signal layer and the secondary signal layer being oppositely arranged, and wherein, between two signal via of first signal layer and secondary signal layer and/or both sides are provided with the ground connection reference bore parallel with signal via.The mechanism for testing circuit boards with this structure, by between two signal via and/or both sides ground connection reference bore is set, thereby via structure design parameter is diversified, it is large that the scope of application of whole mechanism for testing becomes, and through hole impedance and Impedance Matching on Transmission Line, signal reflex reduces, thereby the degree of fitting of loss test improves, and test result is accurate; In addition, because the loss of above-mentioned mechanism for testing via hole is low, via hole loss proportion in overall losses is less, negligible, thereby testing result is more accurate.
Description
Technical field
The utility model relates to printed circuit board test field, especially relates to a kind of mechanism for testing circuit boards and test macro.
Background technology
Along with the high speed development of high frequency technique, the integrality of signal becomes the vital problem of technical development.And loss of signal is one of key factor affecting signal integrity.Printed circuit board transmission line loss of signal main source comprises conductor losses and dielectric loss, is simultaneously also subject to Copper Foil roughness, impedance mismatch, crosstalks, the factor such as radiation affects.Tradition has frequency domain method, effective bandwidth method, root pulse energy method, short pulse Law of Communication and single-ended TDR/TDT (transmission of Time Domain Reflectometry/time domain) difference insertion loss method (SET2DIL method) etc. for the method for testing printed circuit board transmission line signals loss.Wherein, single-ended TDR difference insertion loss method, because its calibrating device is simple in structure, it is consuming time low to calibrate, is widely used in the batch testing field that printed circuit board (PCB) is manufactured.
While using traditional mechanism for testing to carry out the test of SET2DIL method to printed circuit board (PCB), because the parameter of structure design of via hole in mechanism is single, under different designs condition, can cause through hole impedance not mate with transmission line impedance, signal reflex increases, and causes the right reduction of loss test Linear Quasi and test result bigger than normal; And when SET2DIL method is tested, for the lower transmission line of loss, because via hole loss proportion in overall losses increases, now via hole loss be can not ignore.
Utility model content
Based on this, be necessary to provide a kind of mechanism for testing circuit boards and test macro that can improve measuring accuracy.
A kind of mechanism for testing circuit boards, comprise the first signal layer and the secondary signal layer that are oppositely arranged, between described first signal layer and described secondary signal layer, be provided with two signal via that be arranged in parallel, and between two described signal via and/or both sides are provided with the ground connection reference bore parallel with described signal via, described signal via and described ground connection reference bore are the through hole that connects described first signal layer and described secondary signal layer, described first signal layer is provided with two detection heads that are connected respectively with two described signal via, described secondary signal layer is provided with two joints that are connected respectively with two described signal via.
Therein in an embodiment, on described first signal layer and described secondary signal layer, the two ends of described ground connection reference bore are respectively equipped with reference bore pad, the two ends of described signal via are respectively equipped with signal via pad, and described detection head is electrically connected to the signal via pad on described first signal layer, described joint is electrically connected to the signal via pad on described secondary signal layer.
In an embodiment, between described first signal layer and described secondary signal layer, be also provided with pilot hole therein, described pilot hole is the through hole of the described first signal layer of connection and described secondary signal layer, and is parallel to described signal via.
In an embodiment, the quantity of described ground connection reference bore is 1 therein, and 1 described ground connection reference bore is located at the centre of two described signal via.
In an embodiment, the quantity of described ground connection reference bore is two therein, and two described signal via are all between two described ground connection reference bore.
In an embodiment, the quantity of described ground connection reference bore is 3 therein, and 3 described ground connection reference bore and two described signal via intervals settings, and both sides are described ground connection reference bore.
In an embodiment, the length of the unnecessary short column of described signal via is 0～0.3mm therein, and aperture is 0.15～0.3mm, and the minor increment between the hole wall of two described signal via is 0.8～2.5mm.
A circuit board testing system, comprises mechanism for testing circuit boards described in above-mentioned arbitrary embodiment and with reference to mechanism, described reference mechanisms comprises the 3rd signals layer and the 4th signals layer being oppositely arranged, between described the 3rd signals layer and described the 4th signals layer, be provided with two contrast signal via holes that be arranged in parallel, and between two described contrast signal via holes and/or both sides are provided with parallel with described contrast signal via hole with reference to ground connection reference bore, described contrast signal via hole and the described through hole that connects described the 3rd signals layer and described the 4th signals layer that is with reference to ground connection reference bore, described the 3rd signals layer is provided be connected respectively with two described contrast signal via holes two with reference to detection head, described the 4th signals layer is provided be connected respectively with two described contrast signal via holes two with reference to joint, distance between described the 3rd signals layer and described the 4th signals layer and corresponding described first signal layer and the distance between described secondary signal layer are consistent, described consistent with the order of magnitude setting position of described ground connection reference bore with reference to the quantity of ground connection reference bore and the position of setting, and two described with reference to short circuit between detection head.
The mechanism for testing circuit boards with said structure, by between two signal via and/or both sides ground connection reference bore is set, thereby via structure design parameter is diversified, it is large that the scope of application of whole mechanism for testing becomes, and through hole impedance and Impedance Matching on Transmission Line, signal reflex reduces, thereby the degree of fitting of loss test improves, and test result is accurate; In addition, because the loss of above-mentioned mechanism for testing via hole is low, via hole loss proportion in overall losses is less, negligible, thereby testing result is more accurate.
Accompanying drawing explanation
Fig. 1 is the structural representation of the mechanism for testing circuit boards of an embodiment;
Fig. 2 is the cut-open view of Fig. 1 mechanism for testing circuit boards;
Fig. 3 is the structural representation with reference to mechanism of an embodiment.
Embodiment
For the ease of understanding the utility model, below with reference to relevant drawings, the utility model is described more fully.In accompanying drawing, provided preferred embodiment of the present utility model.But the utility model can be realized in many different forms, be not limited to embodiment described herein.On the contrary, providing the object of these embodiment is to make to the understanding of disclosure of the present utility model more thoroughly comprehensively.
It should be noted that, when element is called as " being fixed on " another element, can directly can there is element placed in the middle in it on another element or also.When an element is considered to " connection " another element, it can be directly connected to another element or may have centering elements simultaneously.
Unless otherwise defined, all technology of using are herein identical with the implication that belongs to the common understanding of those skilled in the art of the present utility model with scientific terminology.The term using in instructions of the present utility model herein, just in order to describe the object of specific embodiment, is not intended to be restriction the utility model.Term as used herein "and/or" comprise one or more relevant Listed Items arbitrarily with all combinations.
The circuit board testing system of one embodiment is mainly for detection of the loss of the upper transmission line of printed circuit board (PCB) (PCB), and it comprises mechanism for testing circuit boards and with reference to mechanism.Wherein, mechanism for testing circuit boards for single-ended connection of transmission line on circuit board, and by single-ended TDR/TDT difference insertion loss method, carry out the loss value of sense transmission line.Basic identical with reference to the detection head short circuit of mechanism and the structure of structure and mechanism for testing.By contrast circuit board test mechanism with reference to the test result of mechanism, can obtain comparatively accurately the loss value of transmission line on circuit board.
As shown in Figure 1, the mechanism for testing circuit boards 100 of present embodiment comprises first signal layer 110 and secondary signal layer 120.First signal layer 110 is oppositely arranged with secondary signal layer 120.Between first signal layer 110 and secondary signal layer 120, be provided with a plurality of reference layers 160.
Between first signal layer 110 and secondary signal layer 120, be provided with two signal via 130.Two signal via 130 be arranged in parallel, and for through reference layer 160 and connect the metallized through hole of first signal layer 110 and secondary signal layer 120.Signal via 130 and reference layer 160 noncontacts.On first signal layer 110 and secondary signal layer 120, be respectively equipped with the signal via pad 112 and 122 arranging around the end of signal via 130.First signal layer 110 is provided with the detection head 114 being electrically connected to two signal via pads 112, for being electrically connected to one end of circuit board transmission line 800, and the other end short circuit of circuit board transmission line 800.Secondary signal layer 120 is provided with the joint 124 being electrically connected to two signal via pads 122.
The length of the unnecessary short column (stub) of the signal via 130 of present embodiment is 0～0.3mm, and aperture is 0.15～0.3mm, and the minor increment between the hole wall of two signal via 130 is 0.8～2.5mm.
Further, in the present embodiment, between two signal via 130 and/or both sides are provided with ground connection reference bore 140.Ground connection reference bore 140 be arranged in parallel with signal via 130, and the coplanar setting in axis of the axis of ground connection reference bore 140 and two signal via 130.Ground connection reference bore 140 is for connecting the metallized through hole of first signal layer 110, reference layer 160 and secondary signal layer 120.The two ends of ground connection reference bore 140 are respectively equipped with reference bore pad 116 and 126, and wherein, reference bore pad 116 is located on first signal layer 110, and reference bore pad 126 is located on secondary signal layer 120.
The size of the ground connection reference bore 140 of present embodiment and the consistent size of signal via 130.The quantity of ground connection reference bore 140 can be 1,2 or 3 etc.When the quantity of ground connection reference bore 140 is 1, this ground connection reference bore 140 is located at the centre position of two signal via 130, is also that the axis of ground connection reference bore 140 is equal apart from the distance of the axis of two signal via 130.When the quantity of ground connection reference bore 140 is two, two ground connection reference bore 140 are positioned at the both sides of two signal via 130, also two signal via 130 are between two ground connection reference bore 140, and each ground connection reference bore 140 is consistent with the distance between the signal via 130 of being close to.When the quantity of ground connection reference bore 140 is 3, ground connection reference bore 140 arranges with signal via 130 intervals, and outermost two is ground connection reference bore 140.When the quantity of ground connection reference bore 140 is other quantity, the setting position of ground connection reference bore 140 and signal via 130 in like manner, as long as the distance between the signal via 130 of the ground connection reference bore 140 that the distance between the ground connection reference bore 140 arranging between signal via 130 and corresponding contiguous signal via 130 and/or signal via 130 both sides arrange and vicinity is accordingly consistent.
In addition, in the present embodiment, between first signal layer 110 and secondary signal layer 120, be also provided with the pilot hole 150 for locating in process.Pilot hole 150 is the non-metallic through hole of connection first signal layer 110 with secondary signal layer 120, and is parallel to signal via 130 settings.The pilot hole 150 of present embodiment has four, is divided into the corner location of first signal layer 110.
As shown in Figure 3, this reference mechanisms 200 comprises the 3rd signals layer 210 and the 4th signals layer 220 being oppositely arranged.Between the 3rd signals layer 210 and the 4th signals layer 220, be provided with two contrast signal via holes 230 that be arranged in parallel, and between two contrast signal via holes 230 and/or both sides are provided with parallel with contrast signal via hole 230 with reference to ground connection reference bore 240.Contrast signal via hole 230 and be the through hole that connects the 3rd signals layer 210 and the 4th signals layer 220 with reference to ground connection reference bore 240.The 3rd signals layer 210 is provided with two of being connected respectively with two contrast signal via holes 230 and is provided be connected respectively with two contrast signal via holes 230 two with reference to joint 224 with reference to detection head 214, the four signals layers 220.
Distance between the 3rd signals layer 210 of present embodiment and the 4th signals layer 220 and corresponding first signal layer 110 and distance and structure between secondary signal layer 120 are consistent, consistent with the order of magnitude setting position of ground connection reference bore 140 with reference to the quantity of ground connection reference bore 240 and the position of setting, and two with reference to short circuit between detection head 214.
The structure with reference to mechanism 200 of present embodiment and the structure of mechanism for testing 100 are basic identical, and difference is only corresponding with reference to the direct short circuit of detection head 214.By being basic identical with reference to mechanism 200 with the structural design of mechanism for testing 100, can get rid of other structural factors and cause producing test result deviation, thereby can improve the precision of test result.
The mechanism for testing circuit boards 100 with said structure, by between two signal via 130 and/or both sides ground connection reference bore 140 is set, thereby via structure design parameter is diversified, it is large that the scope of application of whole mechanism for testing 100 becomes, and through hole impedance and Impedance Matching on Transmission Line, signal reflex reduces, thereby loss test degree of fitting improves, and test result is accurate; In addition, because above-mentioned mechanism for testing 100 via hole losses are low, via hole loss proportion in overall losses is less, negligible, thereby testing result is more accurate.
The above embodiment has only expressed several embodiment of the present utility model, and it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to the utility model the scope of the claims.It should be pointed out that for the person of ordinary skill of the art, without departing from the concept of the premise utility, can also make some distortion and improvement, these all belong to protection domain of the present utility model.Therefore, the protection domain of the utility model patent should be as the criterion with claims.
Claims (8)
1. a mechanism for testing circuit boards, it is characterized in that, comprise the first signal layer and the secondary signal layer that are oppositely arranged, between described first signal layer and described secondary signal layer, be provided with two signal via that be arranged in parallel, and between two described signal via and/or both sides are provided with the ground connection reference bore parallel with described signal via, described signal via and described ground connection reference bore are the through hole that connects described first signal layer and described secondary signal layer, described first signal layer is provided with two detection heads that are connected respectively with two described signal via, described secondary signal layer is provided with two joints that are connected respectively with two described signal via.
2. mechanism for testing circuit boards as claimed in claim 1, it is characterized in that, on described first signal layer and described secondary signal layer, the two ends of described ground connection reference bore are respectively equipped with reference bore pad, the two ends of described signal via are respectively equipped with signal via pad, and described detection head is electrically connected to the signal via pad on described first signal layer, described joint is electrically connected to the signal via pad on described secondary signal layer.
3. mechanism for testing circuit boards as claimed in claim 1, it is characterized in that, between described first signal layer and described secondary signal layer, be also provided with pilot hole, described pilot hole is the through hole of the described first signal layer of connection and described secondary signal layer, and is parallel to described signal via.
4. mechanism for testing circuit boards as claimed in claim 1, is characterized in that, the quantity of described ground connection reference bore is 1, and 1 described ground connection reference bore is located at the centre of two described signal via.
5. mechanism for testing circuit boards as claimed in claim 1, is characterized in that, the quantity of described ground connection reference bore is two, and two described signal via are all between two described ground connection reference bore.
6. mechanism for testing circuit boards as claimed in claim 1, is characterized in that, the quantity of described ground connection reference bore is 3, and 3 described ground connection reference bore and two described signal via intervals settings, and both sides are described ground connection reference bore.
7. the mechanism for testing circuit boards as described in any one in claim 1～6, it is characterized in that, the length of the unnecessary short column of described signal via is 0～0.3mm, and aperture is 0.15～0.3mm, and the minor increment between the hole wall of two described signal via is 0.8～2.5mm.
8. a circuit board testing system, is characterized in that, comprises mechanism for testing circuit boards described in claim 1～7 any one and with reference to mechanism, described reference mechanisms comprises the 3rd signals layer and the 4th signals layer being oppositely arranged, between described the 3rd signals layer and described the 4th signals layer, be provided with two contrast signal via holes that be arranged in parallel, and between two described contrast signal via holes and/or both sides are provided with parallel with described contrast signal via hole with reference to ground connection reference bore, described contrast signal via hole and the described through hole that connects described the 3rd signals layer and described the 4th signals layer that is with reference to ground connection reference bore, described the 3rd signals layer is provided be connected respectively with two described contrast signal via holes two with reference to detection head, described the 4th signals layer is provided be connected respectively with two described contrast signal via holes two with reference to joint, distance between described the 3rd signals layer and described the 4th signals layer and corresponding described first signal layer and the distance between described secondary signal layer are consistent, described consistent with the order of magnitude setting position of described ground connection reference bore with reference to the quantity of ground connection reference bore and the position of setting, and two described with reference to short circuit between detection head.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420401446.0U CN203981836U (en) | 2014-07-18 | 2014-07-18 | Mechanism for testing circuit boards and test macro |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420401446.0U CN203981836U (en) | 2014-07-18 | 2014-07-18 | Mechanism for testing circuit boards and test macro |
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| CN203981836U true CN203981836U (en) | 2014-12-03 |
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| CN201420401446.0U Active CN203981836U (en) | 2014-07-18 | 2014-07-18 | Mechanism for testing circuit boards and test macro |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105527559A (en) * | 2015-11-30 | 2016-04-27 | 北大方正集团有限公司 | Test circuit board, manufacturing method thereof, test method and test system |
| CN107728043A (en) * | 2017-11-15 | 2018-02-23 | 奥士康科技股份有限公司 | A kind of circuit board detection method and circuit board testing system |
| CN108254625A (en) * | 2017-12-29 | 2018-07-06 | 生益电子股份有限公司 | A kind of insertion loss test-strips |
| CN108445299A (en) * | 2018-03-16 | 2018-08-24 | 生益电子股份有限公司 | A kind of insertion loss test-strips |
| CN113391194A (en) * | 2021-08-17 | 2021-09-14 | 中兴通讯股份有限公司 | Printed circuit board testing method and device |
-
2014
- 2014-07-18 CN CN201420401446.0U patent/CN203981836U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105527559A (en) * | 2015-11-30 | 2016-04-27 | 北大方正集团有限公司 | Test circuit board, manufacturing method thereof, test method and test system |
| CN107728043A (en) * | 2017-11-15 | 2018-02-23 | 奥士康科技股份有限公司 | A kind of circuit board detection method and circuit board testing system |
| CN108254625A (en) * | 2017-12-29 | 2018-07-06 | 生益电子股份有限公司 | A kind of insertion loss test-strips |
| CN108445299A (en) * | 2018-03-16 | 2018-08-24 | 生益电子股份有限公司 | A kind of insertion loss test-strips |
| CN113391194A (en) * | 2021-08-17 | 2021-09-14 | 中兴通讯股份有限公司 | Printed circuit board testing method and device |
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