CN203968062U - The pseudo-differential power amplifier that a kind of power added efficiency improves - Google Patents
The pseudo-differential power amplifier that a kind of power added efficiency improves Download PDFInfo
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- CN203968062U CN203968062U CN201420319105.9U CN201420319105U CN203968062U CN 203968062 U CN203968062 U CN 203968062U CN 201420319105 U CN201420319105 U CN 201420319105U CN 203968062 U CN203968062 U CN 203968062U
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- power amplifier
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Abstract
The utility model discloses the pseudo-differential power amplifier that a kind of power added efficiency improves, comprise the transistor of multiple parallel connections, described transistorized collector electrode connects collector bias circuit, described transistorized base stage connects base bias circuit, described transistorized emitter connects steady resistance the ground connection of different resistances, described transistorized amplifying circuit full symmetric.Utilize transistor opening ways gradually dynamically, while selecting the steady resistance of different resistances, can make in the time that small-power is inputted most not conductings of transistor, and along with the increase of input power, due to the self-bias voltage of base stage, the transistor size of conducting is increased.Owing to having reduced the number of turn-on transistor when the low-power, thereby improve the power added efficiency of pseudo-differential power amplifier.
Description
Technical field
the utility model relates to a kind of pseudo-differential power amplifier, the pseudo-differential power amplifier that particularly a kind of power added efficiency improves.
Background technology
power amplifier is the main dissipative cell in communication equipment.The efficiency that improves power amplifier can obviously improve communication system whole efficiency, and reduces the heat that power amplifier produces, and stablizes power amplifier performance.Power added efficiency (PAE, Power Added Efficiency) mark power amplifier DC consumption power is converted into the efficiency of power output, and its value equals power output Pout and deducts input power Pin again divided by DC consumption power P DC.
current modal high efficiency power amplifier structure has Doherty, envelope-tracking ET (Envelope Tracking), envelope separates and recovery technology EER (Envelope Elimination and Restoration), out-phase modulation LINC (Linear Amplification with Nonlinear Components) etc.Doherty know-why is that peak power and the average power of amplifying signal respectively improves power amplifier whole efficiency.ET technology is by regulating bias voltage to reduce DC power, but that its dynamic bias is synchronizeed with radiofrequency signal is more difficult.Envelope signal two parts of the carrier signal that EER technology is permanent envelope by radio-frequency signal decomposition and signal itself, amplify respectively rear employing drain modulation and obtain required radiofrequency signal.Adopt high efficiency switch power amplifier to amplify and can obtain high efficiency permanent envelope carrier wave, thereby improve power amplifier whole efficiency.Its shortcoming is to need high-precision amplitude and Phase Tracking just can recover primary signal.The two-way constant envelope signal that LINC technology is separated into modulation signal the amplitude of carrying respectively and phase place, then carries out high efficiency amplification to it respectively by off state power amplifier, to improve overall power amplification efficiency.It is realized difficult point and is to say accurately that obtaining width is separated synthesizing of signal and signal.
pseudo-differential power amplifier amplifies differential signal, and all transistor of traditional pseudo-differential amplifier is always in opening, and DC power is large, and efficiency is low.
Summary of the invention
the utility model object is: the pseudo-differential power amplifier that provides a kind of power added efficiency simple in structure, that reliability is high to improve.
the technical solution of the utility model is: the pseudo-differential power amplifier that a kind of power added efficiency improves, comprise the transistor of multiple base stage parallel connections, described transistorized collector electrode connects collector bias circuit, described transistorized base stage connects base bias circuit, described transistorized emitter connects steady resistance the ground connection of different resistances, described transistorized amplifying circuit full symmetric.
it is in parallel again that described transistor base can add transmission line coupling, further improves power amplifier properties.
the resistance of described steady resistance increases successively, and its Standard resistance range is 3-12 Ω.
described transistorized number is 2-200.
the utility model has the advantages that:
the circuit that this utility model provides has effectively utilized transistor opening ways gradually dynamically, while selecting the steady resistance of different resistances, can make most not conductings of transistor in the time that small-power is inputted, and along with the increase of input power, due to the self-bias voltage of base stage, the transistor size of conducting is increased.Owing to having reduced the number of turn-on transistor when the low-power, thereby improve the power added efficiency of pseudo-differential power amplifier.
Brief description of the drawings
below in conjunction with drawings and Examples, the utility model is further described:
fig. 1 is the pseudo-differential power amplifier schematic diagram that a kind of power added efficiency of the utility model improves.
Embodiment
for making the purpose of this utility model, technical scheme and advantage more cheer and bright, below in conjunction with embodiment and with reference to accompanying drawing, the utility model is further described.Should be appreciated that, these descriptions are exemplary, and do not really want to limit scope of the present utility model.In addition, in the following description, omitted the description to known features and technology, to avoid unnecessarily obscuring concept of the present utility model.
embodiment:
the pseudo-differential power amplifier schematic diagram that the power added efficiency that the present embodiment provides improves, as shown in Figure 1, IN1, IN2 is differential signal input, OUT1, and OUT2 is power amplifier difference output end, VCC is collector bias voltage, Vbias, and Rbias is transistor base bias voltage, Q1, Q2 ... Qn is transistor, Re1, Re2 ... Ren is transistorized emitter-base bandgap grading steady resistance.
between transistor, base stage is directly connected, transistorized collector electrode connects collector bias circuit, transistorized base stage connects base bias circuit, and transistorized emitter connects steady resistance the ground connection of different resistances, the amplifying circuit full symmetric of pseudo-differential power amplifier differential signal.Select the Re1 of different resistances, Re2, when Ren, can make in the time that small-power is inputted most not conductings of transistor, and along with the increase of input power, due to the self-bias voltage of base stage, the transistor size of conducting is increased, Re1, Re2, between Ren, can become arithmetic progression, the number of transistors of conducting is also to increase one by one like this.
the scope of the resistance of general steady resistance is at 3-12 Ω, and the minimum resistance of steady resistance is for making transistor reach heat-staple resistance value.
owing to having reduced the number of turn-on transistor when the low-power, thereby improve the power added efficiency of pseudo-differential power amplifier.As while needing Single-end output, can be by Ba Lun by the difference OUT1 of output, OUT2 signal is converted into Single-end output.
should be understood that, above-mentioned embodiment of the present utility model is only for exemplary illustration or explain principle of the present utility model, and do not form restriction of the present utility model.Therefore any amendment of, making, be equal to replacement, improvement etc., within all should being included in protection range of the present utility model in the situation that not departing from spirit and scope of the present utility model.In addition, the utility model claims are intended to contain whole variations and the modification in the equivalents that falls into claims scope and border or this scope and border.
Claims (4)
1. the pseudo-differential power amplifier that power added efficiency improves, it is characterized in that, comprise the transistor of multiple parallel connections, described transistorized collector electrode connects collector bias circuit, described transistorized base stage connects base bias circuit, described transistorized emitter connects steady resistance the ground connection of different resistances, described transistorized amplifying circuit full symmetric.
2. the pseudo-differential power amplifier that power added efficiency according to claim 1 improves, is characterized in that, described transistorized base stage is connected with transmission line matching network.
3. the pseudo-differential power amplifier that power added efficiency according to claim 1 improves, is characterized in that, the resistance of described steady resistance increases successively, and its Standard resistance range is 3-12 Ω.
4. the pseudo-differential power amplifier that power added efficiency according to claim 1 improves, is characterized in that, described transistorized number is 2-200.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201420319105.9U CN203968062U (en) | 2014-06-16 | 2014-06-16 | The pseudo-differential power amplifier that a kind of power added efficiency improves |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201420319105.9U CN203968062U (en) | 2014-06-16 | 2014-06-16 | The pseudo-differential power amplifier that a kind of power added efficiency improves |
Publications (1)
Publication Number | Publication Date |
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CN203968062U true CN203968062U (en) | 2014-11-26 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201420319105.9U Expired - Fee Related CN203968062U (en) | 2014-06-16 | 2014-06-16 | The pseudo-differential power amplifier that a kind of power added efficiency improves |
Country Status (1)
Country | Link |
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CN (1) | CN203968062U (en) |
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2014
- 2014-06-16 CN CN201420319105.9U patent/CN203968062U/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141126 Termination date: 20150616 |
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EXPY | Termination of patent right or utility model |