CN203965827U - A kind of TCPST disconnector grounding switch interlock logic simulator - Google Patents
A kind of TCPST disconnector grounding switch interlock logic simulator Download PDFInfo
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- CN203965827U CN203965827U CN201420355919.8U CN201420355919U CN203965827U CN 203965827 U CN203965827 U CN 203965827U CN 201420355919 U CN201420355919 U CN 201420355919U CN 203965827 U CN203965827 U CN 203965827U
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Abstract
A kind of TCPST disconnector grounding switch interlock logic simulator, belong to POWER SYSTEM EMERGENCY holding circuit device, relate in particular to a kind of simulation testing device for controllable phase shifter relay protection circuit, comprise the first to the 3rd AND circuit, the first isolating switch and the first circuit interrupter grounding switch, the divide-shut brake interlocking signal of the first disconnector providing are provided the first AND circuit; The second isolating switch and the second circuit interrupter grounding switch, the divide-shut brake interlocking signal of the second disconnector providing are provided the second AND circuit; The 3rd AND circuit is connected to the first disconnector and the second disconnector, and the divide-shut brake interlocking signal of first and second circuit interrupter grounding switch is provided.This device can be simulated the interlock protection state of TCPST device truly, and for research or the design of TCPST device provide corresponding simulation result, its logical relation is succinct, and reliable in action is easy to realize, and has advantages of cross-platform emulation testing.
Description
Technical field
The utility model belongs to POWER SYSTEM EMERGENCY holding circuit device, relates in particular to a kind of simulation testing device for controllable phase shifter relay protection circuit.
Background technology
Along with socioeconomic sustainable development, life and production are effectively stimulating developing rapidly of electric system to the ever-increasing demand of electric power supply.The space length of energy centre and load center is large capacity, the long objective reason apart from transmission of electric energy.In order to meet transmission of electricity demand, the scale expanding day of electric power networks.Be subject to the constraint of the steady limit of equipment heat because electric system is in operation, voltage drop constraint, N-1 Static Security Constraints, the constraint of system small signal stability, voltage stability constraint, Transient Stability Constraints and the reliability Reserve Constraint of transmission line of electricity makes the ability to transmit electricity of system be difficult to be utilized cmpletely.The potentiality of excavating existed system by novel control element are basic ideas for nearest many decades power science research, electric power network technique upgrading.Once electrical network builds up, the electric parameter of transmission line of electricity reality, system load flow is retrained by Ohm law, Kirchoff law, electric power networks is unique, and what can control fast is to change topological structure by line switching.Certain constraint that the free trend of this shortage control is often moved due to the system that is subject to is had to reduce the utilization factor of system equipment or made system operate in a technical economical index is not good state.In the evolution of power system technology, in order to make electrical network have certain control freedom degree, the technology such as reactive-load compensation in parallel, series connection reactive-load compensation, phase shifter and application of adjustable tap transformer that has successively been born and has realized with mechanical switching device shifter.But mechanical device cannot meet the dynamic demand for control of system in speed, on frequency, cannot fully meet the requirement of systematic steady state regulation and control.Along with the development of power electronic devices, controllable phase shifter (mainly refers to thyristor control phase shifter, Thyristor Controlled Phase Shifting Transformer, in the following description also referred to as phase shifter or TCPST) obtain studying widely.Due to the fast response characteristic of power electronic devices, TCPST can not only quick adjustment Line Flow, can also realize functions such as improving power system transient stability, damping system vibration.The gordian technique research of carrying out TCPST has great importance to the control device, the pattern of optimizing the system operation that strengthen supergrid, and wherein, safety, the stable operation of the research of the control resist technology of TCPST to system has vital effect.Due to the character of supergrid system, the gordian technique research of TCPST mainly realizes by emulation technology.
The control system of controllable phase shifter is the key of system operation, has vital role for the operation and management level that improves equipment.The control object of control system is isolating switch, disconnecting link and the thyristor becoming in secondary side pressure-control circuit in parallel in system architecture.The controllable phase shifter operation of connecting in the line, the switching of its running status, while breaking down, from system, the operation such as excision all should normally operate to precondition with what do not affect transmission line of electricity fast.Taking monophase system as example, the allocation plan of controllable phase shifter and isolating switch, isolation switch as shown in Figure 1.In figure, controllable phase shifter is made up of series transformer B, shunt transformer E and thyristor groups T, winding B1, the B2 of series transformer B primary side is connected to the winding E1 of shunt transformer E primary side, and is connected in power network line and moved by isolating switch and isolation switch; Thyristor groups T is connected to the winding B3 of series transformer B secondary side and three winding E2, E3, the E4 of shunt transformer E secondary side.Thyristor groups T in figure is schematic diagram, and wherein each independently thyristor is made up of multiple thyristor connection in series-parallel in real system.
Due to the character of supergrid system, the research of the gordian technique of TCPST or the design of application system, must test and emulation said system, and reference test and simulation result, to the foundation that result is verified or conduct is revised of research or design.
Utility model content
The purpose of this utility model is that a kind of TCPST disconnector grounding switch interlock logic simulator will be provided, it can simulate reflection TCPST disconnector grounding switch interlock logic situation truly, for applied research or the design of controllable phase shifter provide corresponding simulation result, solve the technical matters that verification platform is provided for the applied research of controllable phase shifter or design.
The utility model solves the problems of the technologies described above adopted technical scheme:
A kind of TCPST disconnector grounding switch interlock logic simulator, comprises the first to the 3rd AND circuit, it is characterized in that:
Two input ends of the first AND circuit, be connected respectively to the first isolating switch and the first circuit interrupter grounding switch point position a signal end; The output terminal of described the first AND circuit, the divide-shut brake interlocking signal of the first disconnector providing;
Two input ends of the second AND circuit, be connected respectively to the second isolating switch and the second circuit interrupter grounding switch point position a signal end; The output terminal of described the second AND circuit, the divide-shut brake interlocking signal of the second disconnector providing;
Two input ends of the 3rd AND circuit, be connected respectively to the first disconnector and the second disconnector point position a signal end; The output terminal of described the 3rd AND circuit, provides the divide-shut brake interlocking signal of the first circuit interrupter grounding switch or the second circuit interrupter grounding switch.
The preferred technical scheme of one of TCPST disconnector grounding switch interlock logic simulator of the present utility model, is characterized in that the first to the 3rd described AND circuit is made up of 3 input ends three and door integrated circuit.
The preferred technical scheme of another kind of TCPST disconnector grounding switch interlock logic simulator of the present utility model, is characterized in that the first to the 3rd described AND circuit is made up of 2 input ends four and door integrated circuit.
The preferably technical scheme of one of TCPST disconnector grounding switch interlock logic simulator of the present utility model, it is characterized in that described TCPST disconnector grounding switch interlock logic simulator is also provided with thyristor pulse block signal output terminal, described thyristor pulse block signal output terminal is connected to thyristor loop, in the time that system enters isolation or inspecting state, described TCPST disconnector grounding switch interlock logic simulator, blocks thyristor triggering impulse signal by described thyristor pulse block signal output terminal.
The beneficial effects of the utility model are:
1. the interlock protection state of TCPST device can be simulated, be reflected to TCPST disconnector grounding switch interlock logic simulator of the present utility model truly, for research or the design of TCPST device provide corresponding simulation result;
2. the logical relation of TCPST disconnector grounding switch interlock logic simulator of the present utility model is succinct, and reliable in action is easy to realize, and has advantages of cross-platform emulation testing.
Brief description of the drawings
Fig. 1 is the allocation plan schematic diagram of controllable phase shifter control loop;
Fig. 2 is the main circuit diagram of TCPST disconnector grounding switch interlock logic simulator of the present utility model;
Fig. 3 is the logical relation schematic diagram of TCPST disconnector grounding switch interlock logic simulator of the present utility model;
The label of the each parts in above figure: 10 is 3 input ends three and door integrated circuit, 11-13 is the first AND circuit to the three AND circuit, HVB-SE is bypass breaker, BS1 is the first bypass isolating switch, BS2 is the second bypass isolating switch, BES1 is the first grounding shunt switch, BES2 is the second grounding shunt switch, BRK-SE1 is the first isolating switch, BRK-SE2 is the second isolating switch, and DS1 is the first disconnector, and DS2 is the second disconnector, DES1 is the first circuit interrupter grounding switch, and DES2 is the second circuit interrupter grounding switch.
Embodiment
In order to understand better technique scheme of the present utility model, be explained in further detail below in conjunction with drawings and Examples.
As shown in Figure 1, two bus nodes S are connected by transmission line of electricity with L the allocation plan of controllable phase shifter control loop, and phase shifter TCPST connects and moves in the line, and thyristor voltage regulation loop T is controlling the output response characteristic of TCPST.The protection system of controllable phase shifter is the guarantee of device security, stable operation, to reducing fault coverage, preventing that device damage is significant.The switching of TCPST running status, fast operation such as excision grade from system while breaking down, all should normally operate to precondition with what do not affect transmission line of electricity.The setting of protection should be able to cover all trouble spots, fault type, does not have dead band.When phase shifter place line failure, can be divided into troubles inside the sample space and external area error by fault scene, fault subregion is referring to Fig. 1.Troubles inside the sample space refers to and comprises the fault occurring within the scope of TCPST body and phase shifter both sides isolating switch.External area error refers to the fault that the region outside the isolating switch of phase shifter both sides occurs, and comprises the situation that circuit, two side bus, adjacent lines break down.It is abnormal etc. that the common fault in thyristor control loop is refused triggering, false triggering, Trigger Angle, can cause circuit cutout, short circuit in winding, system to produce the faults such as harmonic wave and occur, and to system, normal operation has a huge impact.Isolating switch in phase shifter system structure plays a part to switch phase shifter state in normal course of operation, and deciliter combinations of states of these equipment can form different running statuses, is respectively: operation, bypass, isolation, maintenance and bypass breaker maintenance.Can be rapidly in the time breaking down by phase shifter bypass or excise from system, reduce fault coverage, protection system equipment.For example, when thyristor loop T breaks down, the first isolating switch BRK-SE1 of the bypass breaker HVB-SE that need close, tripping phase shifter both sides and the second isolating switch BRK-SE2 excise TCPST and locking trigger pulse from circuit.In order to prevent maloperation, while controlling deciliter state of isolating switch, disconnecting link, must there is certain logical interlock relation.Because isolating switch in phase shifter structure, isolation switch are numerous, and relate to the control of thyristor, its interlock logic is also more complicated.TCPST disconnector grounding switch interlock logic simulator of the present utility model can provide the divide/combined floodgate interlocking signal of relative breaker or chopper switch: in the time that described divide/combined floodgate interlocking signal is logical one, allow the divide/closing operation of corresponding isolating switch or chopper switch; In the time that described divide/combined floodgate interlocking signal is logical zero, forbid the divide/closing operation of corresponding isolating switch or chopper switch.
Fig. 2 is the main circuit diagram of TCPST disconnector grounding switch interlock logic simulator of the present utility model, comprises the first to the 3rd AND circuit 11-13, wherein:
Two input ends of the first AND circuit 11, be connected respectively to the first isolating switch BRK-SE1 and the first circuit interrupter grounding switch DES1 point position a signal end; The output terminal of described the first AND circuit 11, the divide-shut brake interlocking signal of the first disconnector DS1 providing;
Two input ends of the second AND circuit 12, be connected respectively to the second isolating switch BRK-SE2 and the second circuit interrupter grounding switch DES2 point position a signal end; The output terminal of described the second AND circuit 12, the divide-shut brake interlocking signal of the second disconnector DS2 providing;
Two input ends of the 3rd AND circuit 13, be connected respectively to the first disconnector DS1 and the second disconnector DS2 point position a signal end; The output terminal of described the 3rd AND circuit 13, provides the divide-shut brake interlocking signal of the first circuit interrupter grounding switch DES1 or the second circuit interrupter grounding switch DES2.
An embodiment of TCPST disconnector grounding switch interlock logic simulator of the present utility model adopts 74 serial integrated logic circuit elements to realize, wherein, the first to the 3rd AND circuit 11-13 is made up of 3 input ends three and door integrated circuit 7411, and idle input end each and door is connected to logical one level.Another embodiment of TCPST disconnector grounding switch interlock logic simulator of the present utility model is made up of with door 2 input ends four and three 2 input ends in door integrated circuit 7408.
In an embodiment of TCPST disconnector grounding switch interlock logic simulator of the present utility model, also be provided with thyristor pulse block signal output terminal, described thyristor pulse block signal output terminal is connected to thyristor loop T, in the time that system enters isolation or inspecting state, described TCPST disconnector grounding switch interlock logic simulator, blocks thyristor triggering impulse signal by described thyristor pulse block signal output terminal.
Fig. 3 has provided the logical relation schematic diagram of TCPST disconnector grounding switch interlock logic simulator of the present utility model, adopt actual electrical sub-element (true environment) or all can realize logical relation or the logic function of this device with computer software (virtual environment), that is to say, TCPST disconnector grounding switch interlock logic simulator of the present utility model, both can adopt above-mentioned integrated logic circuit element to realize, can use chip microprocessor programming simulation to realize, or, according to the logical organization shown in Fig. 3, in virtual environment, simulate to realize with computer software, can be widely used in the research of TCPST device interlocking protective system, design, manufacture field.
Those of ordinary skill in the art will be appreciated that; above embodiment is only for the technical solution of the utility model is described; and be not used as restriction of the present utility model; any variation of the above embodiment being done based on connotation of the present utility model, modification, all will drop in the protection domain of claim of the present utility model.
Claims (4)
1. a TCPST disconnector grounding switch interlock logic simulator, comprises the first to the 3rd AND circuit, it is characterized in that:
Two input ends of the first AND circuit, be connected respectively to the first isolating switch and the first circuit interrupter grounding switch point position a signal end; The output terminal of described the first AND circuit, the divide-shut brake interlocking signal of the first disconnector providing;
Two input ends of the second AND circuit, be connected respectively to the second isolating switch and the second circuit interrupter grounding switch point position a signal end; The output terminal of described the second AND circuit, the divide-shut brake interlocking signal of the second disconnector providing;
Two input ends of the 3rd AND circuit, be connected respectively to the first disconnector and the second disconnector point position a signal end; The output terminal of described the 3rd AND circuit, provides the divide-shut brake interlocking signal of the first circuit interrupter grounding switch or the second circuit interrupter grounding switch.
2. TCPST disconnector grounding switch interlock logic simulator according to claim 1, is characterized in that the first to the 3rd described AND circuit is made up of 3 input ends three and door integrated circuit.
3. TCPST disconnector grounding switch interlock logic simulator according to claim 1, is characterized in that the first to the 3rd described AND circuit is made up of 2 input ends four and door integrated circuit.
4. according to the TCPST disconnector grounding switch interlock logic simulator described in claim 1 or 3, it is characterized in that described TCPST disconnector grounding switch interlock logic simulator is also provided with thyristor pulse block signal output terminal, described thyristor pulse block signal output terminal is connected to thyristor loop, in the time that system enters isolation or inspecting state, described TCPST disconnector grounding switch interlock logic simulator, blocks thyristor triggering impulse signal by described thyristor pulse block signal output terminal.
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| CN201420355919.8U CN203965827U (en) | 2014-06-30 | 2014-06-30 | A kind of TCPST disconnector grounding switch interlock logic simulator |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110954800A (en) * | 2018-09-26 | 2020-04-03 | 国网江苏省电力有限公司南京供电分公司 | Method for alternately triggering thyristors connected in anti-parallel mode in TBS valve bank |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110954800A (en) * | 2018-09-26 | 2020-04-03 | 国网江苏省电力有限公司南京供电分公司 | Method for alternately triggering thyristors connected in anti-parallel mode in TBS valve bank |
| CN110954800B (en) * | 2018-09-26 | 2022-04-08 | 国网江苏省电力有限公司南京供电分公司 | Method for alternately triggering thyristors connected in anti-parallel mode in TBS valve bank |
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