CN203920777U - A kind of phase detecting track circuit receptor - Google Patents
A kind of phase detecting track circuit receptor Download PDFInfo
- Publication number
- CN203920777U CN203920777U CN201420151099.0U CN201420151099U CN203920777U CN 203920777 U CN203920777 U CN 203920777U CN 201420151099 U CN201420151099 U CN 201420151099U CN 203920777 U CN203920777 U CN 203920777U
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- circuit
- signal input
- phase detecting
- single chip
- track
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Abstract
The utility model discloses a kind of phase detecting track circuit receptor.Comprise power supply stabilization circuit, signal input circuit, single chip circuit and relay drive circuit.Described single chip circuit is connected with signal input circuit, relay drive circuit, and described power supply stabilization circuit provides working power for signal input circuit, single chip circuit and relay drive circuit.Every cover receptor is arranged in relay dust boot, poor for the phase and magnitude of relatively track signal and local signal, drive track relay energized with fall, in configuration, be designed to two-node cluster hot backup mode, guarantee the safety and reliability of track circuit.
Description
Technical field
The utility model relates to track traffic signal equipment, particularly a kind of phase detecting track circuit receptor.
Background technology
Railway signal track circuit has been used for the inspection that take inspection, rail disconnected rail of train to section, also can be applied to the transmission of car ground digital signal.The feed end of track circuit sends electric signal to rail, and receiving end is processed the amplitude of signal, and when track section has train occupation, rail is by Railway wheelset short circuit, and receiving end can not receive the signal of sending end, and drive track relay falls.
480 traditional track circuit adjacent sections voltages carry out polarity intersection, but the equipment phase place not being checked, cannot detect the phase place of this section, when damage in insulation, under worst case, when this section voltage is 2 times of adjacent sections voltages, adjacent sections relay can pick up in misoperation, have car section to be thought without car by mistake, this is very dangerous.
Summary of the invention
In order to address the above problem, the utility model provides a kind of phase detecting track circuit receptor.
The technical solution adopted in the utility model is: a kind of phase detecting track circuit receptor.Comprise power supply stabilization circuit, signal input circuit, single chip circuit and relay drive circuit.Described single chip circuit is connected with signal input circuit, relay drive circuit, and described power supply stabilization circuit provides working power for signal input circuit, single chip circuit and relay drive circuit.Every cover receptor is arranged in relay dust boot, poor for the phase and magnitude of relatively track signal and local signal, drive track relay energized with fall, in configuration, be designed to two-node cluster hot backup mode, guarantee the safety and reliability of track circuit.
Compared with prior art, the utility model has the advantage of: system adopt track signal input circuit and local signal input circuit to the track signal of track circuit and local signal carry out phase bit comparison, micro controller system drives track relay according to phase difference size.Phase sensitivity receptor is two-shipper configuration when normal work, enhances system security and reliability.
Accompanying drawing explanation
Fig. 1 is structural representation of the present utility model;
Fig. 2 is signal input circuit figure of the present utility model;
Fig. 3 is the circuit diagram of single chip circuit of the present utility model;
Fig. 4 is relay drive circuit figure of the present utility model.
The specific embodiment
Below in conjunction with drawings and Examples, the utility model is further illustrated.The utility model is only the description to the utility model embodiment, scope of the present utility model is not had to any restriction.
Embodiment 1
As shown in Figure 1, a kind of phase detecting track circuit receptor, comprises power supply stabilization circuit 1, signal input circuit 2, single chip circuit 3 and relay drive circuit 4.
As shown in Figure 2, be track signal input circuit of the present utility model and local signal input circuit circuit diagram.Track signal input circuit and local signal input circuit are for sinusoidal track signal and the orthogonal ripple of local signal shaping of input.By zero-crossing comparator, AC signal is carried out to Shape correction, by fpga chip, carry out data acquisition, convert the frequency of measured signal, phase information to binary data and be transferred to micro controller system and process.The AC signal that two-way was processed through track circuit is through the input of J1 mouth, U1A and U1B are respectively the wherein two-way of op amp LM339, form separately signal input circuit, AC signal is through current-limiting resistance R2, R3, be input to the reverse input end of comparator separately, when input exchange signal is greater than 0V, comparator output terminal is high level 4.3V～5.5V, when AC signal size is lower than 0V, voltage comparator mouth is low level 0.2V～0.8V.U2 is fpga chip, type selecting is EPF10K20TC144-4, in order to improve the sampling stability of system, adopt the active crystal oscillator Y1 of 40MHz that clock signal is provided, four frequency divisions can be carried out to 40MHz in fpga chip inside, the 10MHz obtaining is as sampling reference clock, and the sampling period can be set to 0.1us.The data such as the cycle data of the parallel transmission of 19 lines of fpga chip employing sampled signal, phase data, zero-crossing timing are to micro controller system, and the handshake of micro controller system and fpga chip is respectively FEN and DSEL.
As shown in Figure 3, be the circuit diagram of single chip circuit of the present utility model.Micro controller system U1 type selecting is STC12C5A60S2, with two serial ports, between XTAL2 (Pin18) and XTAL1 (Pin9) and connect the crystal of a 12M, as clock source, the REST of micro controller system (Pin9) connects the REST pin of U5 watchdog circuit MAX706, the P3.6 of micro controller system (Pin16) is micro controller system feeding-dog signal pin, J5, J6 is the interface of 19 parallel lines of SCM&FPGA, J4 is phase sensitivity receptor and interlocking machine, the interface of warning box, U4 is communication level conversion chip, adopt MAX232, the serial communication interface of two-way redundancy can be provided, receive respectively on the two-way serial ports of micro controller system, J2 connects on adjacent MCU, for the communication under two-node cluster hot backup mode, in addition, D1 and D2 are respectively the LED light of different colours, be used to indicate operation or the faulty condition of phase sensitivity receptor.
As shown in Figure 4, be relay drive circuit figure of the present utility model.In order to guarantee the safety of track circuit; track relay adopts dynamic relay; so relay drive circuit adopts IRF840 in order to high-power driving; adopt optocoupler as buffer circuit, protection interface microcontroller, by D1, two diode rectifications of D2; adopt C1, two capacitor charge and discharges of C2; guarantee the discriminating of pulse signals, even if the faults such as short circuit appear in circuit, relay can misoperation yet.
Claims (6)
1. a phase detecting track circuit receptor, comprises power supply stabilization circuit, signal input circuit, single chip circuit and relay drive circuit; Described single chip circuit is connected with signal input circuit, relay drive circuit; Described power supply stabilization circuit is connected with signal input circuit, single chip circuit and relay drive circuit, it is characterized in that: described single chip circuit can receive the processing signals from signal input circuit, by phase bit comparison, control relay driving circuit drives track relay.
2. phase detecting track circuit receptor according to claim 1, is characterized in that: described signal input circuit comprises zero-crossing comparator, and the FPGA Acquisition Circuit being connected with zero-crossing comparator.
3. phase detecting track circuit receptor according to claim 2, is characterized in that: the chip model that described zero-crossing comparator adopts is LM339, and described FPGA model is EPF10K20TC144-4.
4. phase detecting track circuit receptor according to claim 1, is characterized in that: described single chip circuit comprises 8 micro controller systems of a slice, and the watchdog circuit being connected with 8 micro controller systems and communication level conversion chip.
5. phase detecting track circuit receptor according to claim 4, is characterized in that: 8 described micro controller system models are STC12C5A60S2, and described watchdog circuit model is MAX706, and described communication level change-over circuit conversion chip model is MAX232.
6. phase detecting track circuit receptor according to claim 1, is characterized in that: described relay drive circuit comprises metal-oxide-semiconductor IRF840, rectifier diode 1N4007 and cond (1uF and 100uF).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420151099.0U CN203920777U (en) | 2014-03-28 | 2014-03-28 | A kind of phase detecting track circuit receptor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420151099.0U CN203920777U (en) | 2014-03-28 | 2014-03-28 | A kind of phase detecting track circuit receptor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203920777U true CN203920777U (en) | 2014-11-05 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420151099.0U Expired - Fee Related CN203920777U (en) | 2014-03-28 | 2014-03-28 | A kind of phase detecting track circuit receptor |
Country Status (1)
| Country | Link |
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| CN (1) | CN203920777U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104816740A (en) * | 2015-04-28 | 2015-08-05 | 卡斯柯信号有限公司 | 25Hz track circuit acquisition system based on double 2-vote-2 architecture |
| CN112398468A (en) * | 2020-10-30 | 2021-02-23 | 北京全路通信信号研究设计院集团有限公司 | Dynamic driving circuit device and method for dynamically driving circuit |
| CN113281568A (en) * | 2021-07-21 | 2021-08-20 | 中国铁建电气化局集团有限公司 | Phase difference measuring system and measuring method for 25Hz phase-sensitive signals |
-
2014
- 2014-03-28 CN CN201420151099.0U patent/CN203920777U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104816740A (en) * | 2015-04-28 | 2015-08-05 | 卡斯柯信号有限公司 | 25Hz track circuit acquisition system based on double 2-vote-2 architecture |
| CN112398468A (en) * | 2020-10-30 | 2021-02-23 | 北京全路通信信号研究设计院集团有限公司 | Dynamic driving circuit device and method for dynamically driving circuit |
| CN113281568A (en) * | 2021-07-21 | 2021-08-20 | 中国铁建电气化局集团有限公司 | Phase difference measuring system and measuring method for 25Hz phase-sensitive signals |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141105 Termination date: 20150328 |
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| EXPY | Termination of patent right or utility model |